Driving device for power semiconductor device
阅读说明：本技术 一种用于功率半导体器件的驱动装置 (Driving device for power semiconductor device ) 是由 谢舜蒙 魏海山 杨乐乐 欧阳柳 田伟 马龙昌 唐威 于 2018-08-01 设计创作，主要内容包括：一种用于功率半导体器件的驱动装置,包括：功率放大电路,用于向所述功率半导体器件输出功率放大后的驱动信号,以控制所述功率半导体器件的运行状态；短路检测电路,用于检测所述功率放大电路的短路状态,并根据短路状态生成相应的短路状态信号；控制电路,用于根据所述短路状态信号和接收到的驱动信号生成相应的控制信号；其中,当短路状态信号为表征所述功率放大电路短路的信号时,所述控制电路配置为控制所述功率放大电路将自身输出的信号的电平变为零。本装置能够快速、准确地识别功率放大电路是否发生短路,并在功率放大电路发生短路的情况下进行相应的保护动作。(A driving apparatus for a power semiconductor device, comprising: the power amplifying circuit is used for outputting a drive signal after power amplification to the power semiconductor device so as to control the running state of the power semiconductor device; the short circuit detection circuit is used for detecting the short circuit state of the power amplification circuit and generating a corresponding short circuit state signal according to the short circuit state; the control circuit is used for generating a corresponding control signal according to the short-circuit state signal and the received driving signal; when the short-circuit state signal is a signal representing the short circuit of the power amplification circuit, the control circuit is configured to control the power amplification circuit to change the level of the signal output by the power amplification circuit to zero. The device can quickly and accurately identify whether the power amplification circuit is short-circuited or not, and performs corresponding protection action under the condition that the power amplification circuit is short-circuited.)
1. A driving apparatus for a power semiconductor device, the apparatus comprising:
the power amplification circuit is connected with the power semiconductor device and used for outputting a drive signal after power amplification to the power semiconductor device so as to control the running state of the power semiconductor device;
the short circuit detection circuit is connected with the power amplification circuit and is used for detecting the short circuit state of the power amplification circuit and generating a corresponding short circuit state signal according to the short circuit state;
the control circuit is connected with the short circuit detection circuit and used for generating a corresponding control signal according to the short circuit state signal and the received drive signal so as to control the running state of the power amplification circuit through the control signal, so that the power amplification circuit generates and outputs a power amplified drive signal;
when the short-circuit state signal is a signal representing the short circuit of the power amplification circuit, the control circuit is configured to control the power amplification circuit to change the level of the signal output by the power amplification circuit to zero.
2. The apparatus of claim 1, wherein the apparatus further comprises:
the fault locking reset circuit is connected between the short-circuit detection circuit and the control circuit and used for generating a corresponding fault signal according to the short-circuit state signal, wherein the time length for representing that the power amplification circuit is in the short-circuit state in the fault signal is longer than the time length for representing that the power amplification circuit is in the short-circuit state signal;
the control circuit is configured to generate the control signal based on the fault signal and a drive signal.
3. The apparatus of claim 2, wherein the short detection circuit is coupled to the power input of the power amplifier circuit for detecting whether the power input of the power amplifier circuit is under-voltage, and if so, adjusting the level of the short status signal from a first level indicative of no short to a second level indicative of a short.
4. The apparatus of claim 2 or 3, wherein the short detection circuit is coupled to the output of the power amplifier circuit for detecting whether the output of the power amplifier circuit is under-voltage, and if so, adjusting the level of the short status signal from a first level indicative of no short to a second level indicative of a short.
5. The apparatus according to any one of claims 2 to 4, wherein when the level of the short circuit state signal changes from a first level indicating that no short circuit occurs to a second level indicating that a short circuit occurs, the fail-lock reset circuit is configured to adjust the level of the fail signal from a third level indicating that no short circuit occurs to a fourth level indicating that a short circuit occurs;
when the level of the short-circuit state signal is changed from the second level representing short circuit to the first level representing no short circuit, the fault locking reset circuit is configured to keep the level of the fault signal at the fourth level for a preset time period and then adjust the level of the fault signal to the third level.
6. The apparatus of any of claims 2-5, wherein when the fault signal is a signal indicating that the power amplification circuit is not shorted,
if the level of the driving signal is a fifth level, the control circuit is configured to control the power amplification circuit to conduct the electric connection between the output end of the power amplification circuit and the anode of the power supply of the power amplification circuit;
and if the level of the driving signal is a sixth level, the control circuit is configured to control the power amplification circuit to conduct the electric connection between the output end of the power amplification circuit and the negative electrode of the power supply.
7. The apparatus of claim 6, wherein the control signal generated by the control circuit comprises a first control component, a second control component, and a third control component, wherein,
when the fault signal is a signal representing that the power amplification circuit is not short-circuited, the power amplification circuit is configured to conduct the electric connection between the self output end and the self power supply positive electrode or the power supply negative electrode according to the first control component and the second control component, and disconnect the electric connection between the self output end and the reference ground according to the third control component;
when the fault signal is a signal representing that the power amplification circuit is short-circuited, the power amplification circuit is configured to conduct the electrical connection between the self output end and the reference ground according to the third control component, and disconnect the electrical connection between the self output end and the self power supply positive electrode and the power supply negative electrode.
8. The apparatus of claim 7, the power amplification circuit comprising: the power amplifier comprises an on-power amplification module, an off-power amplification module and a protection power amplification module, wherein the control signal input ends of the on-power amplification module, the off-power amplification module and the protection power amplification module are respectively and correspondingly connected with different ports of the control circuit, and the output ends are connected together to form the output end of the power amplification circuit,
the power-on amplification module is used for conducting or breaking the electrical connection between the power supply anode of the power amplification circuit power supply and the output end of the power amplification circuit power supply under the control of the first control component;
the turn-off power amplification module is used for conducting or breaking the electrical connection between the power supply cathode of the power supply of the power amplification circuit and the output end of the power supply under the control of the second control component;
and the protection power amplification module is used for conducting or breaking the electric connection between the reference ground and the output end of the protection power amplification module under the control of the third control component.
9. The apparatus of claim 8, wherein when the level of the fault signal is a level indicating that the power amplification circuit is in an un-shorted state, the on/off states of the on and off power amplification modules are opposite;
and when the level of the fault signal is a level representing that the power amplification circuit is in a short-circuit state, the on-power amplification module and the off-power amplification module are both in an off state.
10. The apparatus of claim 8 or 9, wherein the power-on amplification module, the power-off amplification module and the protection amplification module are implemented by MOS transistor circuits.
Technical Field
The invention relates to the technical field of power electronics, in particular to a driving device for a power semiconductor device.
Background
The power semiconductor device needs to be driven in a matching way to perform switch control, so that conversion between a weak current control signal and a strong current is realized. At present, researches related to power semiconductor device drive protection mainly focus on power semiconductor device abnormal working condition protection, and most of researches focus on how to ensure that a power semiconductor device does not fail when a system is in a short-circuit working condition. However, in practical application, the power semiconductor device inevitably fails due to abnormal conditions and device degradation, and engineering application shows that the control terminal of the failed power semiconductor device, which is directly connected with the driving power amplification stage, generally exhibits a short-circuit mode.
When the power semiconductor device fails due to abnormal working conditions or degradation, three conditions are mainly presented: firstly, a control end connected with a power semiconductor device driving power amplification stage is not influenced; secondly, the control end is in an open circuit state; and thirdly, the control end shows a short-circuit state. The first two states do not affect the driving power amplifier stage, while the third state causes the power amplifier stage to be continuously overloaded, thereby causing the driving power amplifier stage to fail and the fault to be amplified.
Disclosure of Invention
To solve the above problems, the present invention provides a driving apparatus for a power semiconductor device, the apparatus including:
the power amplification circuit is connected with the power semiconductor device and used for outputting a drive signal after power amplification to the power semiconductor device so as to control the running state of the power semiconductor device;
the short circuit detection circuit is connected with the power amplification circuit and is used for detecting the short circuit state of the power amplification circuit and generating a corresponding short circuit state signal according to the short circuit state;
the control circuit is connected with the short circuit detection circuit and used for generating a corresponding control signal according to the short circuit state signal and the received drive signal so as to control the running state of the power amplification circuit through the control signal, so that the power amplification circuit generates and outputs a power amplified drive signal;
when the short-circuit state signal is a signal representing the short circuit of the power amplification circuit, the control circuit is configured to control the power amplification circuit to change the level of the signal output by the power amplification circuit to zero.
According to an embodiment of the invention, the apparatus further comprises:
the fault locking reset circuit is connected between the short-circuit detection circuit and the control circuit and used for generating a corresponding fault signal according to the short-circuit state signal, wherein the time length for representing that the power amplification circuit is in the short-circuit state in the fault signal is longer than the time length for representing that the power amplification circuit is in the short-circuit state signal;
the control circuit is configured to generate the control signal based on the fault signal and a drive signal.
According to an embodiment of the present invention, the short circuit detection circuit is connected to the power input terminal of the power amplification circuit or the power supply of the entire apparatus, and is configured to detect whether the power input terminal of the power amplification circuit or the power supply of the entire apparatus is under-voltage, and if so, adjust the level of the short circuit state signal from a first level indicating that no short circuit occurs to a second level indicating that a short circuit occurs.
According to an embodiment of the present invention, the short circuit detection circuit is connected to the output terminal of the power amplification circuit, and is configured to detect whether an under-voltage occurs at the output terminal of the power amplification circuit, and if so, adjust the level of the short circuit state signal from a first level indicating that no short circuit occurs to a second level indicating that a short circuit occurs.
According to an embodiment of the present invention, when the level of the short-circuit state signal changes from a first level indicating that no short circuit occurs to a second level indicating that a short circuit occurs, the fail-lock reset circuit is configured to adjust the level of the fail signal from a third level indicating that no short circuit occurs to a fourth level indicating that a short circuit occurs;
when the level of the short-circuit state signal is changed from the second level representing short circuit to the first level representing no short circuit, the fault locking reset circuit is configured to keep the level of the fault signal at the fourth level for a preset time period and then adjust the level of the fault signal to the third level.
According to one embodiment of the invention, when the fault signal is a signal indicating that the power amplification circuit is not shorted,
if the level of the driving signal is a fifth level, the control circuit is configured to control the power amplification circuit to conduct the electric connection between the output end of the power amplification circuit and the anode of the power supply of the power amplification circuit;
and if the level of the driving signal is a sixth level, the control circuit is configured to control the power amplification circuit to conduct the electric connection between the output end of the power amplification circuit and the negative electrode of the power supply.
According to one embodiment of the invention, the control signal generated by the control circuit comprises a first control component, a second control component, and a third control component, wherein,
when the fault signal is a signal representing that the power amplification circuit is not short-circuited, the power amplification circuit is configured to conduct the electric connection between the self output end and the self power supply positive electrode or the power supply negative electrode according to the first control component and the second control component, and disconnect the electric connection between the self output end and the reference ground according to the third control component;
when the fault signal is a signal representing that the power amplification circuit is short-circuited, the power amplification circuit is configured to conduct the electrical connection between the self output end and the reference ground according to the third control component, and disconnect the electrical connection between the self output end and the self power supply positive electrode and the power supply negative electrode.
According to an embodiment of the present invention, the power amplifying circuit includes: the power amplifier comprises an on-power amplification module, an off-power amplification module and a protection power amplification module, wherein the control signal input ends of the on-power amplification module, the off-power amplification module and the protection power amplification module are respectively and correspondingly connected with different ports of the control circuit, and the output ends are connected together to form the output end of the power amplification circuit,
the power-on amplification module is used for conducting or breaking the electrical connection between the power supply anode of the power amplification circuit power supply and the output end of the power amplification circuit power supply under the control of the first control component;
the turn-off power amplification module is used for conducting or breaking the electrical connection between the power supply cathode of the power supply of the power amplification circuit and the output end of the power supply under the control of the second control component;
and the protection power amplification module is used for conducting or breaking the electric connection between the reference ground and the output end of the protection power amplification module under the control of the third control component.
According to an embodiment of the present invention, when the level of the fault signal is a level indicating that the power amplification circuit is in an un-short-circuited state, the on/off states of the power amplification module and the power amplification module are opposite;
and when the level of the fault signal is a level representing that the power amplification circuit is in a short-circuit state, the on-power amplification module and the off-power amplification module are both in an off state.
According to an embodiment of the present invention, the power-on amplification module, the power-off amplification module and the protection power amplification module are all implemented by using MOS transistor circuits.
The driving device for the power semiconductor device can quickly and accurately identify whether the power amplification circuit is short-circuited or not, and performs corresponding protection action under the condition that the power amplification circuit is short-circuited. The driving device can effectively reduce the problems of overload failure and power supply overload failure of the power amplification stage caused by misoperation or power semiconductor device realization, thereby avoiding fault expansion and being beneficial to greatly improving the reliability of the power semiconductor device driving and the reliability of a system.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required in the description of the embodiments or the prior art:
fig. 1 is a block diagram of an application of a driving apparatus of a power semiconductor device according to an embodiment of the present invention;
fig. 2 is a schematic structural view of a driving apparatus of a power semiconductor device according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a short detection circuit for short detection according to one embodiment of the present invention;
FIG. 4 is a schematic diagram of a short detection by a short detection circuit according to another embodiment of the present invention;
FIG. 5 is a schematic diagram of the output signals of the fail-safe reset circuit, according to one embodiment of the present invention;
fig. 6 is a schematic configuration diagram of a driving apparatus of a power semiconductor device according to another embodiment of the present invention;
fig. 7 is a schematic diagram of a power amplification circuit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a connection relationship of a power-on amplification module according to an embodiment of the present invention;
fig. 9 is a schematic connection diagram of a power-off amplification module according to an embodiment of the present invention;
fig. 10 is a schematic diagram of a connection relationship of a protection power amplifying module according to an embodiment of the present invention;
fig. 11 is a timing diagram of a driving apparatus of a power semiconductor device according to an embodiment of the present invention;
fig. 12 is a timing diagram of a driving apparatus of a power semiconductor device according to another embodiment of the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention will be provided with reference to the drawings and examples, so that how to apply the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details or with other methods described herein.
In view of the problems in the prior art, the present invention provides a new driving apparatus for a power semiconductor device, which is capable of implementing short circuit detection and protection for an amplifier stage of the power semiconductor device. Fig. 1 shows an application block diagram of the driving device provided in the present embodiment, fig. 2 shows a schematic structural diagram of the driving device in the present embodiment, and the principle, structure and advantages of the driving device are further described below with reference to fig. 1 and fig. 2.
As shown in fig. 1, the driving apparatus 101 of the power semiconductor device provided in this embodiment is connected to the power semiconductor device 102, and power terminals thereof are respectively connected to a power positive electrode, a power negative electrode and a reference ground of an external power module, and the driving apparatus 101 is capable of performing power amplification on a received driving signal and transmitting the power-amplified driving signal to the power semiconductor device 102 connected thereto to control the operation of the power semiconductor device 102.
Specifically, as shown in fig. 2, in the present embodiment, the driving device 101 preferably includes: a power amplification circuit 201, a short detection circuit 202, a fail-
In this embodiment, the short circuit detection circuit 202 is preferably connected to the power input terminal of the power amplification circuit 201, and is capable of detecting whether the power input terminal of the power amplification circuit 201 is under-voltage. If undervoltage occurs, the short detection circuit 202 will adjust the level of the short status signal from a first level indicating that no short occurs to a second level indicating that a short occurs.
As shown in fig. 3, when the power amplifier circuit 201 is short-circuited, the voltage at the power input terminal is pulled low. Therefore, the short-circuit detection circuit 202 can determine whether the power amplifier 201 is under-voltage by determining whether the positive voltage at the power input of the power amplifier 201 is smaller than the predetermined positive voltage threshold and whether the negative voltage at the power input is greater than the predetermined negative voltage threshold. If the positive voltage at the power input terminal of the power amplifier circuit 201 is smaller than the preset positive voltage threshold or the negative voltage at the power input terminal is greater than the preset negative voltage threshold, the short-circuit detection circuit 202 will determine that the power input terminal of the power amplifier circuit 201 is under-voltage, so as to adjust the level of the short-circuit state signal from the high level (i.e. the first level) indicating that no short circuit occurs to the low level (i.e. the second level) indicating that a short circuit occurs.
Of course, in other embodiments of the present invention, the short circuit detection circuit 202 may also detect whether the power amplification circuit 201 is short-circuited in other reasonable manners according to actual needs, and the present invention is not limited thereto. For example, in an embodiment of the present invention, the short-circuit detection circuit 202 may further determine whether the power amplification circuit 201 is short-circuited by using the voltage at the output terminal of the power amplification circuit 201, and at this time, the short-circuit detection circuit 202 is connected to the output terminal of the power amplification circuit 201 and is capable of detecting whether the output terminal of the power amplification circuit 201 is under-voltage. If the output terminal of the power amplifier circuit 201 is under-voltage, the short-circuit detection circuit 202 will also adjust the level of the short-circuit status signal from a first level indicating that no short-circuit has occurred to a second level indicating that a short-circuit has occurred.
As shown in fig. 4, if the power semiconductor device 102 is a MOS transistor, the power amplified driving signal output by the power amplifying circuit 201 will be a square wave signal. When the power amplifier circuit 201 is short-circuited, the voltage at the output terminal thereof is limited to be the same as the reference ground GND _ REF. Therefore, the short-circuit detection circuit 202 can determine whether the power amplification circuit 201 is short-circuited by determining whether the voltage at the output terminal of the power amplification circuit 201 is between the preset positive voltage threshold and the preset negative voltage threshold. If the voltage at the output terminal of the power amplifier circuit 201 is continuously between the preset positive voltage threshold and the preset negative voltage threshold for a certain duration (the duration may be configured to be different reasonable values according to actual needs), the short-circuit detection circuit 202 may determine that the power amplifier circuit 201 is short-circuited at this time, so as to adjust the level of the short-circuit state signal from a high level (i.e., a first level) representing that no short circuit occurs to a low level (i.e., a second level) representing that a short circuit occurs.
In this embodiment, as shown in fig. 4, to ensure that the normal switching transient process will not be triggered by mistake, the short circuit detection circuit 202 preferably sets the fault detection filtering duration. In order to avoid the problem of false triggering during the normal transition period, in this embodiment, the fault detection filtering duration is preferably configured to be 3 times as long as the normal transition duration. Of course, in other embodiments of the present invention, according to the actual situation, the fault detection duration may also be configured to be other values far greater than the normal transition duration.
Note that fig. 4 shows waveforms in which a short circuit occurs in a low level state and a short circuit occurs in a high level state. In practical applications, the low-level short circuit and the high-level short circuit do not occur simultaneously, because once the short circuit occurs, the output voltage OUT of the power amplification stage is maintained at the reference ground GND _ REF due to the short circuit, and if the power amplification stage is not reset, the output voltage OUT of the power amplification stage is maintained at the reference ground GND _ REF due to the action of the protection power amplification circuit even if the short circuit is released.
Meanwhile, it should be noted that, in different embodiments of the present invention, specific values of the first level and the second level may be configured to be different reasonable values according to practical application situations, and the present invention does not limit the specific values of the first level and the second level. Meanwhile, in other embodiments of the present invention, depending on the control logic of the control circuit and the fail-safe reset circuit, the first level may be configured to be a relatively low level, and the second level may be configured to be a relatively high level, as long as different states of the power amplification circuit 201 can be reflected by the level transition.
As shown in fig. 2 again, in the present embodiment, the fail-
In this embodiment, when the fault signal is a signal indicating that the power amplification circuit is short-circuited, the control circuit is configured to control the power amplification circuit to change the level of the signal output by the power amplification circuit to zero.
Specifically, as shown in fig. 5, in the present embodiment, when the level of the short-circuit state signal transmitted by the short-circuit detection circuit 202 changes from a first level (e.g., high level) indicating that no short circuit occurs to a second level (e.g., low level) indicating that a short circuit occurs, the fail-
In addition, after the short-circuit fault of the power amplifying circuit 201 is eliminated, the level of the short-circuit state signal transmitted by the short-circuit detecting circuit 202 changes from the second level (e.g., low level) indicating that the short circuit occurs to the first level (e.g., high level) indicating that the short circuit does not occur, and then the fail-
It should be noted that, for the method for determining whether the power amplifier 201 is short-circuited by the power supply voltage as shown in fig. 2, if the apparatus does not include the fail-
As for the method of determining whether the power amplifier circuit 201 is short-circuited or not by the output voltage of the power amplifier stage, as shown in fig. 6, the apparatus may not include the fail-
It should be noted that, in different embodiments of the present invention, specific values of the third level, the fourth level and the preset time duration may be configured to be different reasonable values according to actual needs, and the present invention does not limit the specific values of the third level, the fourth level and the preset time duration.
Of course, in other embodiments of the present invention, the apparatus may also determine whether the power amplifier circuit 201 is short-circuited by combining the voltages of the power input terminal and the output terminal of the power amplifier circuit 201.
As shown in fig. 2 again, in this embodiment, the
In this embodiment, when the fault signal transmitted by the fault lock reset
Specifically, in the present embodiment, the control signal generated by the
When the fault signal is a signal indicating that the power amplification circuit 201 is short-circuited, the power amplification circuit 201 is configured to turn on the electrical connection between the output terminal of the power amplification circuit and the reference ground according to the third control component transmitted by the
Specifically, as shown in fig. 7, in the present embodiment, the power amplification circuit includes: a power-on amplification module 201a, a power-off amplification module 201b, and a protection amplification module 201 c. The input ends of control signals of the on-power amplifying module 201a, the off-power amplifying module 201b and the protection power amplifying module 201c are respectively connected to different ports of the
The switching-on power amplification module 201a is used for switching on or off the electrical connection between the power input end and the output end of the switching-on power amplification module under the control of the first control component; the turn-off power amplification module 201b is used for turning on or off the electrical connection between the power input end and the output end of the turn-off power amplification module under the control of the second control component; the protection power amplifying module 201c is configured to turn on or off the electrical connection between the power input terminal and the output terminal under the control of the third control component.
For example, the power input terminals of the on-power amplification module 201a and the off-power amplification module 201b may be connected to the positive power supply terminal and the negative power supply terminal of the power amplification circuit power supply, respectively, while the power input terminal of the protection power amplification module 201c is connected to the reference ground.
The power-on amplification module 201a switches on or off the electrical connection between the output terminal and the power input terminal under the control of the first control component, and further switches on or off the electrical connection between the output terminal and the positive electrode of the power supply of the power amplification circuit.
The turn-off power amplification module 201b turns on or off the electrical connection between the output terminal of itself and the power input terminal of itself under the control of the second control component, and further turns on or off the electrical connection between the output terminal of itself and the negative electrode of the power supply of the power amplification circuit.
The protection power amplification module 201c switches on or off the electrical connection between its output terminal and its power input terminal under the control of the third control component, and further switches on or off the electrical connection between its output terminal and the reference ground.
In this embodiment, when the level of the fault signal output by the fail-
When the level of the fault signal output by the fail-
In this embodiment, the power-on amplification module 201a, the power-off amplification module 201b, and the protection power amplification module 201c are all implemented by MOS transistor circuits. For example, as shown in fig. 8, the turn-on power amplifying module 201a may be implemented by using a P-channel MOS transistor. The gate G of the P-channel MOS transistor is connected to the
As shown in fig. 9, the turn-off power amplifying module 201b may be implemented by using an N-channel MOS transistor. The gate G of the N-channel MOS transistor is connected to the
As shown in fig. 10, the protection power amplifying module 201c may also be implemented by using an N-channel MOS transistor. The gate G of the N-channel MOS transistor is connected to the
Of course, in other embodiments of the present invention, the power amplification module 201a, the power amplification module 201b and/or the protection power amplification module 201c may be implemented by using other reasonable devices according to actual needs, and the present invention is not limited thereto.
In order to more clearly illustrate the operation principle of the driving apparatus provided in the present embodiment, the following description will be further made by taking the timing chart shown in fig. 10 as an example.
As shown in fig. 11, in the interval t1-t2, the fault signal is a high level signal indicating that the power amplification circuit 201 is not short-circuited, and the driving signal is at a high level (e.g., +15V), which means that the driving signal after power amplification output by the entire driving apparatus should also be a high level signal (e.g., + 15V). The first control component is a low level signal (e.g., 0V), i.e., the level outputted to the gate G of the P-channel MOS transistor in the power amplification module 201a is a low level signal (e.g., 0V). Since the source S of the P-channel MOS transistor in the power amplification module 201a is connected to the positive power supply of the power amplification circuit, the voltage (for example, -15V) between the gate G and the source S of the P-channel MOS transistor reaches its working voltage, at this time, the electrical connection between the source S and the drain D of the P-channel MOS transistor is turned on, and thus, the level of the output signal of the power amplification module 201a is the level of the positive power supply of the power amplification circuit.
In the interval t1-t2, the second control component is also a low level signal (e.g., -15V), i.e., the level outputted to the gate G of the N-channel MOS transistor in the power amplification block 201b is a low level signal (e.g., -15V). Since the source S of the N-channel MOS transistor in the power amplification module 201a is connected to the negative power supply (e.g., -15V) of the power amplification circuit, the voltage (e.g., 0V) between the gate G and the source S of the N-channel MOS transistor is kept below the turn-on threshold, and the electrical connection between the source S and the drain D of the N-channel MOS transistor is kept disconnected.
In the interval t1-t2, the third control component is also a low level signal (e.g., 0V), i.e., the level output to the gate G of the N-channel MOS transistor in the protection power amplifying module 201c is a low level signal (e.g., 0V). Since the source S of the N-channel MOS transistor in the turn-off power amplification module 201a is connected to the reference ground, the voltage (e.g. 0V) between the gate G and the source S of the N-channel MOS transistor is kept below the turn-on threshold, and the electrical connection between the source S and the drain D of the N-channel MOS transistor is kept disconnected.
In summary, it can be seen that, in the interval t1-t2, the level of the output signal of the power amplifier circuit 201 is the level of the positive power supply of the power amplifier circuit (e.g., + 15V).
Similarly, as shown in fig. 11, in the interval t2-t3, the fault signal is at a high level indicating that the power amplifier circuit 201 is not short-circuited, and the driving signal is at a low level (e.g., 0V), which means that the driving signal after power amplification output by the entire driving apparatus should also be at a low level (e.g., -15V).
In the interval t2-t3, the first control component is a high level signal (e.g., +15V), i.e., the level output to the gate G of the P-channel MOS transistor in the power amplification module 201a is a high level signal (e.g., + 15V). Since the source S of the P-channel MOS transistor in the power amplification module 201a is connected to the positive power supply (e.g., +15V) of the power amplification circuit, the voltage (e.g., 0V) between the gate G and the source S of the P-channel MOS transistor cannot reach the operating voltage, and the source S and the drain D of the P-channel MOS transistor are electrically disconnected.
In the interval t2-t3, the second control component is also a high level signal (e.g., 0V), i.e., the level outputted to the gate G of the N-channel MOS transistor in the power amplification module 201b is a high level signal (e.g., 0V). Since the source S of the N-channel MOS transistor in the power amplification module 201a is connected to the negative power supply (e.g., -15V) of the power amplification circuit, the voltage (e.g., +15V) between the gate G and the source S of the N-channel MOS transistor will reach its operating voltage, the electrical connection between the source S and the drain D of the N-channel MOS transistor will be turned on, and thus the level of the output signal of the power amplification module 201b is turned off to the negative power supply (e.g., -15V) of the power amplification circuit.
In the interval t2-t3, the third control component is still not a low level signal (e.g., 0V), i.e., the level output to the gate G of the N-channel MOS transistor in the protection power amplifying module 201c is a low level signal (e.g., 0V). Since the source S of the N-channel MOS transistor in the turn-off power amplification module 201a is connected to the reference ground, the voltage between the gate G and the source S of the N-channel MOS transistor cannot reach the operating voltage, and the electrical connection between the source S and the drain D of the N-channel MOS transistor is kept disconnected.
In summary, it can be seen that, in the interval t2-t3, the level of the output signal of the power amplifier circuit 201 is the level of the negative electrode of the power supply of the power amplifier circuit (e.g., -15V).
In the interval t2-t3, the states of the control components and the corresponding power amplifying modules are the same as those in the interval t1-t2, and are not described herein again.
In the interval t3-t4, since the fault signal is a low level signal (e.g., 0V) indicating that the power amplifier circuit 201 is short-circuited, it is necessary to perform output short-circuit protection at this time. The first control component outputted by the control circuit is a high-level signal, i.e. the level outputted to the gate G of the P-channel MOS transistor in the turn-on power amplifying module 201a is a high-level signal (e.g., + 15V). Since the source S of the P-channel MOS transistor in the power amplification module 201a is connected to the positive power supply (e.g., +15V) of the power amplification circuit, the voltage (e.g., 0V) between the gate G and the source S of the P-channel MOS transistor cannot reach the operating voltage, and the source S and the drain D of the P-channel MOS transistor are electrically disconnected.
In the interval t3-t4, the second control component is a low level signal (e.g., -15V), i.e., the level outputted to the gate G of the N-channel MOS transistor in the power amplification module 201b is a low level signal (e.g., -15V). Since the source S of the N-channel MOS transistor in the power amplification module 201a is connected to the negative power supply (e.g., -15V) of the power amplification circuit, the voltage between the gate G and the source S of the N-channel MOS transistor cannot reach the operating voltage thereof, and the electrical connection between the source S and the drain D of the N-channel MOS transistor is kept disconnected.
In the interval t3-t4, the third control component is a high level signal (e.g., +15V), i.e., the level output to the gate G of the N-channel MOS transistor in the protection power amplifying module 201c is a high level signal (e.g., + 15V). Since the source S of the N-channel MOS transistor in the turn-off power amplification module 201a is connected to the reference ground, the voltage between the gate G and the source S of the N-channel MOS transistor will reach the operating voltage thereof, the electrical connection between the source S and the drain D of the N-channel MOS transistor will be conducted, and thus the electrical connection between the output terminal of the entire power amplification circuit and the reference ground will be conducted.
In other embodiments of the present invention, as shown in fig. 6, a timing chart of the method for determining whether a short circuit occurs by detecting the output voltage of the power amplifier stage is shown in fig. 12, which has a similar principle to that shown in fig. 11, and therefore, the details of this part are not repeated herein.
When the output end of the power amplifying circuit is electrically connected with the reference ground, no voltage exists between the power amplifying circuit and the reference ground, so that the power amplifying circuit does not have power consumption, the failure of the power amplifying stage caused by overhigh power consumption of the power amplifying stage can be avoided, and the dangers of power overload and fault expansion caused by short circuit of the power amplifying circuit can be eliminated.
As can be seen from the above description, the driving apparatus for a power semiconductor device provided by the present invention can quickly and accurately identify whether a short circuit occurs in a power amplifying circuit, and perform a corresponding protection action in case of the short circuit occurring in the power amplifying circuit. The driving device can effectively reduce the problems of overload failure and power supply overload failure of the power amplification stage caused by misoperation or power semiconductor device realization, thereby avoiding fault expansion and being beneficial to greatly improving the reliability of the power semiconductor device driving and the reliability of a system.
It is to be understood that the disclosed embodiments of the invention are not limited to the particular structures or process steps disclosed herein, but extend to equivalents thereof as would be understood by those skilled in the relevant art. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase "one embodiment" or "an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment.
While the above examples are illustrative of the principles of the present invention in one or more applications, it will be apparent to those of ordinary skill in the art that various changes in form, usage and details of implementation can be made without departing from the principles and concepts of the invention. Accordingly, the invention is defined by the appended claims.
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