阅读说明：本技术 形成含氮化钒的层的方法及包含其的结构 (Method of forming vanadium nitride-containing layers and structures including the same ) 是由 P.H.雅拉 W.克纳彭 D.皮尔鲁克斯 B.琼布洛德 P.阿努 R-J.常 谢琦 G 于 2020-12-07 设计创作，主要内容包括：本公开涉及形成含氮化钒的层的方法。所述方法包括在反应器的反应腔室内提供基板以及向基板的表面上沉积含氮化钒的层,其中沉积工艺包括向反应腔室提供钒前体以及向反应腔室提供氮前体。本公开还涉及包含含氮化钒的层的结构和器件。(The present disclosure relates to methods of forming vanadium nitride-containing layers. The method includes providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process includes providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The disclosure also relates to structures and devices comprising the vanadium nitride-containing layer.)

1. A method of forming a vanadium nitride-containing layer, the method comprising

-providing a substrate within a reaction chamber of a reactor; and

-depositing a vanadium nitride containing layer onto the surface of the substrate,

wherein the deposition process comprises:

-providing a vanadium precursor to the reaction chamber; and

-providing a nitrogen precursor to the reaction chamber.

2. The method of claim 1, wherein the deposition process is a cyclical deposition process.

3. The method of claim 1, wherein the reaction chamber is purged between providing the vanadium precursor to the reaction chamber and providing the nitrogen precursor to the reaction chamber.

4. The method of claim 1, wherein the nitrogen precursor is selected from ammonia (NH)₃) Hydrazine (N)₂H₄) And one or more of other compounds comprising or consisting of nitrogen and hydrogen.

5. The method of claim 1, wherein the nitrogen precursor does not include diatomic nitrogen.

6. The method of claim 1, wherein the surface of the substrate comprises a first surface material and a second surface material, and wherein the cyclical deposition process results in the vanadium nitride-containing layer being selectively deposited on the first surface material relative to the second surface material.

7. The method of claim 6, wherein the selectivity of the deposition is at least 50%, or at least 80%, or at least 90%.

8. The method of claim 6, wherein the selectivity of the deposition is adjusted by etch-back during the cyclical deposition.

9. The method of claim 6, wherein the first surface material comprises a metal, metallic, metal oxide, or dielectric surface.

10. The method of claim 1, wherein the vanadium nitride-containing layer is a seed layer.

11. The method of claim 10, wherein the seed layer is formed from TiCl using a cyclical deposition process₄Precursor and NH₃The precursors are deposited prior to deposition of the titanium nitride.

12. The method of claim 10, wherein the seed layer has a thickness of 0.6nm or less.

13. The method of claim 10, wherein the seed layer is non-continuous.

14. The method of claim 1, wherein the deposition process comprises annealing in the presence of a silane compound.

15. The method of claim 14, wherein the silane compound is SiH₄。

16. A structure comprising a vanadium nitride-containing layer produced according to the method of claim 1.

17. A device comprising a vanadium nitride-containing layer produced according to the method of claim 1.

18. A method of forming a structure, the method comprising

-providing a substrate within a reaction chamber of a reactor; and

-depositing a vanadium nitride containing layer onto the surface of the substrate using a cyclic deposition process,

wherein the deposition process comprises:

-providing a vanadium precursor to the reaction chamber; and

-providing a nitrogen precursor to the reaction chamber.

19. A structure produced by the method of claim 18.

20. The structure of claim 19, wherein the structure is a workfunction metal in a metal gate, a pad/barrier, a metal electrode in DRAM, logic, or 3DNAND, a p-metal gate for logic, or a dipole (p) tuning layer for logic or for other applications.

21. A deposition apparatus, comprising:

-one or more reaction chambers;

-a first precursor gas source comprising a vanadium precursor;

-a second precursor gas source comprising a nitrogen precursor;

-a source of exhaust gas; and

-a controller for controlling the operation of the electronic device,

wherein the controller is configured to control gas flow into at least one of the one or more reaction chambers to form a vanadium nitride-containing layer overlying a surface of a substrate using a thermal deposition process.

Technical Field

The present disclosure relates generally to methods and systems suitable for producing thin films. More particularly, the present disclosure relates to methods and systems for producing vanadium nitride-containing layers by deposition processes and structures containing the same.

Background

The scaling of semiconductor devices, such as, for example, Complementary Metal Oxide Semiconductor (CMOS) devices, has led to significant improvements in integrated circuit speed and density. However, conventional device scaling techniques face significant challenges for future technology nodes.

For example, one challenge is to find suitable conductive materials for use as gate electrodes in CMOS devices. CMOS devices conventionally use n-type doped polysilicon as the gate electrode material. Doped polysilicon, however, may not be an ideal gate electrode material for advanced node applications. Although doped polysilicon is conductive, there may still be a surface area that can be depleted of carriers under bias conditions. This region may exhibit additional gate insulator thickness, commonly referred to as gate depletion, and may affect the equivalent oxide thickness. Although the gate depletion region may be thin, on the order of a few angstromsBut in advanced node applications the gate depletion region may become apparent as the gate oxide thickness decreases. As yet another example, polysilicon does not have an ideal effective work function (eff) for both NMOS and PMOS devices. To overcome the undesirable effective work function of doped polysilicon, a threshold voltage adjustment implant may be utilized. However, as device geometries decrease in advanced node applications, the threshold voltage adjustment implant process may become increasingly complex and impractical.

To overcome the problems associated with doped polysilicon gate electrodes, the polysilicon gate material may be replaced with alternative materials such as, for example, metals such as a titanium nitride layer. The titanium nitride layer may provide a more desirable effective work function for CMOS applications. However, in some cases where a higher work function value is desired than that obtained with a titanium nitride layer, for example, in the PMOS region of a CMOS device, improved materials are needed. Such materials may be suitable for electrode/capacitor applications, such as for gate electrodes, threshold voltage tuning, p-dipole shifters, or Dynamic Random Access Memory (DRAM) applications.

Any discussion introduced in this disclosure, including discussions of the problems and solutions set forth in this section, is introduced only for the purpose of providing a context for the present disclosure. Such discussion is not to be construed as an admission that any or all of the information is known or otherwise constitutes prior art at the time of making the present invention.

Disclosure of Invention

This summary may introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

Various embodiments of the present disclosure relate to methods of forming vanadium nitride-containing layers, structures and devices formed using such methods, and apparatus for performing the methods and/or for forming the structures and/or devices. While the manner in which various embodiments of the present disclosure address the shortcomings of existing methods and systems will be discussed in greater detail below, in general, various embodiments of the present disclosure provide improved methods of forming vanadium nitride-containing layers having relatively high work function values. Additionally or alternatively, one or more vanadium precursors may be used to form the vanadium nitride-containing layer. In addition, the exemplary vanadium nitride-containing layer may be formed using a thermal cycling deposition process. It is also possible that plasma or plasma activated species may be used to form them.

In the present disclosure, "gas" may include materials that are gases at Normal Temperature and Pressure (NTP), vaporized solids, and/or vaporized liquids, depending on the context, and may consist of a single gas or a mixture of gases. Gases other than process gases, i.e., gases that are not introduced through the gas distribution assembly, other gas distribution devices, etc., may be used, for example, to seal the reaction space and may include a sealing gas such as a noble gas.

The term "precursor" may refer to a compound that participates in a chemical reaction that produces another compound. The terms reactant and precursor are used interchangeably. The term "inert gas" may refer to a gas that does not participate in a chemical reaction and/or does not become part of a layer to an appreciable extent. Exemplary inert gases include He and Ar and any combination thereof. In some cases, molecular nitrogen and/or hydrogen may be an inert gas.

As used herein, the term "purge" may refer to a procedure in which an inert or substantially inert gas is provided to a reactor chamber between two pulses of gas that react with each other. For example, a purge or purging action, such as the use of nitrogen, may be provided between the pulses of the two precursors to avoid or at least minimize gas phase interactions between the two precursors. It should be understood that purging may be performed either temporally or spatially, or both. For example, in the case of a temporal purge, the purge steps may be used, for example, in a temporal sequence of providing the first precursor to the reactor chamber, providing the purge gas to the reactor chamber, and providing the second precursor to the reactor chamber, wherein the substrate on which the layer is deposited does not move. For example, in the case of a space purge, the purge step may take the form of: the substrate is moved from a first position where a first precursor is continuously supplied to a second position where a second precursor is continuously supplied through a purge gas curtain.

As used herein, the term "substrate" may refer to any underlying material or materials from which structures, devices, circuits, or layers may be formed or on which structures, devices, circuits, or layers may be formed. The substrate may comprise a bulk material such as silicon (e.g., single crystal silicon), other group IV materials such as germanium, or other semiconductor materials such as group II-VI or group III-V semiconductor materials, and may include one or more layers stacked above or below the bulk material. Further, the substrate may include various features, such as recesses, protrusions, etc., formed within or on at least a portion of the layers of the substrate. For example, the substrate may include a bulk semiconductor material and a layer of insulating or dielectric material overlying at least a portion of the bulk semiconductor material.

As used herein, the terms "film" and/or "layer" may refer to any continuous or non-continuous structure and material, such as a material deposited by the methods disclosed herein. For example, the film and/or layer may comprise a two-dimensional material, a three-dimensional material, a nanoparticle, or even a partial or complete molecular layer, or a partial or complete atomic layer, or clusters of atoms and/or molecules. A "film" or "layer" may comprise a material or layer having pinholes, which may be at least partially continuous. The seed layer may be a discontinuous layer for increasing the nucleation rate of another material. However, the seed layer may also be substantially or completely continuous.

As used herein, a "structure" may be or include a substrate as described herein. The structure may include one or more layers overlying a substrate, such as one or more layers formed according to the methods of the present disclosure.

The term cyclic deposition process or periodic deposition process may refer to sequential introduction of precursors (and/or reactants) in a reaction chamber to deposit a layer over a substrate and includes processing techniques such as Atomic Layer Deposition (ALD), cyclic chemical vapor deposition (cyclic CVD), and hybrid cyclic deposition processes including ALD components and cyclic CVD components. The process may include a purge step between the introduction of the precursors.

The term "atomic layer deposition" may refer to a vapor deposition process in which a deposition cycle, typically a plurality of consecutive deposition cycles, is performed in a process chamber. When performed using alternating pulses of precursor/reactive gases and purge gases (e.g., inert carrier gases), the term "atomic layer deposition" as used herein is also intended to include processes specified by related terms such as chemical vapor atomic layer deposition.

Typically, for an ALD process, during each cycle, a precursor is introduced to the reaction chamber and chemisorbed to a deposition surface (e.g., a substrate surface, which may include previously deposited material from a previous ALD cycle or other material), forming about a monolayer or sub-monolayer of material that is not readily reactive with the additional precursor (i.e., a self-limiting reaction). Thereafter, in some cases, a reactant (e.g., another precursor or a reactive gas) may be subsequently introduced into the process chamber for converting the chemisorbed precursor to the desired material on the deposition surface. The reactant may be capable of further reaction with the precursor. During one or more cycles, for example during each step of each cycle, a purge step may be employed to remove any excess precursor from the process chamber and/or any excess reactant and/or reaction byproducts from the reaction chamber.

As used herein, a "vanadium nitride-containing layer" may be a layer of material that may be represented by a chemical formula that includes vanadium and nitrogen. The vanadium nitride layer may include additional elements such as oxygen (e.g., a vanadium oxynitride layer) and the like. In some embodiments, the vanadium nitride-containing layer may contain a substantial proportion of other elements than vanadium and nitrogen. In some embodiments, the vanadium nitride-containing layer comprises Vanadium Nitride (VN). In some embodiments, the vanadium nitride-containing layer may comprise, for example, 80, 90, 95, or 99 atomic percent (at%) VN. In some embodiments, the vanadium nitride-containing layer may consist essentially of vanadium nitride. In some embodiments, the vanadium nitride-containing layer may be comprised of vanadium nitride. The layer comprised of vanadium nitride may contain acceptable amounts of impurities such as oxygen, carbon, chlorine or other halogens and/or hydrogen that may be derived from one or more precursors used to deposit the vanadium nitride-containing layer.

In some embodiments, the vanadium content of the vanadium nitride-containing layer is at least 1.0 atomic percent to at most 99.0 atomic percent, or at least 3.0 atomic percent to at most 97.0 atomic percent, or at least 5.0 atomic percent to at most 95.0 atomic percent, or at least 10.0 atomic percent to at most 90.0 atomic percent, or at least 20.0 atomic percent to at most 80.0 atomic percent, or at least 30.0 atomic percent to at most 70.0 atomic percent, or at least 40.0 atomic percent to at most 60.0 atomic percent.

In some embodiments, the vanadium nitride-containing layer has a nitrogen content of at least 1.0 atomic percent to at most 99.0 atomic percent, or at least 3.0 atomic percent to at most 97.0 atomic percent, or at least 5.0 atomic percent to at most 95.0 atomic percent, or at least 10.0 atomic percent to at most 90.0 atomic percent, or at least 20.0 atomic percent to at most 80.0 atomic percent, or at least 30.0 atomic percent to at most 70.0 atomic percent, or at least 40.0 atomic percent to at most 60.0 atomic percent.

As used herein, a vanadium precursor includes a gas or material that can become gaseous and which can be represented by a chemical formula that includes vanadium, such as one or more of vanadium halides, alkyl amino vanadium compounds, and vanadium amidinate compounds. The vanadium precursor may be an organic or inorganic molecule.

The term nitrogen precursor may refer to a gas or a material that may become gaseous and which may be represented by a chemical formula that includes nitrogen. In some cases, the chemical formula includes nitrogen and hydrogen. In some cases, the nitrogen precursor does not include diatomic nitrogen.

If the amount of material deposited per surface area or per volume (e.g., at/cm) on the first surface material²Or at/cm³) Greater than the amount of material deposited per surface area or per volume on the second surface material, the deposition is generally defined as selective. The amount of material deposited on the surface material can be determined by measuring the thickness of each layer. In some cases, the thickness may not be measured because the film is discontinuous. In some cases, selectivity can be determined by measuring atoms deposited per surface area or per volume. As mentioned above, selectivity may be expressed as a ratio of material formed on the first surface material to the amount of material formed on the first and second surface materials in total.

The deposition selectivity on the first surface material relative to the second surface material can be given as a percentage, calculated as follows: [ (deposition on first surface material) - (deposition on second surface material) ]/(deposition on first surface material). Deposition can be measured in any of a variety of ways. For example, deposition may be given as a measured thickness of the material deposited, or a measured amount of the material that may be deposited. In embodiments described herein, selective deposition of a vanadium nitride-containing layer on the first surface material relative to the second surface material may be performed.

The selectivity is preferably more than about 70%, more than about 80%, more preferably more than 90%, even more preferably more than 95%, and most preferably about 100%. In some cases, selectivities in excess of 80% are acceptable for some applications. In some cases, selectivities in excess of 50% are acceptable for some applications.

Further, in the present disclosure, any two numbers of a variable may constitute an operable range for the variable, and any range indicated may include or exclude endpoints. Additionally, any variable values indicated (whether they are indicated by "about" or not) may refer to exact or approximate values and include equivalent values, and may refer to average, median, representative, multiple values, and the like. Further, in this disclosure, in some embodiments, the terms "comprising," consisting of … …, "and" having "independently mean" typically or broadly comprising, "" including, "" consisting essentially of … …, "or" consisting of … …. In the present disclosure, in some embodiments, any defined meaning does not necessarily exclude ordinary and customary meanings.

Drawings

The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments and together with the description help to explain the principles of the disclosure. In the attached drawings

Fig. 1 illustrates a method according to the present disclosure.

Fig. 2 illustrates one embodiment of a method according to the present disclosure.

Fig. 3 depicts a structure comprising a vanadium nitride-containing layer according to the present disclosure.

Fig. 4 depicts another exemplary structure according to the present disclosure.

Fig. 5 illustrates yet another exemplary structure according to the present disclosure.

Fig. 6 presents in a schematic way a deposition apparatus according to the present disclosure.

Detailed Description

The description of the exemplary embodiments of the methods, structures, devices, and apparatus provided below is merely exemplary and is intended for illustrative purposes only. The following description is not intended to limit the scope of the present disclosure or the claims. Moreover, recitation of multiple embodiments having stated features is not intended to exclude other embodiments having additional features, or other embodiments incorporating different combinations of the stated features. For example, various embodiments are set forth as exemplary embodiments and may be recited in the dependent claims. Unless otherwise specified, the exemplary embodiments or their constituent parts may be combined or may be applied separately from each other.

The present disclosure relates to a method of forming a vanadium nitride-containing layer. The method includes providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate. In a method according to the present disclosure, a deposition process includes providing (e.g., sequentially and separately) a vanadium precursor to a reaction chamber and a nitrogen precursor to the reaction chamber.

Methods according to the present disclosure may be used to produce structures comprising vanadium nitride-containing layers and devices comprising vanadium nitride-containing layers. The vanadium nitride-containing layers and structures according to the present disclosure can be used as workfunction metals in metal gates, pads/barriers, metal electrodes (DRAM, logic, 3DNAND), and p-metal gates for logic, and in addition, as dipole (p) tuning layers for logic and other applications.

The process according to the present disclosure can be carried out in small batches in single wafer reactors or space reactors in a batch processing tool such as a vertical furnace.

In one embodiment, the vanadium precursor may comprise an organic compound. In another embodiment, the vanadium precursor may comprise an inorganic compound.

The organo-vanadium precursor may comprise one or more of the following: an alkylaminovanadate precursor, a dialkylaminodovanadate precursor, a vanadium amidinate precursor, a vanadium alkoxide precursor, a vanadyl alkoxide precursor, a vanadium beta-diketonate precursor, and a cyclopentadienyl vanadium precursor.

The following abbreviations should be used throughout this disclosure: me represents methyl (CH)₃) Et represents ethyl (C)₂H₅)。ⁿPr represents a n-propyl group,ⁱpr represents an isopropyl group, and the compound has the general formula of,ⁿbu represents a normal butyl group,^tbu represents tertA butyl group,ⁿpn represents an n-pentyl group,^tpn represents a tertiary amyl group. AMD stands for acetamidinyl and FMD stands for formamidyl.

An example of an alkyl amino vanadium precursor is V (NMe)₂)₄、V(NEt₂)₄And V (NEtMe)₄. Exemplary dialkylaminoavanadium precursors include V (NMe)₂)₄、V(NEt₂)₄And V (NEtMe)₄(named tetrakis (dimethylamino) vanadium (IV), tetrakis (diethylamino) vanadium (IV) and tetrakis (ethylmethylamino) vanadium (IV), respectively).

Examples of vanadium amidinate precursors are V (V), (V) and (V) areⁱPrAMD)₃、V(^tBuAMD)₃、V(ⁱPrFMD)₃And V: (^tBuFMD)₃. Examples of vanadium alkoxide precursors are V (OMe)₄、V(OEt)₄、V(OⁿPr)₄、V(OⁱPr)₄、V(OⁱBu)₄、V(O^tBu)₄、V(O^tPn)₄And V (O)ⁿPn)₄. Further, examples of vanadyl alkoxide precursors are VO (OMe)₃、VO(OEt)₃、VO(OⁿPr)₃、VO(OⁱPr)₃、VO(OⁱBu)₃、VO(O^tBu)₃、VO(O^tPn)₃And VO (O)ⁿPn)₃。

Examples of precursors of vanadium beta-diketonates are V (acac)₃(tris- (2, 4-pentanedionate) vanadium (IV)), V (thd)₃(tris- (2,2,6, 6-tetramethyl-3, 5-heptanedionato) vanadium (IV)), V (hfac)₃(tris- (1,1,1,5,5, 5-hexafluoro-2, 4-pentanedionato) vanadium (IV)), VO (acac)₂(oxobis (2, 4-pentanedionate) vanadium (IV)), VO (thd)₂(oxybis (2,2,6, 6-tetramethyl-3, 5-heptanedionato) vanadium (IV)) and VO (hfac)₂(oxobis (1,1,1,5,5, 5-hexafluoro-2, 4-pentanedionate) vanadium (IV)).

The cyclopentadienyl vanadium precursor includes VCp₂Cl₂、VCp₂、VCp₂(CO)₄(named as bis (cyclopentadienyl) vanadium (IV) dichloride, bis (cyclopentadienyl) vanadium (II) and cyclopentadienyl vanadium tetracarbonyl), respectively). Additional exemplary cyclopentadienyl vanadium compoundsIncluded are variations of these compounds wherein Cp is unsubstituted or bears one or more alkyl groups, such as MeCp, EtCp, iPrCp, and the like.

Examples of inorganic vanadium precursors are vanadium halide precursors and vanadium oxyhalide precursors. The vanadium halide precursor may be selected from vanadium fluoride, vanadium chloride, vanadium bromide, vanadium iodide, and the like. The vanadium oxyhalide may be selected from the group consisting of vanadium oxyfluoride, vanadium oxychloride, vanadium oxybromide, vanadium oxyiodide, and the like.

Further, exemplary vanadium precursors can include "heterogeneous" or mixed ligand precursors, wherein exemplary ligand types can be attached to the vanadium atom in any combination of any achievable number (typically 3-5 ligands, with the possible exceptions). Examples may include V (Cl)_x(NMe)_4-xAnd V (Cl)_x(iPrAMD)_x。

The nitrogen precursor may be selected from ammonia (NH)₃) Hydrazine (N)₂H₄) And one or more of other compounds comprising or consisting of nitrogen and hydrogen. For example, a mixture of nitrogen and hydrogen may be used. In one embodiment, the nitrogen precursor does not include diatomic nitrogen, i.e., the nitrogen precursor is a non-diatomic precursor.

The use of vanadium halide precursors may be advantageous over processes using other precursors, such as metal organic vanadium precursors, because vanadium halide precursors may be relatively inexpensive, may produce vanadium layers with lower concentrations of impurities, such as carbon, and/or processes using such precursors may be more controllable than processes using metal organic or other vanadium precursors. In addition, such reactants can be used without plasma assistance to form excited species. In addition, processes using vanadium halides may be more easily scalable than methods using organometallic vanadium precursors.

In one embodiment, the deposition process comprises a continuous flow of at least one precursor. In another embodiment, the flow of both precursors may be continuous. In another embodiment, the flows of the two precursors may be at least partially simultaneous.

The cyclical deposition process can include one or more of an atomic layer deposition process and a cyclical chemical vapor deposition process. The cyclical deposition process may include a thermal process, i.e., a process that does not use plasma activated species. In some cases, the reactant may be exposed to a plasma to form an activated reactant species. In some embodiments, the cyclical deposition process may include only one or more thermal processes.

In one embodiment, the temperature of the substrate within the reaction chamber during the cyclical deposition process is between about 20 ℃ and about 800 ℃. For example, the cyclical deposition process may include heating the substrate to a desired deposition temperature within the reaction chamber. The temperature may be below 800 ℃. For example, heating the substrate to the deposition temperature may include heating the substrate to a temperature between about 20 ℃ and about 800 ℃. In some embodiments, the substrate temperature may be between about 100 ℃ to about 400 ℃, or between about 200 ℃ to about 500 ℃, such as 250 ℃, 300 ℃, or 450 ℃, or between about 20 ℃ to about 200 ℃.

In the case of a thermal cycling deposition process, the duration of providing the precursor to the reaction chamber may be relatively long to allow the precursor to react with another precursor or derivative thereof. For example, the duration may be greater than or equal to 5 seconds or greater than or equal to 10 seconds or between about 5 seconds and 10 seconds. In one embodiment, the nitrogen precursor is provided to the reaction chamber for a duration of greater than or equal to 5 seconds, or greater than or equal to 10 seconds, or between about 5 seconds and about 10 seconds.

In addition to controlling the temperature of the substrate, the pressure within the reaction chamber may also be regulated. For example, in some embodiments of the present disclosure, the pressure within the reaction chamber may be less than 760 torr or between 0.2 torr and 760 torr, 1 torr and 100 torr, or 1 torr and 10 torr.

In one embodiment, the surface of the substrate comprises a first surface material and a second surface material, and wherein the cyclical deposition process results in the vanadium nitride-containing layer being selectively deposited on the first surface material relative to the second surface material.

In some embodiments, the vanadium nitride-containing layer is selectively deposited on the first metal or metallic surface of the substrate relative to the second dielectric surface of the substrate. In some embodiments, the second surface comprises-OH groups, such as based on SiO₂Of (2) is provided. In some embodiments, vanadium nitride is relative toIn a second different SiO₂The surface is selectively deposited on a first metallic, metal oxide or dielectric surface of the substrate.

Unless otherwise indicated, if a surface is referred to herein as a metal surface, it can be a metal surface or a metal-containing surface. In some embodiments, the metallic or metallic surface may comprise a metal, such as an elemental metal, a metal nitride, a metal silicide, a metal carbide, and/or mixtures thereof. In some embodiments, the metal or metallic surface may comprise a surface oxidation, such as a surface layer of a native metal oxide. In some embodiments, the metal or metallic material of the metal or metallic surface is electrically conductive with or without surface oxidation. In some embodiments, the metallic or metallic surface comprises silicon, such as H-terminated silicon. In some embodiments, the metal or metallic surface is a silicon surface, such as an H-terminated silicon surface. In some embodiments, the metal or metallic surface is not a silicon surface, such as an H-terminated silicon surface. The first metal or metallic surface may also be referred to herein as the first surface.

In some embodiments, the metal or metallic surface comprises one or more transition metals. In some embodiments, the metal or metallic surface comprises aluminum. In some embodiments, the metal or metallic surface comprises one or more of Al, Cu, Co, Ni, W. In some embodiments, the metallic surface comprises titanium nitride. In some embodiments, the metal or metallic surface comprises one or more noble metals such as Ru. In some embodiments, the metal or metallic surface comprises a conductive metal oxide, such as a noble metal oxide, e.g., RuO₂。

In some embodiments, the material is selectively deposited on a first metal surface comprising a metal oxide surface. The metal oxide surface may be, for example, WO_x、HfO₂、TiO₂、Al₂O₃Or ZrO₂A surface. In some embodiments, the metal oxide surface is an oxidized surface of a metallic material. In some embodiments, the metal oxide surface is formed by using an oxygen compound such as one comprising O₃、H₂O、H₂O₂、O₂Oxygen atoms, plasma or radicals or mixtures thereof, oxidize at least the surface of the metallic material. In some embodiments, the metal oxide surface is a native oxide formed on the metallic material.

In some embodiments, the vanadium nitride-containing layer is opposite to the second SiO₂The surface is selectively deposited on a first surface comprising a dielectric surface. For simplicity, the term dielectric is used herein to distinguish it from another surface, i.e., a metal or metallic surface. Unless otherwise indicated for a particular embodiment, in the context of the present application, the term dielectric is understood to cover all surfaces that are non-conductive or have a very high resistivity. As used herein, the term "dielectric surface" may refer to a surface of a dielectric material, including but not limited to silicon-containing dielectric materials such as, for example, silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, and mixtures thereof. In addition, the term "dielectric surface" may also refer to a surface of a metal oxide material or an oxidized surface of a metal nitride material.

In some embodiments, the dielectric surface may be referred to herein as a second surface. In some embodiments, the second surface may comprise any dielectric surface. In some embodiments, a substrate comprising a first metallic or metallic surface and a second dielectric surface is provided. In some embodiments, a substrate comprising a first metal surface comprising a metal oxide surface is provided. In some embodiments, the second surface can comprise-OH groups. In some embodiments, the second surface may be SiO-based₂Of (2) is provided. In some embodiments, the second surface may comprise Si-O bonds. In some embodiments, the second surface may comprise a SiO-based₂Low-k material of (a). In some embodiments, the second surface may comprise greater than about 30%, preferably greater than about 50%, SiO₂. In some embodiments, the second surface may comprise GeO₂. In some embodiments, the second surface may comprise a Ge-O bond.

In one embodiment, the first surface may comprise a metal and the second surface may comprise a metal. In another embodiment, the first surface may comprise a metal and the second surface may comprise a dielectric material. In another embodiment, the first surface may comprise a dielectric material and the second surface may comprise a metal. In yet another embodiment, both the first surface and the second surface comprise a dielectric material.

In one embodiment, the selectivity of deposition is at least 50%, or at least 80%, or at least 90%. In another embodiment, the selectivity of deposition may be at least 95%, at least 98%, or at least 99%. The selectivity of deposition may even be at least 99.5% or about 100%. The selectivity of deposition can alternatively be evaluated based on the nucleation rate on a given surface material under given conditions. For example, the vanadium nitride-containing layer may begin to grow on the first surface material after one, two, or three deposition cycles. Alternatively, the vanadium nitride-containing layer may begin to grow on the first surface material after ten deposition cycles. The vanadium nitride-containing layer may begin to grow on the second surface material after 50 deposition cycles or after 100 deposition cycles.

In one embodiment, the selectivity of the deposition is adjusted by etch back during the cyclical deposition. In this context, etch-back refers to a process that removes some of the already deposited layers between deposition cycles. Etch-back may increase selectivity because it may slow down layer growth on the second surface material more than on the first surface material. Methods according to the present disclosure may include one or more etch-back stages, the time interval, duration, and other characteristics of which may be selected independently of the deposition cycle. This allows the process to be tuned to achieve the desired layer selectivity, thickness, etc.

In one embodiment, the vanadium nitride-containing layer is a seed layer. The seed layer may increase the nucleation rate of another deposition material. This in turn may result in obtaining a substantially or fully continuous layer with a smaller number of deposition cycles and improving the integrity of the layer. This may allow for the deposition of thinner layers. Alternatively or additionally, the surface of the obtained layer may be smoother. This may be advantageous in avoiding defects, for example, in sensitive applications and applications involving high aspect ratio structures. In one embodiment, a titanium nitride layer may be depositedThe vanadium nitride-containing layer is previously deposited as a seed layer. The titanium nitride layer can be formed from TiCl by using a cyclical deposition process₄And NH₃And (6) depositing.

It may be advantageous to use the vanadium nitride containing layer as a seed layer prior to depositing the metal layer. Examples of metals that can be deposited on the vanadium nitride-containing seed layer are molybdenum, tungsten, copper, and cobalt. The metal layer may be used, for example, as a barrier metal, a workfunction metal for logic, or as a DRAM electrode.

In one embodiment, the seed layer has a thickness of 0.6nm or less, such as 0.4 nm. It may be possible to deposit a substantially continuous thin layer comprising vanadium nitride. Such a layer may have advantages in a space-limited structure. The seed layer may be substantially continuous. In one embodiment, the seed layer may be discontinuous. The speed of nucleation can also be improved by a discontinuous seed layer. This may be desirable, for example, to reduce the effect of the seed layer on the properties of the structure being produced.

In further embodiments, the vanadium nitride-containing layer may be deposited on a seed layer (referred to as an underlayer in this disclosure). The use of an underlayer between the substrate and the vanadium nitride-containing layer may allow for the deposition of a vanadium nitride-containing layer having a reduced resistivity. Thus, it may be that the use of an underlayer allows for the deposition of a substantially or fully continuous vanadium-containing layer with a reduced number of deposition cycles, thereby improving the integrity and/or surface smoothness of the layer, as described above. In some embodiments, the underlayer is deposited on a substrate comprising, consisting essentially of, or consisting of a dielectric material. In some embodiments, the dielectric material is a thermal oxide. In some embodiments, the dielectric material is a thermal oxide.

The use of an underlayer under the vanadium nitride containing layer may be advantageous in applications where vanadium nitride containing layers having a thickness below 10nm, or below 5nm, or below 3nm, or below 2nm, or below 1.5nm are used. In some embodiments, the thickness of the underlayer can be, for example, about 0.05nm to about 0.4nm, or about 0.1nm to about 0.3nm, such as about 0.15nm, about 0.2nm, about 0.25nm, or about 0.35 nm.

The bottom layer may be substantially continuous. In some embodiments, the bottom layer may be non-continuous. The underlayer may comprise various chemistries such as silicon oxide or carbon containing metal oxides deposited as known in the art. In some embodiments, the underlayer is deposited in one to five deposition cycles, such as one, two, or three deposition cycles.

As a non-limiting example of a method according to the present disclosure, when a vanadium nitride-containing layer according to the present disclosure contains substantially only vanadium and nitrogen and the thickness of the layer is aboutWhen the resistivity of the film may be 200 μ Ohm cm or less. When the thickness of the vanadium nitride-containing layer is aboutWhen the resistivity may be less than 300 muohm cm, and when the thickness of the layer is aboutThe resistivity may be less than 350 uOhm. Further, when the thickness of the vanadium nitride-containing film is aboutThe resistivity may be less than 500 muohm cm. The increase in resistivity of the vanadium nitride-containing layer may be slower than the increase in resistivity of a TiN layer of similar thickness.

The method according to the present disclosure may be performed on a single wafer tool or in a batch reactor. The reaction chamber may be a separate reaction chamber or part of a multi-function tool.

For vanadium nitride containing layers in a batch deposition, it may be possible to obtain good within-wafer thickness non-uniformity as well as good down-boat thickness and resistivity performance. In some embodiments, the wafer is rotated during processing. In some embodiments, the batch reactor comprises a reactor configured to hold 25 or more, 50 or more, 75 or more, 100 or more, 150 or more wafers stacked vertically on a substrate boat. In other embodiments, the batch reactor may include a small batch reactor configured to hold 10 or fewer wafers, 8 or fewer wafers, 6 or fewer wafers, 4 or fewer wafers, or 2 wafers. In some embodiments in which a batch reactor is used, and when the thickness of the vanadium nitride-containing layer is less than 20nm, less than 15nm, less than 10nm, less than 7nm, less than 5nm, less than 4nm, or less than 3nm, the wafer-to-wafer thickness or resistivity non-uniformity may be less than 20% (1 sigma), less than 10%, less than 5%, less than 3%, less than 2%, or even less than 1%.

Within the wafer, the thickness or resistivity non-uniformity is less than 30% (1 sigma), less than 20%, less than 15%, less than 10%, less than 5%, less than 3%, less than 2%, less than 1%, or even less than 0.5%.

In one embodiment, a vanadium nitride-containing layer is used as an etch stop layer. In another embodiment, the vanadium nitride-containing layer may be used as an etch stop layer for a metal oxide, such as a dielectric metal oxide (e.g., aluminum oxide).

In one embodiment, the cyclical deposition process comprises depositing SiH₄Is annealed in the presence of (a). Annealing may be used to reduce the stress of the layers. The annealing may be performed during a cyclical deposition process. Alternatively, the annealing may be performed after the cyclical deposition process. The annealing may be performed once. Alternatively, the annealing may be performed several times at predetermined time intervals during the cyclic deposition process. Annealing may affect layer properties by reducing layer intrinsic stress and/or thermal stress. The reduction of stress in the deposited layer can positively affect the properties of the final device.

In one embodiment, a silane compound, such as Silane (SiH), may be used in the anneal₄) Disilane (Si)₂H₆) Trisilane (Si)₃H₈) Or butylsilane (Si)₄H₁₀). Other silane compounds include halosilanes such as chlorosilanes, for example Octachloropropylsilane (OCTS), HCDS (hexachlorodisilane) and DCS (dichlorosilane) can be used.

Without limiting the present disclosure to any particular theory, annealing in the presence of a silicon-containing compound, such as silane, may introduce some amount of silicon into the layer. By appropriately selecting the annealing regime, the amount of silicon introduced can be varied and adjusted.

In one embodiment, the annealing may be performed at a temperature between 300 ℃ and 500 ℃, for example at a temperature of about 350 ℃, 370 ℃, or 400 ℃.

The disclosure is further illustrated by the following exemplary embodiments depicted in the accompanying drawings. Moreover, the illustrations presented herein are not meant to be actual views of any particular material, structure, or device, but are merely schematic representations used to describe embodiments of the present disclosure. It will be appreciated that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of the illustrated embodiments of the present disclosure.

Fig. 1 illustrates a method 100 according to an exemplary embodiment of the present disclosure. The method 100 may be used to form a layer comprising vanadium nitride, i.e., a layer comprising vanadium nitride. The vanadium nitride-containing layer may be used during the formation of devices such as those mentioned herein. However, unless otherwise specified, the method is not limited to such applications.

The method 100 includes providing a substrate within a reaction chamber of a reactor (102) and depositing a layer comprising vanadium nitride onto a surface of the substrate (104).

During 102, a substrate may be provided within a reaction chamber. The reaction chamber used during step 102 may be or include a reaction chamber of a chemical vapor deposition reactor system configured to perform a deposition process. The deposition process may be a cyclical deposition process. The reaction chamber may be a separate reaction chamber or part of a multi-function tool. The reaction chamber may be a batch processing tool.

Step 102 may include heating the substrate to a desired deposition temperature within the reaction chamber. In some embodiments of the present disclosure, step 102 comprises heating the substrate to a temperature of less than 800 ℃. For example, in some embodiments of the present disclosure, heating the substrate to the deposition temperature may include heating the substrate to a temperature between about 100 ℃ to about 500 ℃, about 250 ℃ to about 450 ℃, about 250 ℃ to about 400 ℃, or about 200 ℃ to about 350 ℃.

In addition to controlling the temperature of the substrate, the pressure within the reaction chamber may also be regulated. For example, in some embodiments of the present disclosure, the pressure within the reaction chamber during step 102 may be less than 760 torr or between 0.5 torr and 760 torr, about 1 torr and 100 torr, such as or about 1 torr and 10 torr. The pressure can be, for example, 10 torr or less, 5 torr or less, 3 torr or less, 2 torr or less, 1 torr or less, 0.1 torr or less, or 0.001 torr or less.

During step 104, a layer comprising vanadium nitride is deposited onto the surface of the substrate using a deposition process. As described above, the deposition process may be a cyclical deposition process, and may include a cyclical CVD, ALD, or mixed cyclical CVD/ALD process. For example, in some embodiments, the growth rate of a particular ALD process may be low compared to a CVD process. One method of increasing the growth rate may be to operate at a higher deposition temperature than is typically employed in an ALD process, resulting in some portions of the chemical vapor deposition process, but still utilizing sequential introduction of the precursors. Such a process may be referred to as cyclic CVD. In some embodiments, a cyclic CVD process may include introducing two or more precursors into a reaction chamber, where there may be overlapping time periods between the two or more precursors in the reaction chamber, resulting in both a deposited ALD component and a deposited CVD component. This is known as the mixing process. According to a further example, the cyclical deposition process may include a continuous flow of one reactant/precursor and periodic pulsing of a second precursor into the reaction chamber. The pressure and/or temperature in the reaction chamber during step 104 may be the same or similar to any of the pressures and temperatures described above in connection with step 102.

According to some examples of the disclosure, the deposition process is a thermal deposition process. In these cases, the deposition process does not include the use of plasma to form the active species used in the deposition process. For example, the deposition process may not include the formation or use of a plasma, may not include the formation or use of an excimer species, and/or may not include the formation or use of a radical. In the case of a thermal cycling deposition process, the duration of the step of providing the precursor to the reaction chamber may be relatively long to allow the precursor to react with another precursor or derivative thereof. For example, the duration may be greater than or equal to 5 seconds or greater than or equal to 10 seconds or between about 5 seconds and 10 seconds.

In other cases, the plasma may be used to excite one or more precursors, and/or one or more inert gases.

The cyclical deposition process may include providing (e.g., separately and/or sequentially) a vanadium precursor to the reaction chamber and a nitrogen precursor to the reaction chamber. In some cases, hydrogen reactant may be provided to the reaction chamber with the vanadium precursor or with the nitrogen precursor. The hydrogen reactant may comprise, for example, H₂Or excited, atomic, plasma, or radical hydrogen species.

Fig. 2 depicts an exemplary loop method 200 suitable for step 104 of method 100. The method 200 includes the steps of providing a vanadium precursor to a reaction chamber (step 202) and providing a nitrogen precursor to the reaction chamber (step 204). According to an example of the present disclosure, a vanadium nitride-containing layer is formed during the step of providing a nitrogen precursor to the reaction chamber (step 204).

In some embodiments of the present disclosure, the method 100 includes repeating a unit deposition cycle including steps 202 and 204, with an optional purge or move step following step 202 and/or step 204. The deposition cycle may be repeated one or more times based on the desired thickness of the vanadium nitride-containing layer, for example. For example, if the thickness of the vanadium nitride-containing layer is less than desired for a particular application, steps 202 and 204 may be repeated one or more times. In some embodiments, the method comprises at least 1 cycle to at most 100 cycles, or at least 2 cycles to at most 80 cycles, or at least 3 cycles to at most 70 cycles, or at least 4 cycles to at most 60 cycles, or at least 5 cycles to at most 50 cycles, or at least 10 cycles to at most 40 cycles, or at least 20 cycles to at most 30 cycles. In some embodiments, the method comprises at most 100 cycles, or at most 90 cycles, or at most 80 cycles, or at most 70 cycles, or at most 60 cycles, or at most 50 cycles, or at most 40 cycles, or at most 30 cycles, or at most 20 cycles, or at most 10 cycles, or at most 5 cycles, or at most 4 cycles, or at most 3 cycles, or at most 2 cycles, or a single cycle.

The vanadium precursor can comprise any of the precursors indicated in the present disclosure.

The reaction chamber may be purged before or after one or more steps using vacuum and/or inert gas, for example, to mitigate gas phase reactions between precursors and achieve self-saturating surface reactions (e.g., in the case of ALD). For example, the reaction chamber may be purged after one or more of steps 202, 204. Additionally or alternatively, the substrate may be moved to separately contact the first vapor phase precursor and the second vapor phase precursor. Excess chemicals and reaction byproducts, if any, may be removed from the substrate surface or reaction chamber, such as by purging the reaction space or by moving the substrate, before contacting the substrate with the next reactive chemical. The reaction chamber may be purged after the step of providing the precursor to the reaction chamber and/or after the step of providing the precursor to the reaction chamber.

In some embodiments, the step coverage of the layer comprising vanadium nitride is equal to or greater than about 50%, or greater than about 80%, or greater than about 90%, or about 95%, or about 98%, or about 99% or more in/on structures having an aspect ratio (height/width) greater than about 2, greater than about 5, greater than about 10, greater than about 25, greater than about 50, greater than about 100, or between about 10 to 100 or about 5 to about 25.

In some embodiments, the growth rate of the vanadium nitride-containing layer may be relatively low — for example, less than 3 angstroms per cycle, between about 0.2 to 3 angstroms per cycle, or about 0.1 to about 1 angstroms per cycle. Alternatively, the growth rate of the vanadium nitride-containing layer may be less than 10 angstroms/cycle, or less than 5 angstroms/cycle, or less than 4 angstroms/cycle. The relatively low growth rate may promote desired film thickness accuracy and/or film thickness uniformity. However, when the process conditions are appropriately selected, a faster growth rate can be achieved. The preferred layer growth rate depends on the application and can be selected by the skilled person as desired.

Fig. 3 illustrates a structure/portion of a device 300 according to further examples of the present disclosure. Device or structure 300 includes substrate 302, dielectric or insulating material 305, and layer 308 comprising vanadium nitride. In the example shown, the structure 300 also includes an additional conductive layer 310.

The substrate 302 may be or may include any of the substrate materials described herein.

The dielectric or insulating material 305 may include one or more layers of dielectric or insulating material. For example, the dielectric or insulating material 305 may include an interfacial layer 304 and a high-k material 306 deposited overlying the interfacial layer 304. In some cases, the interface layer 304 may or may not be present to a perceptible degree. The interfacial layer 304 may comprise an oxide, such as silicon oxide, which may be formed on the surface of the substrate 302 using, for example, a chemical oxidation process or an oxide deposition process. The high-k material 306 may be or include, for example, a metal oxide having a dielectric constant greater than about 7. In some embodiments, the dielectric constant of the high-k material is higher than the dielectric constant of silicon oxide. In some embodiments, the high-k material may include hafnium oxide (HfO)₂) Tantalum oxide (Ta)₂O₅) Zirconium oxide (ZrO)₂) Titanium oxide (TiO)₂) Hafnium silicate (HfSiO)_x) Alumina (Al)₂O₃) Lanthanum oxide (La)₂O₃) And mixtures/laminates comprising one or more such layers.

Vanadium nitride-containing layer 308 may be formed according to the methods described herein. When a cyclical deposition process is used to form vanadium nitride-containing layer 308, the concentration of vanadium, nitrogen, and/or other constituents in vanadium nitride-containing layer 308 may vary from the bottom of vanadium nitride-containing layer 308 to the top of vanadium nitride-containing layer 308, for example, by controlling the amount of vanadium precursors and/or one or more reactants and/or the corresponding pulse time or number of pulses during one or more deposition cycles. In some cases, vanadium nitride-containing layer 308 may have a stoichiometric composition. The workfunction and other properties of the vanadium nitride-containing layer 308 can be changed by changing the amount of vanadium, nitrogen, and/or other compounds in the layer or in the deposition cycle.

The layer 308 comprising vanadium nitride may comprise impurities, such as halogens, hydrogen, and the like, alone or in combination, in an amount less than one atomic percent, less than 0.2 atomic percent, or less than 0.1 atomic percent, or less than 0.05 atomic percent.

The thickness of the vanadium nitride-containing layer 308 may vary depending on the application. As an example, the vanadium nitride-containing layer 308 can have a thickness of less than 5nm or from about 0.1nm to about 10nm, or from about 0.1nm to about 5nm, or from about 0.2nm to about 5nm, or from about 0.3nm to about 3nm, or from about 0.3nm to about 1 nm. When used to replace a layer that may include aluminum instead of vanadium, the vanadium nitride-containing layer 308 may be relatively thin, which may be desirable for many applications including work function and/or voltage threshold adjustment layers. In some cases, the thickness of the vanadium nitride-containing layer 308 may be greater than 2nm — for example, when the vanadium nitride-containing layer 308 is used as a barrier layer or liner.

The workfunction of the displaced vanadium nitride-containing layer 308 may be >4.6eV, >4.7eV, >4.8eV, >4.9eV, >4.95eV, or >5.0 eV. Using vanadium nitride-containing layers as described herein, the work function value of the device may be shifted by about 30meV to about 300meV, or about 30meV to about 200meV, or about 50meV to about 100 meV. The thickness and/or composition of the vanadium nitride-containing layer may be manipulated to obtain a desired shift in work function and/or threshold voltage.

Additionally or alternatively, vanadium nitride-containing layer 308 can, for example, form a continuous film having a thickness of <5nm, <4nm, <3nm, <2nm, <1.5nm, <1.2nm, <1.0nm, or <0.9nm using method 100. The vanadium nitride-containing layer 308 may be relatively smooth, with relatively low grain boundary formation. In some cases, vanadium nitride-containing layer 308 may be amorphous, having a relatively low columnar crystalline structure (as compared to TiN). The RMS roughness of the exemplary vanadium nitride-containing layer 308 may be <1.0nm, <0.7nm, <0.5nm, <0.4nm, <0.35nm, or <0.3nm at thicknesses less than 10 nm.

The additional conductive layer 310 may comprise, for example, a metal, such as a refractory metal, or the like. As an example, the conductive layer 310 may be or include one or more of the following: titanium nitride; vanadium nitride; a metal stack comprising titanium nitride and a metal (e.g., W, Co, Ru, Mo) or titanium nitride, titanium aluminum carbon, and titanium nitride; tungsten carbon nitride; cobalt; copper; molybdenum; ruthenium, and the like.

Although illustrated as the vanadium nitride-containing layer 308 overlying the dielectric or insulating material 305, in some cases, the vanadium nitride-containing layer 308 may additionally or alternatively be formed directly over the substrate 302 (which may include various layers and/or topologies) and/or beneath the dielectric or insulating material 305, between the interface layer 304 and the high-k material 306, and/or between layers of the high-k material 306. In addition, vanadium nitride-containing layer 308 may be deposited and at least partially removed such that the resulting structure may no longer include vanadium nitride-containing layer 308 or include a fewer number of layers than the vanadium nitride-containing layer originally formed on the structure.

Fig. 4 illustrates another example structure 400 according to an example of the present disclosure. Device or structure 400 includes a substrate 402, a dielectric or insulating material 404, and a vanadium nitride-containing layer 406. In the example shown, structure 400 also includes an additional conductive layer 412. Substrate 402, dielectric or insulating material 404, vanadium nitride-containing layer 406, and additional conductive layer 412 may be the same as or similar to substrate 402, dielectric or insulating material 404, vanadium and/or vanadium nitride-containing layer 408, and conductive layer 410. Similar to the above, the vanadium nitride-containing layer 406 can additionally or alternatively be formed to overlie the substrate 402 (which can include various layers and/or topologies) and/or underlying the insulating material 404, between the interface layer 408 and the high-k material 410, and/or between layers of the high-k material 410. Further, vanadium nitride-containing layer 406 may be deposited and at least partially removed such that the resulting structure may no longer include vanadium nitride-containing layer 406 or include a fewer number of layers than the vanadium nitride-containing layer 406 originally formed on the structure.

In the example shown, substrate 402 includes source region 414, drain region 416, and channel region 418. Although illustrated as horizontal structures, structures and devices according to examples of the present disclosure may include vertical and/or three-dimensional structures and devices, such as FinFET devices, gate-all-around devices, and nanosheet devices.

Fig. 5 illustrates another structure 500 according to an example of the present disclosure. The structure 500 is suitable for gate-all-around field effect transistor (GAA FET) (also referred to as lateral nanowire FET) devices and the like.

In the example shown, structure 500 includes a semiconductor material 502, a dielectric material 504, a vanadium nitride-containing layer 506, and a conductive layer 508. Structure 500 may be formed overlying a substrate, including any of the substrate materials described herein.

Semiconductor material 502 may include any suitable semiconductor material. For example, the semiconductor material 502 may include a group IV, III-V, or II-VI semiconductor material. For example, the semiconductor material 502 includes silicon.

The dielectric material 504, vanadium nitride-containing layer 506, and conductive layer 508 can be the same as or similar to the dielectric or insulating material 305, vanadium nitride-containing layer 308, and conductive layer 310 described above. According to further examples of the present disclosure, vanadium nitride-containing layer 506 may be formed overlying semiconductor material 502 and/or underlying dielectric material 504.

Fig. 6 illustrates a deposition apparatus 600 according to yet another exemplary embodiment of the present disclosure. Apparatus 600 may be used to perform methods and/or form portions of structures or devices as described herein.

In the example shown, the apparatus 600 includes one or more reaction chambers 602, a first precursor gas source 604, a second precursor gas source 606, a purge gas source 608, an exhaust gas source 610, and a controller 612.

Reaction chamber 602 may include any suitable reaction chamber, such as an ALD or CVD reaction chamber.

The first precursor gas source 604 can include a container and one or more vanadium precursors as described herein, either alone or mixed with one or more carrier gases (e.g., inert gases). The second precursor gas source 606 can comprise a container and one or more precursors (e.g., nitrogen precursors) as described herein, either alone or mixed with one or more carrier gases. The purge gas source 608 may include one or more inert gases as described herein. Although illustrated as having three gas sources 604 and 608, the apparatus 600 may include any suitable number of gas sources. The gas source 604 and 608 may be coupled to the reaction chamber 602 via lines 614 and 618, which may each include flow controllers, valves, heaters, and the like.

The exhaust source 610 may include one or more vacuum pumps.

The controller 612 includes electronic circuitry and software to selectively operate the valves, manifolds, heaters, pumps, and other components included in the device 600. Operation of such circuits and components introduces precursors, reactants, and purge gases from respective sources 604-608. The controller 612 may control the timing of the gas pulse sequence, the temperature of the substrate and/or reaction chamber, the pressure within the reaction chamber, and various other operations to provide proper operation of the apparatus 600. The controller 612 may include control software to electrically or pneumatically control the valves to control the flow of precursors, reactants, and purge gases into and out of the reaction chamber 602. The controller 612 may include modules, such as software or hardware components, e.g., FPGAs or ASICs, that perform certain tasks. The module may advantageously be configured to reside on an addressable storage medium of a control system and configured to perform one or more processes.

Other configurations of apparatus 600 are possible, including different numbers and types of precursor and reactant sources and purge gas sources. Further, it should be understood that there are many arrangements of valves, conduits, precursor sources, and purge gas sources that may be used to achieve the goal of selectively feeding gas into the reaction chamber 602. Further, as a schematic illustration of the apparatus, many components are omitted for simplicity of illustration, and such components may include, for example, various valves, manifolds, purifiers, heaters, vessels, vents, and/or bypasses.

During operation of the deposition apparatus 600, a substrate, such as a semiconductor wafer (not shown), will be transferred from, for example, a substrate handling system to the reaction chamber 602. Once the one or more substrates are transferred to the reaction chamber 602, one or more gases, such as precursors, reactants, carrier gases, and/or purge gases, are introduced 608 into the reaction chamber 602 from the gas source 604.

The above-described example embodiments of the present disclosure do not limit the scope of the invention, as these embodiments are merely examples of embodiments of the present invention, which is defined by the appended claims and their legal equivalents. Any equivalent embodiments are intended to be included within the scope of the present invention. Indeed, various modifications of the disclosure, as alternative available combinations of the elements described, in addition to those shown and described herein will be apparent to those skilled in the art from the description. Such modifications and embodiments are also intended to fall within the scope of the appended claims.