data operation method, device and system

文档序号：1577228 发布日期：2020-01-31 浏览：19次中文

阅读说明：本技术 一种数据操作方法、装置及系统 (data operation method, device and system ) 是由蒋佳立龙欣于 2018-07-03 设计创作，主要内容包括：本申请实施例提供了一种数据操作方法、装置及系统,该方法包括：判断数据操作请求中携带的目标地址域是否属于设备端对应的虚拟内存地址域,该虚拟内存地址域与主机端内存的物理内存地址域具有预设映射关系；若是,则根据该预设映射关系,确定与该目标地址域对应的物理内存地址域；根据确定出的物理内存地址域,对主机端内存进行数据操作。通过预先确定与主机端内存中分配给设备端直接进行数据操作的物理内存地址域具有一定映射关系的虚拟内存地址域,当数据操作请求中携带的地址域属于该虚拟内存地址域时,通过地址域转换确定出对应的物理内存地址域,从而实现直接对主机端内存进行数据操作,提高了数据传输效率,降低了数据交换延时。(The embodiment of the application provides data operation methods, devices and systems, and the method comprises the steps of judging whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to an equipment end, wherein the virtual memory address field has a preset mapping relation with a physical memory address field of a host end memory, if so, determining the physical memory address field corresponding to the target address field according to the preset mapping relation, performing data operation on the host end memory according to the determined physical memory address field, determining the corresponding physical memory address field by means of address field conversion by means of predetermining that the virtual memory address field has a fixed mapping relation with the physical memory address field which is allocated to the equipment end in the host end memory and performs data operation directly, and when the address field carried in the data operation request belongs to the virtual memory address field, determining the corresponding physical memory address field through address field conversion, thereby realizing direct data operation on the host end memory, improving data transmission efficiency and reducing data exchange delay.)

1, a method of data manipulation, the method comprising:

judging whether a target address field carried in the data operation request belongs to a virtual memory address field corresponding to the equipment end or not, wherein the virtual memory address field and a physical memory address field of a memory of the host end have a preset mapping relation;

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

2. The method according to claim 1, wherein before determining whether the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the device side, the method further comprises:

acquiring a physical memory address field which is distributed from a host memory and used for providing data operation for a device side;

determining a virtual memory address domain outside an address range according to the address range of the device-side memory;

and generating and storing a preset mapping relation between the physical memory address domain and the virtual memory address domain.

3. The method of claim 2, wherein the determining, according to an address range of the device-side memory, a virtual memory address range outside the address range comprises:

determining the tail address of the address range of the memory at the equipment end;

and generating a virtual memory address field with the same length as the physical memory address field according to the end address, wherein the initial address of the virtual memory address field is greater than the end address of the address range.

4. The method of claim 3, wherein the start address of the virtual memory address domain is contiguous with the end address of the address range.

5. The method according to claim 4, wherein the determining whether the target address field carried in the data operation request belongs to a virtual memory address field corresponding to the device side includes:

judging whether the initial address of a target address field carried in the data operation request is larger than the tail address of the address range;

if yes, determining that the target address field carried in the data operation request belongs to the virtual memory address field.

6. The method of claim 2, wherein the device side comprises an OpenCL framework based field programmable array FPGA, and the device side memory is off-chip memory of the FPGA.

7. The method according to claim 1, wherein the performing data operations on the host-side memory according to the determined physical memory address domain comprises:

and performing data operation on a memory object in the memory of the host end according to the determined physical memory address domain, wherein the memory object is declared to belong to the virtual memory address domain by the host end in advance.

8. The method of claim 7, wherein the data operation request is a pending data acquisition request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

and acquiring data to be processed from a memory object in the memory of the host end according to the determined physical memory address domain, so that an OpenCL kernel in the equipment end performs data processing on the data to be processed to obtain corresponding processing result data.

9. The method of claim 7, wherein the data operation request is a data processing result storage request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

and storing processing result data obtained aiming at the data to be processed into a memory object in the memory of the host end according to the determined physical memory address field so that the host end obtains the processing result data from the memory of the host end.

10. The method of claim 7, wherein the data operation request is a data cache request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

and storing the data to be cached into the memory object in the host memory according to the determined physical memory address field so as to enable the host memory to be used as the extended memory of the equipment.

A method of data manipulation, the method comprising:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

declaring that the memory object belongs to a virtual memory address domain, wherein the virtual memory address domain and a physical memory address domain of the host-side memory have a preset mapping relation;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

12. The method of claim 11, wherein prior to creating the memory object for storing data, further comprising:

allocating a physical memory address domain for providing data operation for an equipment end from an address range of a host end memory;

and issuing the physical memory address domain to the equipment end so that the equipment end generates and stores a preset mapping relation between the physical memory address domain and the virtual memory address domain.

13. The method of claim 12, wherein the virtual memory address domain is determined by the device side according to an address range of a device side memory.

14. The method of claim 11, wherein the data stored by the memory object is data to be processed;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

storing the data to be processed to the corresponding memory object in the host memory;

and responding to the equipment end to acquire the data to be processed from the memory object based on the preset mapping relation.

15. The method of claim 11, wherein the data stored by the memory object is result data obtained for data to be processed;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

responding to the device end to store the result data in the host end memory into the corresponding memory object based on the preset mapping relation;

and acquiring the result data from the memory object.

16. The method according to claim 11, wherein the data stored by the memory object is data to be cached;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

and responding to the preset mapping relation in the host memory by the equipment end to store the data to be cached into the corresponding memory object.

17, A data manipulation device, comprising:

the bus interconnection module is used for judging whether a target address field carried in the data operation request belongs to a virtual memory address field corresponding to the equipment end, wherein the virtual memory address field and a physical memory address field of a memory of the host end have a preset mapping relation;

a domain conversion module, configured to determine, according to the preset mapping relationship, the physical memory address domain corresponding to the target address domain when the target address domain belongs to the virtual memory address domain;

and the control module is used for carrying out data operation on the host-side memory according to the determined physical memory address domain.

18, A data manipulation device, comprising:

the memory object creating module is used for creating a memory object for storing data in a host memory for providing data operation for the equipment end;

the memory object declaration module is used for declaring that the memory object belongs to a virtual memory address field, wherein the virtual memory address field and a physical memory address field of the host-side memory have a preset mapping relation;

and the data operation response module is used for responding to the data operation of the equipment end in the host end memory based on the preset mapping relation.

19, kinds of data operation system, which comprises a device end and a host end connected with the device end in communication;

the host side is used for creating a memory object for storing data in a host side memory for providing data operation for the equipment side; declaring that the memory object belongs to a virtual memory address domain, wherein the virtual memory address domain and a physical memory address domain of the host-side memory have a preset mapping relation; responding to data operation of the equipment side in the host side memory based on the preset mapping relation;

the device side is used for judging whether a target address field carried in the data operation request belongs to a virtual memory address field corresponding to the device side; if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation; and performing data operation on the host memory according to the determined physical memory address domain.

20, a data manipulation device, comprising:

a processor; and

a memory arranged to store computer executable instructions that, when executed, cause the processor to perform the method of any of claims 1-10.

21, a data manipulation device, comprising:

a processor; and

a memory arranged to store computer executable instructions that, when executed, cause the processor to perform the method of any of claims 11 to 16.

22, storage media storing computer-executable instructions that, when executed, implement the method of any of claims 1-10 and .

Storage media of claim 23, for storing computer-executable instructions which, when executed, implement the method of any of claims 11 to 16 and .

Technical Field

The present application relates to the field of computers, and in particular, to a method, an apparatus, and a system for operating data.

Background

At present, with the increasing demand of computers for rapidly processing big data, as a Field Programmable Array (FPGA) is between a special chip and a general chip, has certain programmability, can perform data parallel and task parallel computation simultaneously, has more obvious efficiency in processing specific applications, and the Field Programmable Array FPGA also has obvious performance power consumption ratio advantages.

At present, data operation methods are provided in related technologies, and the method mainly includes that a host end stores data to be processed into a host end memory of the host end, an FPGA copies the data to be processed into a device end memory of the FPGA through a PCIE controller, an OpenCL kernel in the FPGA reads the data to be processed from the device end memory, performs corresponding processing on the data to obtain a corresponding data processing result, stores the obtained data processing result into the device end memory, and finally, the host end obtains the data processing result from the device end memory of the FPGA through a PCIE bus and stores the data processing result into the host end memory of the host end.

Therefore, no matter the host side transmits the data to be processed to the FPGA, or the FPGA transmits the obtained data processing result to the host side, that is, the host side and the FPGA need to read or write data from or into the device side memory of the FPGA during data exchange, that is, the device side memory serves as an intermediary for data transmission between the host side and the FPGA, so that the problems of low data transmission efficiency and data exchange delay exist, and the FPGA is not favorable for feeding back the data processing result to the host side quickly and efficiently.

Disclosure of Invention

An object of the embodiment of the present application is to provide data operation methods, apparatuses, and systems, where a virtual memory address field having a mapping relationship with a physical memory address field allocated to a device side in a host side memory for directly performing data operation is predetermined, and when an address field carried in a data operation request belongs to the virtual memory address field, a corresponding physical memory address field is determined through address field conversion, so as to directly perform data operation on the host side memory, and thus, the device side memory is not required to be used as an intermediary for data transmission between the host side and the device side, thereby improving data transmission efficiency, and reducing data exchange delay.

In order to solve the above technical problem, the embodiment of the present application is implemented as follows:

the embodiment of the application provides data operation methods, which include:

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

The embodiment of the application provides data operation methods, which include:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

An embodiment of the present application provides data manipulation devices, including:

and the control module is used for carrying out data operation on the host-side memory according to the determined physical memory address domain.

An embodiment of the present application provides data manipulation devices, including:

the memory object creating module is used for creating a memory object for storing data in a host memory for providing data operation for the equipment end;

and the data operation response module is used for responding to the data operation of the equipment end in the host end memory based on the preset mapping relation.

The embodiment of the application provides data operation devices, which comprise a processor and

a memory arranged to store computer executable instructions that, when executed, cause the processor to:

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

The embodiment of the application provides data operation devices, which comprise a processor and

a memory arranged to store computer executable instructions that, when executed, cause the processor to:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

The embodiment of the present application provides storage media for storing computer-executable instructions, which when executed implement the following processes:

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

The embodiment of the present application provides storage media for storing computer-executable instructions, which when executed implement the following processes:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

The data operation method, the data operation device and the data operation system in the embodiment of the application judge whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to an equipment end, the virtual memory address field and a physical memory address field of a memory of a host end have a preset mapping relation, if so, a physical memory address field corresponding to the target address field is determined according to the preset mapping relation, and data operation is carried out on the memory of the host end according to the determined physical memory address field.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only the embodiments described in the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic flowchart of a data operation method applied to an apparatus according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of information interaction between a host and a device in a data operation method according to an embodiment of the present application;

fig. 3 is a schematic diagram of information interaction between modules at a device side in the data operation method according to the embodiment of the present application;

fig. 4 is a schematic diagram illustrating an implementation principle of data transmission between a host end and a device end in a data operation method according to an embodiment of the present application;

fig. 5 is a schematic flowchart of a data manipulation method applied to a host according to an embodiment of the present application;

fig. 6 is a schematic diagram illustrating a module composition of a data operation device disposed in an equipment side according to an embodiment of the present application;

fig. 7 is a schematic diagram illustrating a module composition of a data operation device disposed at a host according to an embodiment of the present disclosure;

FIG. 8 is a block diagram of a data operating system according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of a data operation device according to an embodiment of the present application.

Detailed Description

For those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application , rather than all embodiments.

The embodiment of the application provides data operation methods, devices and systems, a virtual memory address field with definite mapping relation with a physical memory address field allocated to a device side in a host side memory for directly performing data operation is predetermined, and when the address field carried in a data operation request belongs to the virtual memory address field, the corresponding physical memory address field is determined through address field conversion, so that the data operation is directly performed on the host side memory, the device side memory is not required to be used as an intermediary for data transmission between the host side and the device side, the data transmission efficiency is improved, and the data exchange delay is reduced.

The specific application scenarios of the Data operation method include that a host end and at least device ends can form a heterogeneous computing system, the host end is in communication connection with at least device ends, the host end can be a processor with serial computing capability in the heterogeneous computing system, a Data computing mode of Multiple Instruction stream Single Data (MISD) is adopted, the device end can be a device providing a Data acceleration computing function for the host end in the heterogeneous computing system, a Data computing mode of Single Instruction stream Multiple Data (SIMD) is adopted, a memory of the host end is a physical memory configured for the host end, a memory of the device end is a physical memory configured for the device end, and the device end can be a field programmable array FPGA based on an OpenCL framework when the device end is implemented specifically.

Fig. 1 is a flowchart illustrating a data operation method according to an embodiment of the present application , where the method in fig. 1 can be executed by a device side based on an OpenCL framework, where the device side may be hardware, software or a combination of hardware and software with parallel computing capability, for example, a field programmable array FPGA, a GPU, and the like, as shown in fig. 1, and the method includes at least the following steps:

s101, a data operation request of an OpenCL kernel is obtained, wherein the data operation request carries a target address domain, and specifically, the data operation request can be collected through a bus interconnection module in a device end;

s102, judging whether a target address field in the data operation request belongs to a virtual memory address field corresponding to the equipment end, wherein the virtual memory address field and a physical memory address field of a memory of the host end have a preset mapping relation, and the physical memory address field is an address field of a memory which is distributed in the memory of the host end and used for providing the equipment end to perform data operation;

specifically, the data operation request may be a read request of data to be processed, or a write request of processing result data obtained for the data to be processed, after an OpenCL kernel in the device end starts to operate, a data operation is automatically performed on a device end memory based on pre-written configuration information, at this time, a data operation request of the OpenCL kernel is obtained through a bus interconnection module, after the data operation request is obtained, the bus interconnection module analyzes the data operation request, and determines whether a target address field carried in the data operation request belongs to a virtual memory address field corresponding to the device end, if the determination result is that the target address field belongs to the virtual memory address field, that is, the OpenCL kernel requests the virtual memory for performing the data operation on the device end, which is mapped by parts of physical memory in the host end memory in advance, at this time, the data operation request needs to be routed to a domain conversion module.

If yes, executing S103, and determining a physical memory address domain corresponding to the target address domain according to the preset mapping relation;

specifically, after determining that a target address field belongs to a virtual memory address field, a bus interconnection module in the device side routes a data operation request to a field conversion module, after receiving the data operation request, the field conversion module searches a physical memory address field corresponding to the target address field according to a predetermined mapping relationship between the virtual memory address field and a physical memory address field of a memory at the host side, the memory at the host side corresponding to the searched physical memory address field is a memory actually required to perform data operation, and then transmits the searched physical memory address field to a data operation controller.

S104, performing data operation on the memory of the host according to the determined physical memory address domain;

specifically, a memory address field corresponding to the data to be processed can be determined based on the determined physical memory address field, and the data to be processed is read from the memory of the host computer, so that the OpenCL kernel processes the data to be processed according to a preset data processing requirement, and obtains corresponding processing result data; or the memory address field corresponding to the processing result data can be determined based on the determined physical memory address field, and the processing result data aiming at the data to be processed is written into the memory of the host end, so that the host end can directly acquire the processing result data from the memory of the host end.

In the embodiment of the application, a virtual memory address field with mapping relation with a physical memory address field allocated to a device side in a host side memory for directly performing data operation is predetermined, an OpenCL kernel uses the address field of the device side memory and the virtual memory address field as address fields capable of performing data operation at the same time, the OpenCL kernel sends out a data operation request when starting to work according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operation belongs to the virtual memory address field, the corresponding physical memory address field of the host side memory is determined through address field conversion, and then the direct data operation on the host side memory can be realized based on the determined physical memory address field, so that the device side memory is not required to be used as an intermediary for data transmission between the host side and the device side, thereby improving the data transmission efficiency and reducing the data exchange delay.

Further , before processing the data operation request of the OpenCL core, advanced memory address domain mapping is required, and on this basis, before determining, in S102, whether the target address domain in the data operation request belongs to the virtual memory address domain corresponding to the device side, the method further includes:

step , obtaining a physical memory address field allocated from the host memory for providing data operations for the device side, specifically, the host side allocates physical memories with a preset memory size from its own memory, and transmits the address field corresponding to the physical memory to the device side;

determining a virtual memory address field outside the address range according to the address range of the device end memory, specifically, determining a starting address and a tail address of the device end memory according to the address range, and then determining the virtual memory address field based on the starting address, the tail address and the size of the physical memory for providing the device end to perform data operation, wherein the length of the virtual memory address field is equal to the length of the physical memory address field for providing the device end to perform data operation;

and step three, generating and storing a preset mapping relation between the acquired physical memory address field and the determined virtual memory address field, specifically, a starting address of the physical memory for providing the device side to perform data operation in the host side memory corresponds to a starting address of the virtual memory, a tail address of the physical memory for providing the device side to perform data operation in the host side memory corresponds to a tail address of the virtual memory, namely, establishing a corresponding relation between the acquired physical memory address field and each memory address in the determined virtual memory address field.

Specifically, the step two above determines, according to the address range of the device-side memory, a virtual memory address field outside the address range, and specifically includes:

determining an end address of an address range of a device-side memory, wherein the address range of the device-side memory refers to an address from a start address to an end address of a physical memory configured for a device side;

and generating a virtual memory address field with the same length as a physical memory address field in the host memory for providing data operation for the device side according to the determined tail address of the device side memory, wherein the initial address of the virtual memory address field is greater than the tail address of the device side memory.

Step , in order to ensure continuity of an address field of a device-side memory where a device side can perform data operations, without changing an original data operation mechanism of an OpenCL kernel, and being well compatible with an original framework of OpenCL, for a virtual memory mapped by parts of a physical memory in a host-side memory, the address field of the virtual memory may be defined on the basis of the address field of the device-side memory, at this time, the address field where the device side can sense that data operations can be performed is continuous, a front part represents the address field of the original physical memory, and a rear part represents an address field of a newly added virtual memory, that is, a start address of the address field of the virtual memory is continuous with an end address of the address range of the device-side memory.

Specifically, because the OpenCL kernel in the device side can sense the device-side memory of the device side, perform data operation on the device-side memory after the OpenCL kernel starts to operate, and read or write data from the device-side memory, in order to implement data operation on the physical memory reserved in the host-side memory by the device side directly without changing the original data operation mechanism of the OpenCL kernel, thereby implementing more efficient and flexible data exchange between the host side and the device side, and being well compatible with the original framework of the OpenCL, in this embodiment of the present application, a virtual memory with the same memory size is obtained by mapping the reserved physical memory in advance, and the address range of the virtual memory and the address range of the device-side memory are kept continuous, that is, the starting address of the virtual memory and the ending address of the device-side memory are continuous, at this time, the address field of the device side memory which can be sensed by the device side comprises: the address field of the memory of the device end and the address field of the virtual memory of the device end enable the OpenCL kernel to automatically transfer data operation to the memory of the host end when sensing the data operation to the memory of the device end and if the address field carried in the data operation request is the address field of the virtual memory, so that the device end can directly read or write data from or into the memory of the host end.

In specific embodiments, for the case that the device side is a field programmable array FPGA, the memory of the FPGA may be divided into an on-chip memory and an off-chip memory, where the on-chip memory has a relatively small storage space and is mainly used as a storage for the FPGA to perform data operations, and the off-chip memory has a relatively large storage space and can be used as a storage for data transmission between the FPGA and the host side.

In a specific implementation, the device-side memory may be the off-chip memory, and in a process of providing a data acceleration operation function for the host side by the FPGA, an OpenCL core in the FPGA requests to perform a data operation on the off-chip memory by using a MOVX instruction, in an embodiment of the present application, an address field of the memory in which the OpenCL core can perform the data operation includes: the address field of the off-chip memory and the virtual memory address field. The physical memory in the off-chip memory of the FPGA may be a Double Rate synchronous dynamic random access memory (DDR SDRAM).

Taking an apparatus side as a field programmable array FPGA as an example, as shown in fig. 2, for a process of mapping a physical memory address field in a host side memory to a virtual memory address field corresponding to the FPGA in advance, the specific steps are as follows:

s201, a host terminal allocates a shared physical memory with a preset memory size from a host terminal memory, wherein the shared physical memory is used for providing data operation for the FPGA directly, namely the FPGA can read or write data from or into the shared physical memory directly;

s202, writing an address field of the shared physical memory into a domain conversion module in the FPGA by the host, specifically, writing a start address and a memory size of the shared physical memory into the domain conversion module, or writing a start address and an end address of the shared physical memory into the domain conversion module;

s203, a domain conversion module in the FPGA acquires an address domain of the shared physical memory written in by the host side;

s204, after the domain conversion module in the FPGA acquires the address domain of the shared physical memory, determining the virtual memory address domain corresponding to the FPGA according to the address range of the device-side memory, wherein the length of the address domain of the shared physical memory is equal to that of the virtual memory address domain, namely the size of the virtual memory is equal to that of the shared physical memory;

s205, a domain conversion module in the FPGA generates and stores a mapping relation between an address domain of the shared physical memory and an address domain of the virtual memory;

the method comprises the steps of determining a corresponding relation between an address field of a physical memory reserved for an FPGA (field programmable gate array) to perform data operation on the FPGA in a host-side memory and an address field of a virtual memory mapped to an FPGA device-side memory, namely, a starting address of a shared physical memory in the host-side memory corresponds to a starting address of the virtual memory corresponding to the FPGA, and a tail address of the shared physical memory in the host-side memory corresponds to a tail address of the virtual memory corresponding to the FPGA, so that when an OpenCL kernel requests to perform data operation on the FPGA virtual memory, the request is directly routed to a specified memory area in the host-side memory indicated by a physical memory address field corresponding to a target address field, and data are directly read from or written into the host-side memory.

Step , in view of the process of determining whether the target address field in the data operation request belongs to the virtual memory address field corresponding to the device side, it may be determined whether the target address field is within the address range of the device side memory, and if not, it is determined that the target address field belongs to the virtual memory address field corresponding to the device side, and if the address range of the virtual memory address field and the address range of the device side memory is discontinuous, when the target address field falls between the virtual memory address field and the address range of the device side memory due to a data operation request error, the determination result will be inaccurate, so that the accuracy of the determination result is low, or if the target address field is within the address range of the virtual memory address field, it is determined that if the virtual memory address field is erroneously obtained, the determination result will be accurate.

Further , if the start address of the virtual memory address field is consecutive to the end address of the address range of the device-side memory, since the address range of the device-side memory is fixed, taking the end address of the device-side memory as a reference, that is, directly comparing the start address of the target address field with the end address of the address range of the device-side memory, so as to provide a determination speed and improve the determination accuracy, based on which, the above S102 determines whether the target address field in the data operation request belongs to the virtual memory address field corresponding to the device side, specifically includes:

judging whether the initial address of the target address field carried in the obtained data operation request is larger than the tail address of the address range of the equipment terminal memory;

if yes, determining that the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the equipment terminal.

For example, the size of the device-side memory is 64G, and the size allocated by the host side from the host-side memory to the physical memory for providing the device side to perform the data operation is 64G, then the size of the virtual memory mapped by the physical memory for providing the device side to perform the data operation is also 64G, at this time, the OpenCL kernel considers that the size of the device-side memory is 127G, so that the OpenCL kernel can sense that the start address and the end address in the address field range in which the data operation can be performed are 0x00000000 and 0x08000000, where the start address and the end address in the address field of the device-side memory are 0x 000000000000 and 0x04000000, and the start address and the end address in the address field of the virtual memory are 0x 00001 and 0x 08000000. Correspondingly, if the target address field belongs to 0x04000001 to 0x08000000, it indicates that data operation needs to be performed on the host memory.

, after determining a preset mapping relationship between a physical memory address field in the memory of the host and a virtual memory address field corresponding to the device, the device monitors a data operation request of the OpenCL kernel through the bus interconnect module, after monitoring the data operation request, determines whether a target address field carried in the data operation request belongs to the virtual memory address field, if so, determines a physical memory address field corresponding to the target address field through the domain conversion module according to the determined preset mapping relationship, and performs data operation on the memory of the host through the data operation controller according to the determined physical memory address field, specifically, reads data to be processed from the memory of the host or writes processing result data obtained for the data to be processed into the memory of the host.

Specifically, the step S104, according to the determined physical memory address field, performs data operation on the host memory, and specifically includes:

performing data operation on a memory object in a memory of a host end according to the determined physical memory address field, wherein the memory object is declared to belong to a virtual memory address field in advance by the host end, the memory object is used for storing data to be processed or processing result data, and specifically, the determined physical memory address field is an address field corresponding to the memory object, so that the data to be processed can be read from the memory object or the processing result data can be written in the memory object through the determined physical memory address field;

the memory object is a memory block which is divided by a host end and has fixed physical memory address fields in a physical memory used for providing data operation for an equipment end, meanwhile, the host end marks a virtual memory address field corresponding to the memory object according to the preset mapping relation and the physical memory address field of the memory object, and writes configuration information carrying the virtual memory address field into the equipment end so as to trigger the equipment end to perform data operation in the memory of the host end.

For the host side, the host side needs to create a corresponding memory object in the host side memory, and then responds to the data operation of the device side on the memory object, which specifically includes:

firstly, a host side creates a memory object for storing specified data in a physical memory for providing a device side to perform data operation (namely, a shared physical memory pre-allocated to the device side to perform data operation), and specifically, the host side divides the memory object with fixed physical memory address fields in the physical memory for providing the device side to perform data operation;

in specific implementation, aiming at a process that a host terminal requests a device terminal for data processing, the host terminal creates two memory objects in the OpenCL standard in a shared physical memory, namely raw memory objects and result memory objects;

then, the host declares that the created memory object belongs to a virtual memory address field, specifically, the host marks the virtual memory address field corresponding to the memory object according to the preset mapping relationship and the physical memory address field of the memory object, and writes configuration information carrying the virtual memory address field into the device to trigger the device to perform data operation in the memory of the host, at this time, an OpenCL kernel in the device requests that a target address field carried when the data operation is performed on the memory object belongs to the virtual memory address field;

and the host side stores the data to be processed into the corresponding memory object, namely stores the data to be processed into the raw material memory object.

For the device side, the device side needs to read the to-be-processed data stored in the corresponding memory object by the host side from the memory of the host side, that is, the data operation request is a to-be-processed data acquisition request;

correspondingly, the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain specifically includes:

and acquiring data to be processed from a memory object in a memory of the host end according to the determined physical memory address domain, so that an OpenCL kernel in the equipment end performs data processing on the data to be processed to obtain corresponding processing result data.

Specifically, for the situation that the device side feeds back the data processing result to the host side, the device side directly stores the processing result data to a specified memory area corresponding to the determined physical memory address field in the memory of the host side, and at this time, the host side directly obtains the processing result data from the specified memory area in the memory of the host side, that is, the data operation request is a data processing result storage request;

correspondingly, the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain specifically includes:

and storing processing result data obtained aiming at the data to be processed into a memory object in a host memory according to the determined physical memory address field so that the host acquires target data obtained aiming at the data to be processed by data processing from the host memory.

In specific embodiments, still taking the device side as an FPGA as an example, after the OpenCL kernel of the FPGA starts working, the following steps are performed, as shown in fig. 3, which specifically include:

s301, an OpenCL kernel in the FPGA sends a data operation request, and specifically, the OpenCL kernel of the FPGA requests, based on pre-written configuration information, to perform a data reading operation on a raw memory object storing data to be processed, or perform a data writing operation on a result memory object to which processing result data is to be written;

s302, after monitoring a data operation request of an OpenCL kernel, a bus interconnection module in the FPGA judges whether a target address field carried in the data operation request belongs to a virtual memory address field of the FPGA, wherein if the judgment result is that the target address field belongs to the virtual memory address field, the OpenCL kernel indicates that a raw memory object or a result memory object which is created in a host-end memory in advance needs to perform data operation;

s303, when the determination result is yes, the bus interconnect module in the FPGA sends the data operation request to the domain conversion module, and specifically, if the determination result is that the target address domain belongs to the virtual memory address domain, the bus interconnect module routes the data operation request to the domain conversion module;

s304, a domain conversion module in the FPGA determines a physical memory address domain corresponding to a target address domain according to a preset mapping relation established in advance, namely the physical memory address domain is the address domain of a raw memory object in a host-end memory or the address domain of a result memory object;

s305, the domain conversion module in the FPGA sends the determined physical memory address domain to the PCIE controller, and specifically, after the domain conversion module determines the physical memory address domain corresponding to the data operation request, transmits the physical memory address domain to the PCIE controller;

s306, a PCIE controller in the FPGA directly performs data operation on a memory object corresponding to the physical memory address field in the memory of the host through a PCIE bus, specifically, the PCIE controller directly reads a raw material memory object stored in the data to be processed through the PCIE bus, or the PCIE controller directly writes the processing result data into the result memory object through the PCIE bus;

and finally, the host responds to the data operation of the PCIE controller on the memory object in the host memory based on the determined physical memory address field, specifically, responds to the PCIE controller to read the data to be processed in the raw material memory object in the host memory, or responds to the PCIE controller to write the processing result data aiming at the data to be processed in the result memory object in the host memory.

, in addition to the situation that the host transmits the data to be processed to the device and the device feeds back the data processing result to the host, the memory of the host can be used as an extended memory of the device, so as to implement automatic expansion of the memory of the device, and when the remaining space of the memory of the device is small, the idle storage space in the memory of the host is fully utilized, so as to ensure the high-speed data processing requirement of the device, and based on this, the data operation request is a data cache request for the situation that the device caches data in the memory of the host;

correspondingly, the step S104 performs data operation on the memory object in the host-side memory according to the determined physical memory address field, and specifically includes:

and storing the data to be cached into a memory object in the memory of the host end according to the determined physical memory address field so as to enable the memory of the host end to be used as an extended memory of the equipment end, namely, the equipment end can temporarily cache the data required by the equipment end into the memory of the host end and read out from the memory of the host end when needed.

Specifically, for the situation that the device side caches data in the memory of the host side, the device side directly stores the data to be cached in a specified memory area corresponding to the determined physical memory address field in the memory of the host side, and subsequently, if the device side needs to use the data, the device side can directly obtain the data from the specified memory area in the memory of the host side.

Further , considering that there may be a case where the device-side memory is not enough, and at this time, the OpenCL kernel does not sense whether the available space of the device-side memory is sufficient, and still initiates a data storage request to the device-side memory, and if data continues to be stored in the device-side memory with a smaller available space, a problem of data loss occurs, based on which the above S102 determines whether the target address field in the data operation request belongs to the virtual memory address field corresponding to the device side, specifically includes:

judging whether the available space of the memory of the equipment end is larger than a preset threshold value or not, specifically, after a data storage request is monitored, even if a target address domain is located in the range of the physical memory address domain, if the available space is determined to be smaller than or equal to the preset threshold value, the available space of the physical memory is insufficient, and at the moment, determining that the target address domain belongs to a virtual memory address domain corresponding to the equipment end;

if not, determining that a target address field carried in the data operation request belongs to a virtual memory address field corresponding to the device side, specifically, when it is determined that the available space of the memory of the device side is not greater than a preset threshold, the bus interconnection module routes the data operation request to the domain conversion module so that the domain conversion module determines a corresponding physical memory address field, at this time, the target address field may not exist in a preset mapping relation established in advance, and for this situation, the preset physical memory address field is determined as the corresponding physical memory address field, and then the data operation controller stores the data into the memory of the host side according to the determined physical memory address field.

In specific embodiments, still taking the device side as the FPGA as an example, as shown in fig. 4, a schematic diagram of an implementation principle of data transmission between the host side and the FPGA is given, specifically:

(1) mapping part of physical Memory (namely Host Memory Bank) in the Memory of the Host terminal to Virtual Memory (namely Virtual Memory Bank) in the Memory of the device terminal of the FPGA in advance by the Host terminal;

(2) an OpenCL kernel (OpenCL kernel) in the FPGA sends out a data acquisition request;

(3) after monitoring the data acquisition request, a bus interconnection module in the FPGA judges whether a target address field carried in the data acquisition request belongs to a virtual memory address field of the FPGA; after determining that the target address field belongs to the virtual memory address field, routing the data acquisition request to an address field conversion module;

(4) after receiving the data acquisition request, an address domain conversion module in the FPGA determines an th physical memory address domain corresponding to a target address domain carried in the data acquisition request according to a pre-stored address domain mapping relation, and transmits the determined th physical memory address domain to the PCIE controller;

(5) after receiving the th physical memory address field, a PCIE controller in the FPGA reads data to be processed from a host memory through a PCIE bus, so that the OpenCL core performs corresponding data processing on the data to be processed, and obtains a data processing result;

(6) an OpenCL kernel (OpenCL kernel) in the FPGA sends out a result storage request;

(7) after monitoring the result storage request, a bus interconnection module in the FPGA judges whether a target address field carried in the result storage request belongs to a virtual memory address field of the FPGA; after determining that the target address domain belongs to the virtual memory address domain, routing the result storage request to an address domain conversion module;

(4) after receiving the result storage request, an address domain conversion module in the FPGA determines a second physical memory address domain corresponding to a target address domain carried in the result storage request according to a pre-stored address domain mapping relation, and transmits the determined second physical memory address domain to the PCIE controller;

(5) after receiving the second physical memory address field, the PCIE controller in the FPGA writes the data processing result into the host memory through the PCIE bus, so that the host obtains the data processing result for the data to be processed from the host memory of the host.

The data operation method in the embodiment of the application judges whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to an equipment end, the virtual memory address field and a physical memory address field of a memory at a host end have a preset mapping relation, if so, the physical memory address field corresponding to the target address field is determined according to the preset mapping relation, and data operation is carried out on the memory at the host end according to the determined physical memory address field.

Corresponding to the data operation methods described in fig. 1 to fig. 4, based on the same technical concept, another embodiment of the present application further provides data operation methods, and fig. 5 is a flowchart of the data operation method provided by the embodiment of the present application, where the method may be executed by a host end communicatively connected to an OpenCL framework-based device end, as shown in fig. 5, the method at least includes the following steps:

s501, creating a memory object for storing data in a host memory for providing data operation for an equipment end, wherein the host end divides the memory object with fixed physical memory address fields in a physical memory for providing data operation for the equipment end;

s502, declaring that the created memory object belongs to a virtual memory address domain; the virtual memory address domain and a physical memory address domain used for providing data operation for an equipment end in a host end memory have a preset mapping relation;

specifically, the host marks a virtual memory address field corresponding to the memory object according to the preset mapping relationship and the physical memory address field of the memory object, and writes configuration information carrying the virtual memory address field into the device to trigger the device to perform data operation in the memory of the host, where at this time, an OpenCL kernel in the device requests that a target address field carried when performing data operation on the memory object belongs to the virtual memory address field;

s503, responding to data operation of the device end in the host-end memory based on a preset mapping relation between a physical memory address domain and a virtual memory address domain;

specifically, after an OpenCL kernel in an equipment end starts working, a data operation request is sent, after a bus interconnection module in the equipment end monitors the data operation request, it is determined whether a target address field carried in the data operation request belongs to a virtual memory address field of the equipment end, if so, a domain conversion module in the equipment end determines a physical memory address field corresponding to the target address field according to a pre-stored address field mapping relationship, a PCIE controller in the equipment end performs data operation on a memory of a host end according to the determined physical memory address field, and the host end responds to the data operation, that is, the equipment end reads data to be processed from the memory of the host end or writes processing result data for the data to be processed into the memory of the host end.

In the embodiment of the present application, a mapping relationship between a physical memory address field and a virtual memory address field in a host memory for providing a device side to perform data operations is predetermined, and it is stated that a memory object for storing specified data belongs to the virtual memory address field, an OpenCL kernel uses both the address field of the device side memory and the virtual memory address field as address fields capable of performing data operations, the OpenCL kernel sends out a data operation request when starting to operate according to pre-written configuration information, when a target address field of the OpenCL kernel that needs to perform data operations belongs to the virtual memory address field, a physical memory address field of the corresponding host side memory is determined by address field translation, and then data operations can be directly performed on the host side memory based on the determined physical memory address field, so that the device side memory is not required to be an intermediary for data transmission between the host side and the device side, therefore, the data transmission efficiency is improved, and the data exchange delay is reduced.

Before creating the memory object for storing data in the above S501, the method further includes:

allocating a physical memory address domain for providing data operation for an equipment end from an address range of a host end memory;

and issuing the allocated physical memory address domain to the equipment end so that the equipment end generates and stores a preset mapping relation between the physical memory address domain and the virtual memory address domain.

Specifically, the host allocates blocks of physical memory with a preset memory size from its own memory, and transmits an address field corresponding to the physical memory to the device, so that the device determines a virtual memory address field outside the address range according to the address range of the device memory, and establishes a preset mapping relationship between the allocated physical memory address field and the virtual memory address field.

The host end can directly store the processing data into a specified memory area in a host end memory aiming at the condition that the host end transmits the data to be processed to the equipment end, and at the moment, the equipment end needs to read the data to be processed from the host end memory of the host end, namely, the data stored in the memory object is the data to be processed;

correspondingly, the step S503 of responding to the data operation of the device end in the host-side memory based on the preset mapping relationship between the physical memory address domain and the virtual memory address domain specifically includes:

storing data to be processed to a corresponding memory object in a host-side memory, specifically, storing the data to be processed to a pre-established raw material memory object;

the response device side acquires the data to be processed from the memory object based on the preset mapping relationship, and specifically, a PCIE controller in the response device side reads the data to be processed from the raw material memory object.

The method comprises the steps that for the condition that a device end feeds back a data processing result to a host end, the device end directly stores the processing result data to a specified memory area corresponding to a determined physical memory address field in a memory of the host end, and at the moment, the host end directly obtains the processing result data from the specified memory area in the memory of the host end, namely the data operation request is a data processing result storage request;

the response equipment end stores result data obtained aiming at the data to be processed into a corresponding memory object in a memory of the host end based on a preset mapping relation, and specifically, a PCIE controller in the response equipment end writes the result data obtained by data processing into a pre-established memory object;

and acquiring result data obtained by performing data processing on the data to be processed from the memory object in which the result data is stored.

The method comprises the steps that a host end memory can be used as an extended memory of an equipment end except for the conditions that the host end transmits data to be processed to the equipment end and the equipment end feeds back a data processing result to the host end, so that the automatic capacity expansion of the equipment end memory of the equipment end is realized, and under the condition that the residual space of the equipment end memory of the equipment end is small, the idle storage space in the host end memory is fully utilized, so that the high-speed data processing requirement of the equipment end is met, and on the basis, the condition that the equipment end caches data in the host end memory is aimed at, namely, the data stored in the memory object are the data to be cached;

correspondingly, in the step S503, in response to the data operation in the host-side memory by the device based on the preset mapping relationship between the physical memory address domain and the virtual memory address domain, specifically:

the response device side stores the data to be cached in the corresponding memory object in the host side memory based on the preset mapping relation, namely, the device side can temporarily cache the data required by the device side in the host side memory and read the data from the host side memory when required.

In the data operation method in the embodiment of the application, a mapping relationship between a physical memory address field and a virtual memory address field in a memory of a host end for providing a device end to perform data operation is predetermined, and a memory object for storing specified data is declared to belong to the virtual memory address field, an OpenCL kernel uses the address field of the memory of the device end and the virtual memory address field as address fields capable of performing data operation at the same time, the OpenCL kernel sends out a data operation request when starting to work according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operation belongs to the virtual memory address field, the physical memory of the corresponding host end is determined through address field conversion, and then data operation can be directly performed on the memory of the host end based on the determined physical memory address field, so that the memory of the device end is not required to be an intermediary for data transmission between the host end and the device end, therefore, the data transmission efficiency is improved, and the data exchange delay is reduced.

It should be noted that the other embodiment of the present application and the embodiment of the present application are based on the same inventive concept of , and therefore, the specific implementation of this embodiment may refer to the implementation of the aforementioned data operation method, and repeated details are not repeated.

Corresponding to the data operation method described in fig. 1 to fig. 4, based on the same technical concept, an embodiment of the present application further provides data operation devices, where the data operation devices are disposed in an OpenCL framework-based device side, and fig. 6 is a schematic diagram of module compositions of the data operation devices disposed in the device side, where the data operation devices are configured to execute the data operation method described in fig. 1 to fig. 4, and as shown in fig. 6, the data operation method includes:

the OpenCL kernel 601 is configured to send a data operation request, and perform corresponding data processing on data to be processed to obtain corresponding processing result data;

a bus interconnect module 602, configured to determine whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to a device side, where the virtual memory address field and a physical memory address field of a host memory have a preset mapping relationship;

a domain conversion module 603, configured to determine, according to the preset mapping relationship, the physical memory address domain corresponding to the target address domain when the target address domain belongs to the virtual memory address domain;

the control module 604 is configured to perform data operation on the host-side memory according to the determined physical memory address domain.

In the embodiment provided by the application, a virtual memory address field with mapping relation with a physical memory address field allocated to a device side in a host side memory for directly performing data operation is predetermined, an OpenCL kernel uses the address field of the device side memory and the virtual memory address field as address fields capable of performing data operation at the same time, the OpenCL kernel sends out a data operation request when starting to work according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operation belongs to the virtual memory address field, the corresponding physical memory address field of the host side memory is determined through address field conversion, and then the direct data operation on the host side memory can be realized based on the determined physical memory address field, so that the device side memory is not required to be used as an intermediary for data transmission between the host side and the device side, thereby improving the data transmission efficiency and reducing the data exchange delay.

Optionally, the domain converting module 603 is further configured to:

acquiring a physical memory address field which is distributed from a host memory and used for providing data operation for a device side;

determining a virtual memory address domain outside an address range according to the address range of the device-side memory;

and generating and storing a preset mapping relation between the physical memory address domain and the virtual memory address domain.

Optionally, the domain converting module 603 is further specifically configured to:

determining the tail address of the address range of the memory at the equipment end;

Optionally, the start address of the virtual memory address field and the end address of the address range are consecutive.

Optionally, the bus interconnection module 602 is specifically configured to:

judging whether the initial address of a target address field carried in the data operation request is larger than the tail address of the address range;

if yes, determining that the target address field carried in the data operation request belongs to the virtual memory address field.

Optionally, the device side includes a field programmable array FPGA based on an OpenCL framework, and the device side memory is an off-chip memory of the FPGA.

Optionally, the control module 604 is specifically configured to:

Optionally, the data operation request is a to-be-processed data acquisition request;

the control module 604, block is specifically configured to:

Optionally, the data operation request is a data processing result storage request;

the control module 604, block is specifically configured to:

Optionally, the data operation request is a data caching request;

the control module 604, block is specifically configured to:

The data operation device in the embodiment of the application judges whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to an equipment end, the virtual memory address field and a physical memory address field of a memory at a host end have a preset mapping relation, if so, the physical memory address field corresponding to the target address field is determined according to the preset mapping relation, and data operation is carried out on the memory at the host end according to the determined physical memory address field.

Based on the same technical concept, corresponding to the data operation method described in fig. 5, an embodiment of the present application further provides data operation devices, where the data operation devices are disposed in a host end communicatively connected to a device end based on an OpenCL framework, and fig. 7 is a schematic diagram of module components of the data operation device disposed in the host end, where the data operation device is configured to execute the data operation method described in fig. 5, and as shown in fig. 7, the data operation device includes:

a memory object creating module 701, configured to create a memory object for storing data in a host memory used for providing a device side to perform data operation;

a memory object declaration module 702, configured to declare that the memory object belongs to a virtual memory address field, where the virtual memory address field and a physical memory address field of the host memory have a preset mapping relationship;

a data operation response module 703, configured to respond to a data operation of the device side in the host memory based on the preset mapping relationship.

Optionally, the apparatus further comprises:

the device comprises an address field writing module, a data processing module and a data processing module, wherein the address field writing module is used for allocating a physical memory address field for providing data operation for a device side from an address range of a host side memory; and issuing the physical memory address domain to the equipment end so that the equipment end generates and stores a preset mapping relation between the physical memory address domain and the virtual memory address domain.

Optionally, the virtual memory address domain is determined by the device side according to an address range of a device side memory.

Optionally, the data stored in the memory object is data to be processed;

the data operation response module 703 is specifically configured to:

storing the data to be processed to the corresponding memory object in the host memory;

and responding to the equipment end to acquire the data to be processed from the memory object based on the preset mapping relation.

Optionally, the data stored in the memory object is result data obtained for the data to be processed;

the data operation response module 703 is specifically configured to:

responding to the device end to store the result data in the host end memory into the corresponding memory object based on the preset mapping relation;

and acquiring the result data from the memory object.

Optionally, the data stored in the memory object is data to be cached;

the data operation response module 703 is specifically configured to:

and responding to the preset mapping relation in the host memory by the equipment end to store the data to be cached into the corresponding memory object.

In the embodiment of the present application, a mapping relationship between a physical memory address field and a virtual memory address field in a host memory for providing a device side to perform data operations is predetermined, and it is stated that a memory object for storing specified data belongs to the virtual memory address field, an OpenCL kernel uses both the address field of the device side memory and the virtual memory address field as address fields capable of performing data operations, the OpenCL kernel sends out a data operation request when starting to operate according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operations belongs to the virtual memory address field, the physical memory address field of the corresponding host side memory is determined by address field translation, and then data operations can be directly performed on the host side memory based on the determined physical memory address field, so that the device side memory is not required to be an intermediary for data transmission between the host side and the device side, therefore, the data transmission efficiency is improved, and the data exchange delay is reduced.

, corresponding to the apparatuses shown in fig. 6 to 7, based on the same technical concept, embodiments of the present application further provide data operating systems, as shown in fig. 8, where the data operating systems specifically include:

based on an OpenCL framework, and a host end communicatively connected to the device end, in specific embodiments, the device end may be communicatively connected to the host end via a PCIE bus;

In the data operating system provided in the embodiment of the present application, a mapping relationship between a physical memory address field and a virtual memory address field in a host memory for providing a device to perform data operations is predetermined, and it is stated that a memory object for storing specified data belongs to the virtual memory address field, an OpenCL kernel uses both the address field of the device memory and the virtual memory address field as address fields capable of performing data operations, the OpenCL kernel sends a data operation request when starting to operate according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operations belongs to the virtual memory address field, the physical memory address field of the corresponding host memory is determined by address field translation, and then data operations can be directly performed on the host memory based on the determined physical memory address field, so that the device memory is not required to be used as an intermediary for data transmission between the host and the device, therefore, the data transmission efficiency is improved, and the data exchange delay is reduced.

It should be noted that the data operation system provided in the embodiment of the present application and the data operation method provided in the embodiment of the present application are based on the same concept of , so that for specific implementation of the embodiment, reference may be made to implementation of the data operation method, and repeated details are not described again.

, corresponding to the method shown in fig. 1 to 5, based on the same technical concept, embodiments of the present application further provide data manipulation devices, which are used for executing the data manipulation method shown in fig. 9.

The data manipulation devices may vary widely in configuration or performance and may include or or more processors 901 and memory 902, where the memory 902 may store 0 or 1 or more stored applications or data, where the memory 902 may be transient or persistent storage, where the applications stored in the memory 902 may include 2 or 3 or more modules (not shown) that may each include 4 series of computer-executable instructions for the data manipulation device, further 5, the processors 901 may be configured to communicate with the memory 902 and execute 6 series of computer-executable instructions in the memory 902 on the data manipulation device, where the data manipulation device may also include or or more power supplies 903, or or more wired or wireless network interfaces 904, or or more input-output interfaces 905, or or more keyboards 906, etc.

In specific embodiments, the data manipulation device includes a memory, and or 0 or more programs, wherein 1 or 2 or more programs are stored in the memory, and 3 or or more programs may include or or more modules, and each module may include series of computer executable instructions for the data manipulation device, and the or or more programs configured for execution by or or more processors include computer executable instructions for:

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

Optionally, the computer executable instructions, when executed, further comprise computer executable instructions for:

before determining whether the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the device side, the method further includes:

acquiring a physical memory address field which is distributed from a host memory and used for providing data operation for a device side;

determining a virtual memory address domain outside an address range according to the address range of the device-side memory;

and generating and storing a preset mapping relation between the physical memory address domain and the virtual memory address domain.

Optionally, when executed, the determining, according to an address range of the device-side memory, a virtual memory address field outside the address range includes:

determining the tail address of the address range of the memory at the equipment end;

Optionally, the start address of the virtual memory address domain and the end address of the address range are consecutive when the computer-executable instructions are executed.

Optionally, when the computer executable instruction is executed, the determining whether the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the device side includes:

judging whether the initial address of a target address field carried in the data operation request is larger than the tail address of the address range;

if yes, determining that the target address field carried in the data operation request belongs to the virtual memory address field.

Optionally, when executed, the device side includes a field programmable array FPGA based on an OpenCL framework, and the device side memory is an off-chip memory of the FPGA.

Optionally, when executed, the performing, by the computer executable instruction, data operation on the host-side memory according to the determined physical memory address domain includes:

Optionally, when the computer-executable instructions are executed, the data operation request is a to-be-processed data acquisition request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

Optionally, when the computer-executable instructions are executed, the data operation request is a data processing result storage request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

Optionally, when the computer-executable instructions are executed, the data operation request is a data caching request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

The data operation device in the embodiment of the application judges whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to a device end, the virtual memory address field and a physical memory address field of a memory at a host end have a preset mapping relation, if so, the physical memory address field corresponding to the target address field is determined according to the preset mapping relation, and data operation is carried out on the memory at the host end according to the determined physical memory address field.

In another specific embodiments, the data manipulation device includes a memory and or 0 or more programs, wherein 1 or 2 or more programs are stored in the memory, and 3 or or more programs may include or or more modules, and each module may include series of computer executable instructions for the data manipulation device, and the or or more programs configured to be executed by or or more processors include computer executable instructions for:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

Optionally, the computer executable instructions, when executed, further comprise computer executable instructions for:

before creating the memory object for storing data, the method further comprises the following steps:

allocating a physical memory address domain for providing data operation for an equipment end from an address range of a host end memory;

Optionally, when the computer-executable instruction is executed, the virtual memory address domain is determined by the device side according to an address range of a device side memory.

Optionally, when the computer executable instruction is executed, the data stored in the memory object is to-be-processed data;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

storing the data to be processed to the corresponding memory object in the host memory;

and responding to the equipment end to acquire the data to be processed from the memory object based on the preset mapping relation.

Optionally, when the computer executable instruction is executed, the data stored in the memory object is result data obtained for the data to be processed;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

responding to the device end to store the result data in the host end memory into the corresponding memory object based on the preset mapping relation;

and acquiring the result data from the memory object.

Optionally, when the computer executable instruction is executed, the data stored in the memory object is data to be cached;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

and responding to the preset mapping relation in the host memory by the equipment end to store the data to be cached into the corresponding memory object.

In the data operation device in the embodiment of the application, a mapping relationship between a physical memory address field and a virtual memory address field in a host memory for providing a device to perform data operation is predetermined, and it is stated that a memory object for storing specified data belongs to the virtual memory address field, an OpenCL kernel uses both the address field of a device memory and the virtual memory address field as address fields capable of performing data operation, the OpenCL kernel sends out a data operation request when starting to work according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operation belongs to the virtual memory address field, the corresponding physical memory address field of the host memory is determined through address field conversion, and then data operation can be directly performed on the host memory based on the determined physical memory address field, so that the device memory is not required to be used as an intermediary for data transmission between the host and the device, therefore, the data transmission efficiency is improved, and the data exchange delay is reduced.

, corresponding to the methods shown in fig. 1 to 5, based on the same technical concept, embodiments of the present application further provide storage media for storing computer-executable instructions, and in specific embodiments, the storage media may be a usb disk, an optical disk, a hard disk, and the like, and the computer-executable instructions stored in the storage media, when being executed by a processor, implement the following processes:

if so, determining the physical memory address domain corresponding to the target address domain according to the preset mapping relation;

and performing data operation on the host memory according to the determined physical memory address domain.

Optionally, the storage medium stores computer executable instructions that, when executed by the processor, further implement the following process:

before determining whether the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the device side, the method further includes:

acquiring a physical memory address field which is distributed from a host memory and used for providing data operation for a device side;

determining a virtual memory address domain outside an address range according to the address range of the device-side memory;

and generating and storing a preset mapping relation between the physical memory address domain and the virtual memory address domain.

Optionally, when executed by a processor, the determining, according to an address range of a device-side memory, a virtual memory address range outside the address range includes:

determining the tail address of the address range of the memory at the equipment end;

Optionally, the storage medium stores computer-executable instructions that, when executed by the processor, the start address of the virtual memory address field is contiguous with the end address of the address range.

Optionally, when the computer-executable instruction stored in the storage medium is executed by the processor, the determining whether the target address field carried in the data operation request belongs to the virtual memory address field corresponding to the device side includes:

judging whether the initial address of a target address field carried in the data operation request is larger than the tail address of the address range;

if yes, determining that the target address field carried in the data operation request belongs to the virtual memory address field.

Optionally, when the computer-executable instructions stored in the storage medium are executed by the processor, the device side includes a field-programmable array FPGA based on an OpenCL framework, and the device side memory is an off-chip memory of the FPGA.

Optionally, when executed by a processor, the computer-executable instructions stored in the storage medium perform data operations on the host-side memory according to the determined physical memory address domain, including:

Optionally, when the computer-executable instructions stored in the storage medium are executed by the processor, the data operation request is a to-be-processed data acquisition request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

Optionally, the storage medium stores computer-executable instructions that, when executed by the processor, the data operation request is a data processing result storage request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

Optionally, the storage medium stores computer-executable instructions that, when executed by the processor, the data operation request is a data caching request;

the performing data operation on the memory object in the host-side memory according to the determined physical memory address domain includes:

When the computer executable instruction stored in the storage medium in the embodiment of the application is executed by a processor, whether a target address field carried in a data operation request belongs to a virtual memory address field corresponding to an equipment end is judged, the virtual memory address field has a preset mapping relation with a physical memory address field of a memory at a host end, if so, a physical memory address field corresponding to the target address field is determined according to the preset mapping relation, and data operation is performed on the memory at the host end according to the determined physical memory address field.

In another specific embodiments, the storage medium may be a usb disk, an optical disk, a hard disk, etc., and the storage medium stores computer executable instructions that when executed by the processor implement the following process:

creating a memory object for storing data in a host memory for providing data operation of an equipment end;

and responding to the data operation of the device side in the host side memory based on the preset mapping relation.

Optionally, the storage medium stores computer executable instructions that, when executed by the processor, further implement the following process:

before creating the memory object for storing data, the method further comprises the following steps:

allocating a physical memory address domain for providing data operation for an equipment end from an address range of a host end memory;

Optionally, when the computer-executable instructions stored in the storage medium are executed by the processor, the virtual memory address domain is determined by the device side according to an address range of the device side memory.

Optionally, when the computer executable instructions stored in the storage medium are executed by the processor, the data stored in the memory object is to-be-processed data;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

storing the data to be processed to the corresponding memory object in the host memory;

and responding to the equipment end to acquire the data to be processed from the memory object based on the preset mapping relation.

Optionally, when the computer-executable instructions stored in the storage medium are executed by the processor, the data stored in the memory object is result data obtained for the data to be processed;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

responding to the device end to store the result data in the host end memory into the corresponding memory object based on the preset mapping relation;

and acquiring the result data from the memory object.

Optionally, when the computer executable instructions stored in the storage medium are executed by the processor, the data stored in the memory object is data to be cached;

the responding to the data operation of the device side in the host side memory based on the preset mapping relation comprises:

and responding to the preset mapping relation in the host memory by the equipment end to store the data to be cached into the corresponding memory object.

When executed by a processor, a computer executable instruction stored in a storage medium in the embodiment of the application determines a mapping relationship between a physical memory address field and a virtual memory address field in a host memory for providing a device side to perform data operation in advance, and declares that a memory object for storing specified data belongs to the virtual memory address field, an OpenCL kernel takes the address field of the device side memory and the virtual memory address field as address fields capable of performing data operation at the same time, the OpenCL kernel sends a data operation request when starting to work according to pre-written configuration information, when a target address field of the OpenCL kernel requiring data operation belongs to the virtual memory address field, the physical memory address field of the corresponding host memory is determined through address field conversion, and then data operation can be directly performed on the host memory based on the determined physical memory address field, therefore, the memory of the equipment end is not required to be used as an intermediary for data transmission between the host end and the equipment end, so that the data transmission efficiency is improved, and the data exchange delay is reduced.

In the 90 th generation of 20 th century, improvements to technologies can be clearly distinguished as Hardware improvements (for example, improvements to Circuit structures such as diodes, transistors, switches, and the like) or software improvements (improvements to method flow), however, as technology develops, many of the current method flow improvements can be considered as direct improvements to Hardware Circuit structures, designers almost all obtain corresponding Hardware Circuit structures by Programming the improved method flow into Hardware circuits, therefore, it cannot be said that the improvements to method flow cannot be realized by Hardware entity modules, for example, Programmable Logic Devices (PLDs) (for example, Field Programmable arrays (FPGAs)) are integrated circuits whose Logic functions are determined by user Programming devices, and integrated circuits whose Logic functions are "integrated" on pieces by self Programming of designers are "integrated" on digital systems without requiring many kinds of manufacturers to design and manufacture integrated circuits, and integrated circuits are easily developed by Hardware drivers (Hardware Programming languages, such as software programs, Hardware programs, software programs, Hardware programs, software programs, Hardware, software, Hardware programs, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software, Hardware, software.

A controller may be implemented in any suitable manner, for example, in the form of, for example, a microprocessor or processor and a computer readable medium storing computer readable program code (e.g., software or firmware) executable by the (micro) processor, logic , switches, Application Specific Integrated Circuits (ASICs), programmable logic controllers, and embedded microcontrollers, examples of which include, but are not limited to, microcontrollers 625D, Atmel AT91SAM, Microchip PIC18F26K20, and silicon Labs C8051F320, which may also be implemented as part of the control logic of a memory . in addition to implementing a controller in pure computer readable program code, one skilled in the art will also recognize that such controllers may be fully programmed with method steps to cause the controller to implement the same functions as various hardware components within logic , switches, Application Specific Integrated circuits, programmable logic controllers, embedded microcontrollers, etc. accordingly, such controllers may be considered as hardware components for implementing the various functions of an apparatus, or even as hardware components within an apparatus.

The systems, apparatuses, modules or units illustrated in the above embodiments may be embodied as a computer chip or entity, or as an article of manufacture with some functionality exemplary implementing devices are computers.

For convenience of description, the above devices are described as being functionally separated into various units, it is understood that the functions of the units may be implemented in the same or more software and/or hardware when implementing the present application.

Moreover, the present application may take the form of a computer program product embodied on or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

It is to be understood that each flow and/or block in the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions which can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flow diagram flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In typical configurations, a computing device includes or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises the series of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

The present application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer , generally including routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.

The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

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