阅读说明：本技术 集成式传感器 (Integrated sensor ) 是由 M·特拉基玛斯 A·阿列克谢耶夫 于 2018-03-26 设计创作，主要内容包括：在集成电路中接收信号的各种方法包括实施两个连续的信号操作级,以及采用具有AC耦合网络和缓冲电路的接口用于将第一信号操作级的输出阻抗和共模电平与第二信号操作级的输入阻抗和共模电平去耦而不会降低任何一级的性能。(Various methods of receiving signals in an integrated circuit include implementing two successive signal manipulation stages and employing an interface with an AC coupling network and buffer circuits for decoupling the output impedance and common mode level of a first signal manipulation stage from the input impedance and common mode level of a second signal manipulation stage without degrading the performance of either stage.)

1. a sensor for receiving a signal in an integrated circuit, the sensor comprising:

a circuit for applying at least two successive operating stages to the received signal; and

an interface comprising an AC coupling network and a buffer circuit for decoupling an output impedance and a first common mode level of a first of two successive stages from an input impedance and a second common mode level of a second of the two successive stages without degrading performance of either stage.

2. The sensor of claim 1, wherein the buffer circuit comprises a source follower.

3. The sensor of claim 1, wherein the AC coupling network comprises at least one capacitor and at least one resistor.

4. The sensor of claim 1, wherein the at least two successive stages comprise an amplification stage and a frequency conversion stage.

5. The sensor of claim 4, wherein the amplification stage comprises a programmable gain amplifier.

6. The sensor of claim 4, wherein the frequency conversion stage comprises a voltage-mode passive mixer.

7. The sensor of claim 1, wherein the at least two consecutive stages comprise two amplification stages.

8. The sensor of claim 7, further comprising at least one switch connected to at least one of the two stages for providing gain adjustment.

9. The sensor of claim 1, further comprising circuitry for applying a third signal manipulation stage to the received signal, wherein the third stage and a first of the two successive stages are connected in parallel to a second of the two successive stages via the interface.

10. The sensor of claim 9, wherein the third stage and a first of the two successive stages comprises an amplification stage and a second of the two successive stages comprises a frequency conversion stage.

11. The sensor of claim 9, wherein the third stage and a first of the two successive stages comprises a frequency conversion stage and a second of the two successive stages comprises an amplification stage.

12. An NMR apparatus comprising:

an NMR coil configured to surround a sample;

a receiver for receiving an NMR signal from a sample, the receiver comprising (i) circuitry for applying at least two successive operational stages to the received NMR signal, and (ii) an interface comprising an AC coupling network and a buffer circuit for decoupling an output impedance and a first common mode level of a first of the two successive stages from an input impedance and a second common mode level of a second of the two successive stages without degrading performance of either stage; and

a controller configured to analyze the received NMR signals.

13. The NMR apparatus of claim 12, wherein the buffer circuit comprises a source follower.

14. The NMR apparatus of claim 12, wherein the AC coupling network comprises at least one capacitor and at least one resistor.

15. The NMR apparatus of claim 12, wherein the two successive stages comprise an amplification stage and a frequency conversion stage.

16. The NMR apparatus of claim 12, wherein the two successive stages comprise two amplification stages.

17. The NMR apparatus of claim 12, further comprising circuitry to apply a third signal manipulation stage to the received N MR signals, wherein the third stage and a first of the two successive stages are connected in parallel to a second of the two successive stages via the interface.

18. The NMR apparatus of claim 17, wherein the third stage and a first of the two successive stages comprises an amplification stage and a second of the two successive stages comprises a frequency conversion stage.

19. The NMR apparatus of claim 17, wherein the third stage and a first of the two successive stages comprises a frequency conversion stage and a second of the two successive stages comprises an amplification stage.

20. A method of receiving a signal in an integrated circuit, the method comprising:

providing at least two successive signal manipulation stages; and

an interface is provided for decoupling the output impedance and the first common mode level of a first of the two successive stages from the input impedance and the second common mode level of a second of the two successive stages without degrading the performance of either stage.

21. A sensor for receiving a signal in an integrated circuit, the sensor comprising:

a voltage-mode passive mixer to downconvert one or more frequencies of the received signal;

a baseband output buffer; and

a transconductance amplifier coupled to the voltage-mode passive mixer for receiving an output signal therefrom and to the baseband output buffer for providing an input signal thereto, the transconductance amplifier providing a high impedance load to the voltage-mode passive mixer and shielding the baseband output buffer from high frequency feed-through.

22. The sensor of claim 21, wherein the voltage-mode passive mixer comprises a plurality of CMOS switches.

23. The sensor of claim 22, wherein the voltage-mode passive mixer comprises a source follower for driving the CM OS switch.

24. The sensor of claim 23, wherein the voltage-mode passive mixer comprises an AC coupling capacitor or a DC biasing resistor for suppressing DC offset in the voltage-mode passive mixer.

25. The sensor of claim 21, further comprising one or more filter capacitors between the voltage-mode passive mixer and the baseband output buffer for filtering the upconverted input signal.

26. The sensor of claim 21, further comprising a DAC for fine-tuning an offset at an output of the baseband output buffer.

27. The sensor of claim 21, wherein the baseband output buffer comprises a transimpedance amplifier.

28. The sensor of claim 21, further comprising one or more feedback resistors coupled to the baseband output buffer for converting the input signal from a current domain to a voltage domain.

29. An NMR apparatus comprising:

an NMR coil configured to surround a sample;

a receiver for receiving NMR signals from a sample, the receiver comprising (i) a voltage-mode passive mixer for down-converting a frequency of the received NMR signals, (ii) a baseband output buffer, and (i ii) a transconductance amplifier coupled to the voltage-mode passive mixer for receiving output signals therefrom and to the baseband output buffer for providing input signals thereto, the transconductance amplifier providing a high-impedance load to the voltage-mode passive mixer and shielding the baseband output buffer from high-frequency feedthroughs; and

a controller configured to analyze the received NMR signals.

30. The NMR apparatus of claim 29, wherein the voltage-mode passive mixer comprises a plurality of CMOS switches.

31. The NMR apparatus of claim 30, wherein the voltage-mode passive mixer comprises a source follower to drive the cmos switch.

32. The NMR apparatus of claim 31, wherein the voltage-mode passive mixer comprises an AC coupling capacitor or a DC bias resistor to suppress DC offset in the voltage-mode passive mixer.

33. The NMR apparatus of claim 29, further comprising one or more filter capacitors between the voltage-mode passive mixer and the baseband output buffer for filtering the upconverted input signal.

34. The NMR apparatus of claim 29, further comprising a DAC for fine-tuning an offset at an output of the baseband output buffer.

35. The NMR apparatus of claim 29, wherein the baseband output buffer comprises a transimpedance amplifier.

36. The NMR apparatus of claim 29, further comprising one or more feedback resistors coupled to the baseband output buffer, for converting the input signal from a current domain to a voltage domain.

37. A method of receiving a signal in an integrated circuit, the method comprising:

providing frequency conversion means for down-converting the frequency of the received signal;

providing first amplifying means for converting the signal from the current domain to the voltage domain; and

second amplifying means are provided coupled to the frequency conversion means for receiving the output signal therefrom and to the first amplifying means for providing the input signal thereto, the second amplifying means providing a high impedance load to the frequency conversion means and shielding the first amplifying means from high frequency feed-through.

38. A Programmable Gain Amplifier (PGA) comprising:

an open-loop source degeneration amplifier comprising a pair of input devices;

a pair of super-g_mFeedback loops, each coupled to one of the input devices, for increasing its effective transconductance; and

constant-g_mAnd the bias circuit is used for setting the bias current of the device in the open-loop source degenerated amplifier.

39. The PGA of claim 38, wherein the input devices comprise source degenerate differential pairs.

40. The PGA of claim 38, wherein the open-loop source degeneration amplifier includes a programmable resistor for setting a gain of the PGA.

41. The PGA of claim 38, further comprising electronics for forcing a constant current through the input device.

42. The PGA of claim 41, wherein the electronic device comprises a transistor.

43. The PGA of claim 38, wherein the super-g is a super-g_mThe feedback loop includes a transistor.

44. The PGA of claim 38, wherein the constant-g_mThe bias circuit is configured to automatically adjust the bias current to maintain a constant effective transconductance of the input device as operating conditions, processes, voltages, or temperatures change.

45. The PGA of claim 38, further comprising a current mirror and a resistor for converting a current signal to a voltage signal at an output of the PGA.

46. An NMR apparatus comprising:

an NMR coil configured to surround a sample;

receiver comprising an analog front end junctionA structure and a PGA for adjusting a gain of a front-end structure based at least in part on an amplitude of an NMR signal received from a sample, the PGA including (i) an open-loop source-degenerate amplifier including a pair of input devices, (ii) a pair of super-gs_mFeedback loops, each feedback loop coupled to one of the input devices to increase its effective transconductance, and (i ii) constant-g_mA bias circuit for setting a bias current of a device in the open-loop source degeneration amplifier; and

a controller configured to analyze the received NMR signals.

47. The NMR apparatus of claim 46, wherein the input device comprises a source degenerate differential pair.

48. The NMR apparatus of claim 46, wherein the open-loop source degeneration amplifier comprises a programmable resistor to set a gain of the PGA.

49. The NMR apparatus of claim 46, further comprising electronics to force the current flowing through the input device constant.

50. The NMR apparatus of claim 49, wherein the electronics comprise transistors.

51. The NMR apparatus of claim 46, wherein the super-g_mThe feedback loop includes a transistor.

52. The NMR apparatus of claim 46, wherein the constant-g_mThe bias circuit is configured to automatically adjust the bias current to maintain a constant effective transconductance of the input device as operating conditions, processes, voltages, or temperatures change.

53. The NMR apparatus of claim 46, further comprising a current mirror and a resistor to convert a current signal to a voltage signal at an output of the PGA.

54. A method of adjusting gain of a signal received in an integrated circuit, the method comprising:

amplifying the received signal using an open-loop source degeneration amplifier comprising a pair of input devices;

enhancing the effective transconductance of the input device; and

the bias current of the devices in the open-loop source degeneration amplifier is set.

Technical Field

Background

NMR systems typically include transceiver circuitry for transmitting signals to and receiving echo signals from a sample under test; and a processor for analyzing the echo signals to obtain imaging and/or material information of the sample. Recently, efforts have been made to miniaturize conventional NMR systems, particularly NMR transceivers. Numerous advantages of miniaturization include low cost, portability, and improved signal quality from microcoils that closely surround small sample sizes.

However, there may be many difficulties in the actual design and construction of miniaturized NMR transceiver circuits. For example, designing interfaces between multiple components in a Radio Frequency (RF) receiver to provide overall gain, bandwidth, noise figure, and other parameters without degrading performance when the components are connected can be challenging. Fig. 1A shows the architecture of a conventional RF receiver 100, including several amplification stages: the first stage 102 sets the overall noise performance of the receiver and the second stage 104 provides an amount of programmable gain using, for example, a Programmable Gain Amplifier (PGA) to optimize the dynamic range of an analog-to-digital converter (ADC) used to digitize the receiver output. Additionally, the RF receiver may include one or more integrated mixers (e.g., I/Q mixers) 106 to down-convert an input signal to a lower frequency and generate in-phase (I) and quadrature (Q) output signals. The frequency of the down-converted input signal helps to relax the requirements of the ADC used to digitize the signal. Further, a combination of amplification, filtering, and buffering 108 may be employed after the mixer 106 to drive the ADC.

The receiver architecture described above may be implemented in a split or integrated form and may be applied to many other applications besides RF. In a split implementation, the input and output impedances are typically matched to 50 Ω to standardize the interface between the different finished components. However, this is impractical for integrated solutions due to size and power limitations. Rather, most integrated solutions require the interface between the components to be custom designed for each chip. This results in a design burden and increases costs, making it impractical to quickly reconfigure the receiver architecture to meet the needs of different applications.

Accordingly, there is a need for a method of providing a standardized interface between the various components of an integrated receiver to allow for rapid assembly of different analog front end configurations from a standard set of constituent elements. When connected, such an interface preferably does not degrade the performance of the overall gain, bandwidth, noise figure and other parameters of each analog front end configuration.

In addition, it is difficult to design an integrated mixer 106 with sufficient power and area efficiency that also meets a variety of design requirements (e.g., linearity, bandwidth, dynamic range, noise, gain mismatch, and offset). This is especially true at the lower supply voltages seen in modern semiconductor devices. If these frequently conflicting design requirements are not met, the overall performance of the receiver will be affected.

Integrated mixers are generally classified into two categories depending on whether the mixer core circuitry is active or passive. An exemplary active mixer is a conventional Gilbert Cell (Gilbert Cell) mixer 112 shown in fig. 1B. In the Gilbert cell mixer 112, Q is first used₁Device (e.g., transistor) 114 converts a Radio Frequency (RF) input signal to a current, which is then passed through Q₂Device 116 is mixed with a Local Oscillator (LO) signal. IF the inputs to the RF and LO ports comprise discrete sine waves, the Intermediate Frequency (IF) output across the load resistor 118 may comprise a frequency of (f)_RF–f_LO) And (f)_RF+f_LO) The component (c). A baseband filter may be used after mixer 112 to match a frequency of (f)_RF+f_LO) Filtering the up-converted signal; this leaves a frequency of (f)_RF–f_LO) The desired baseband output. One problem with the gilbert cell mixer 112 is due to stackingDevice Q₁、Q₂And tail current source 120, resulting in limited headroom and poor linearity. In addition, the active mixer 112 may generate 1/f noise, which may reduce the signal-to-noise ratio of the input signal when the input signal is converted to a baseband frequency. These problems are particularly important in modern Complementary Metal Oxide Semiconductor (CMOS) processes, which have lower supply voltages and greater 1/f noise than bipolar devices.

On the other hand, passive mixer architectures have recently become more popular, especially in low voltage CMOS processes, due to the improved linearity and reduced 1/f noise they provide compared to active mixers. Fig. 1C depicts a typical exemplary passive mixer architecture 132; the mixer is classified as a current mode mixer because the input transconductance stage 134 is using the mixer switch S₁136 and S₂138 convert the RF input signal to a current before mixing it with the LO signal. The LO signal in the passive mixer 132 is a rail-to-rail square wave that fully turns on one set of switches 136, 138 and fully turns off the other set based on the polarity of the signal. This feature distinguishes the passive mixer 132 from the active mixer 112, which has mixer switches biased in the active area 112. The output current of the passive mixer switches 136, 138 flows through a feedback resistor 140 of an output transimpedance stage 142 to provide a voltage. A capacitor may be placed in parallel with the feedback resistor 140 to filter out undesired up-converted signals.

Because stacked devices are not required in transconductance stage 134 (and the voltage variation across the output of transconductance stage 134 is small in passive current-mode mixer 132), the linearity of passive current-mode mixer 132 is generally improved compared to gilbert cell mixer 112. In addition, because no dc current flows through the switches 136, 138, 1/f noise is improved in the passive current mode mixer 132.

However, since the signal is current-mode, the current-mode mixer architecture 132 cannot easily suppress Direct Current (DC) offset from the transconductance stage 134. As a result, conventional passive current-mode mixers require complex trimming routines (trimming routine) to inject current into one of the switching nodes operating at RF frequencies. Further, non-linearity may still occur because the gain of the current-mode mixer 132 depends on the voltage-dependent transconductance stage 134. In addition, it may be difficult to match the mixer gain of the RF frequency without loading the preceding stage. The latter problem is of particular interest in the orthogonal receiver architecture shown in fig. 1B.

Therefore, there is also a need for a method that allows a mixer 106 in a receiver to downconvert a received signal to a baseband frequency with improved linearity and reduced 1/f noise while avoiding gain, bandwidth and offset mismatches between the mixers.

Furthermore, it is difficult to design an integrated PGA 104 with power efficiency and characterized by constant gain and well-defined step size across process, voltage and temperature (PVT) variations, as well as good linearity and high dynamic range and bandwidth. If these frequently conflicting design requirements are not met, the overall performance of the receiver will be affected.

PGAs are commonly used in analog front ends of many electronic receivers and analog sensors in a variety of applications. The PGA allows the gain of the front-end to be adjusted according to the amplitude of the input signal, thereby enabling the amplitude of the receiver or sensor output to be optimised for a wide dynamic range of the input signal; this in turn allows the signal-to-noise ratio (SNR) to be maximized without allowing large input signal amplitudes to saturate the output stage. In addition, the PGA relaxes the requirements of analog-to-digital converters (ADCs) that are typically used to digitize the output signal by optimizing the signal amplitude to fit the dynamic range of the ADC.

Since the PGA typically has to handle a wide range of signal amplitudes, it is important that the gain of the amplifier, once set, must remain constant as the input signal amplitude varies to avoid distorting the signal. In addition, the amplifier gain should remain constant during operating condition changes, including PVT variations, to avoid the need to recalibrate the system gain (or over design the programmable gain step size and total range to compensate for these changes). It is also desirable to explicitly define the programmable step size of the PGA over these changes to simplify the gain control algorithm.

Fig. 1D depicts a conventional closed-loop PGA 150. The gain of PGA 150 is defined by the impedance ratio R_F/R₁Determines, and thus can be controlled by changing, the programmable feedback resistor R_FIs adjusted. Programmable resistor R_FTypically implemented as a network of resistors and switches, and the switches are digitally programmed to provide a selected resistance for each switch setting. In switched capacitor embodiments, resistor R_FBut may be replaced by a capacitor. The PGA 150 in fig. 1D provides well-defined gain steps and high linearity and resistance to PVT variations. However, the closed-loop PGA 150 may suffer from limited bandwidth or high power consumption.

Fig. 1E depicts a conventional open-loop PGA160 that provides improved power efficiency for higher bandwidth applications. The gain of the PGA160 depends on the transconductance g of the source degenerate differential pair 162_mAnd resistance R of load resistor 164₂. Gain may be achieved by changing the resistance R of the programmable source degeneration resistor 166_FOr the resistance R of the load resistor 164₂To adjust. If the transconductance of the input device is much larger than 1/R₂Then the effective transconductance of the source degenerate differential pair 162 depicted in FIG. 1E is very close to 1/R₂(ii) a Thus, similar to the closed loop architecture shown in FIG. 1D, the gain of the amplifier is set by the ratio of the two resistors 164, 166. However, in practice, it is challenging to meet this requirement with higher bandwidth within a reasonable power budget. As a result, the gain of the PGA160 depends on the transconductance of the input device, which varies with signal amplitude and PVT variations. This can lead to poor performance (e.g., reduced linearity, unstable gain, and uncertain gain step) of the open-loop PGA160 compared to the performance of the closed-loop PGA 150.

Therefore, there is also a need for a method to stabilize the gain of the PGA in the receiver (or another sensor) independent of the amplitude and PVT variations of the input signal. In addition, the PGA is expected to provide a wide bandwidth with low power consumption.

Disclosure of Invention

Embodiments of the present invention provide a method for implementing a standard interface that connects different components in an integrated sensor (e.g., an RF receiver). Interface embodiments of the present invention include circuitry that allows each component to "see" similar electrical properties at its inputs and outputs; thus, the interface can be used to quickly assemble different components from a set of standard components, and can be easily reconfigured to meet the needs of a wide range of applications and operating conditions. Thus, the approach described herein provides a receiver architecture that is easy to reconfigure and greatly reduces the design burden.

In various embodiments, the interface includes an Alternating Current (AC) coupling network and a buffer circuit that may precede or follow the AC coupling network. In one embodiment, the buffer circuit includes a source follower; the low input capacitance and output impedance of the source follower buffer can decouple the trade-off between the output impedance and the input impedance of two successive stages in the sensor, advantageously allowing each stage to be optimized for noise, gain, bandwidth and power independently of the subsequent stage. Similarly, the AC coupling network may decouple the output and input common mode levels (e.g., voltage levels or current levels) of each stage, allowing the output common mode levels (e.g., voltage levels or current levels) of each stage to be optimized for performance without regard to the requirements of the later stages in the integrated sensor/receiver. In addition, the AC coupling network of the interface may eliminate Direct Current (DC) offset between the two stages, which may eliminate the need for an offset trimming circuit to prevent the DC offset from saturating the output of the sensor/receiver. In some embodiments, the size of the capacitors in the AC coupling network is optimized based on the bandwidth requirements of the application, thereby enabling an area efficient design; this is particularly useful for parallel applications requiring multiple analog front ends. In one embodiment, the interface is used to bias the input devices of each stage of the sensor/receiver at the same level; this may simplify the architectural design of the sensor/receiver.

In one embodiment, one or more switches are employed in one or more stages of the sensor/receiver to provide a coarse gain adjustment for extending the overall programmable gain of the sensor/receiver. To avoid the capacitance introduced by the switches, an ac coupling network and snubber circuit of the interface may be implemented between successive stages. In some embodiments, the interface is integrated with a mixer (e.g., a voltage-mode passive mixer) for decoupling the drive requirements of the mixer switch from the pre-amplifier (e.g., PGA). As a result, the same PGA can be used for both stages in the PGA package of the receiver, even when the driving requirements of the frames following them are different.

Further, in some embodiments, an interface is introduced between stages to allow multiple front-end components of the sensor/receiver to be connected in parallel to a common component without affecting the performance of each individual component. The interface may prevent the output stage of each front-end component from loading other front-end components and may disconnect unused front-end components from the common component by simply shutting them down; this approach advantageously eliminates the need for a switching network implemented in a conventional approach.

In addition, with the interface, a single front-end component can drive multiple parallel components in the sensor/receiver without redesigning the interface between them. This architecture may be particularly beneficial for NMR systems that allow simultaneous analysis of multiple frequencies within a received NMR signal. It should be noted that NMR is an exemplary application that may benefit from implementing a reconfigurable sensor/receiver architecture. However, one of ordinary skill in the art will appreciate that any suitable sensor and/or application may implement the sensor/receiver architecture described herein, and thus is within the scope of the present invention.

Another embodiment of the present invention provides a method of down-converting a received signal to a baseband frequency using one or more voltage-mode passive mixers in conjunction with a baseband output buffer. In one embodiment, the voltage mode mixer includes a set of CMOS switches driven by a source follower buffer, and the baseband output buffer includes an output transimpedance stage. This architecture keeps the received input signal in the voltage domain so that any unwanted DC offset in the mixer core can be suppressed. In addition, the implementation of a voltage-mode passive mixer may simplify the design of the circuit driving the mixer switches (compared to circuits driving current-mode passive mixers in conventional approaches) and shift the design complexity to the baseband circuit after the mixer. Thus, embodiments of the present invention make it easier to match the gain, bandwidth and offset between two mixers in a quadrature receiver.

In addition, a transconductance stage may be placed between the mixer switches and the output transimpedance stage in order to provide the mixer switches with a high impedance load required for voltage mode operation. In one embodiment, the high impedance load is more than one hundred times greater than the output impedance of the circuit driving the mixer switch (e.g., source follower buffer). A filter capacitor may also be included at the output of the transconductance stage to filter out the upconverted signal and shield the transimpedance output buffer from high frequency feedthrough (e.g., the frequency (f) associated with the upconverted signal depicted in fig. 1B)_RF+f_LO) The influence of (c). This architecture allows a simple current digital-to-analog converter (DAC) to inject an offset trim current at the node between the transconductance and the transimpedance stage. Since the node operates at baseband frequency, the design of the trim DAC may not be as complex as the current mode architecture operating at higher frequencies.

Yet another embodiment of the present invention allows the gain of the integrated PGA to be controlled with high linearity and well-defined gain steps over a wide input dynamic range and bandwidth and over a wide range of PVT variations and operating conditions. In one embodiment, the PGA includes an open-loop source degeneration amplifier with an input device and a digitally programmable source degeneration resistor for setting gain. In some embodiments, the PGA includes one or more super transconductances (super-g) around the input device of the open-loop source degeneration amplifier_m) Feedback circuit and constant transconductance (constant-g) setting bias current for all devices in PGA_m) A biasing circuit. This embodiment allows the PGA to provide constant gain and well-defined gain steps over a wide range of input signals and various operating conditions. In addition, the combination of these circuits advantageously results in a more power and area efficient design than conventional architectures as shown in fig. 1D and 1E.

Accordingly, in one aspect, the present invention relates to a sensor for receiving a signal in an integrated circuit. In various embodiments, the sensor includes circuitry for applying two or more successive stages of operation to the received signal; an interface having an AC coupling network and a buffer circuit for decoupling an output impedance and a first common mode level of a first stage of a successive stage from an input impedance and a second common mode level of a second stage of the successive stage without degrading performance of either stage. In one embodiment, the buffer circuit includes a source follower. In addition, the AC coupling network includes one or more capacitors and one or more resistors.

In one embodiment, the successive stages include an amplification stage and a frequency conversion stage. The amplifier stage may comprise a programmable gain amplifier. Additionally, the frequency translation stage may include a voltage mode passive mixer. In another embodiment, the successive stages comprise two amplification stages. The sensor may include one or more switches connected to one or more successive stages to provide gain adjustment. Additionally, the sensor may further comprise circuitry for applying a third signal manipulation stage to the received signal; the third stage and the first of the successive stages may be connected in parallel to the second of the successive stages via the interface. In some embodiments, the third stage and a first stage of the successive stages comprise an amplification stage and a second stage of the successive stages comprises a frequency conversion stage. Alternatively, the third stage and a first stage of the successive stages may comprise a frequency conversion stage and a second stage of the successive stages may comprise an amplification stage.

In another aspect, the invention relates to an NMR apparatus comprising an NMR coil configured to enclose a sample; a receiver for receiving NMR signals from a sample, the receiver having (i) circuitry for applying two or more successive operational stages to the received NMR signals, and (ii) an interface comprising an AC coupling network and a buffer circuit, the interface for decoupling an output impedance and a first common mode level of a first of the two successive stages from an input impedance and a second common mode level of a second of the two successive stages without degrading performance of either stage; and a controller configured to analyze the received NMR signal. In one embodiment, the buffer circuit includes a source follower. Additionally, the AC coupling network may include one or more capacitors and one or more resistors.

In one embodiment, the successive stages include an amplification stage and a frequency conversion stage. The amplifier stage may comprise a programmable gain amplifier. Additionally, the frequency translation stage may include a voltage mode passive mixer. In another embodiment, the successive stages comprise two amplification stages. The NMR apparatus may include one or more switches connected to one or more successive stages to provide gain adjustment. Additionally, the NMR apparatus may further comprise circuitry for applying a third signal manipulation stage to the received NMR signal; the third stage and the first of the successive stages may be connected in parallel to the second of the successive stages via the interface. In some embodiments, the third stage and a first stage of the successive stages comprise an amplification stage and a second stage of the successive stages comprises a frequency conversion stage. Alternatively, the third stage and a first stage of the successive stages may comprise a frequency conversion stage and a second stage of the successive stages may comprise an amplification stage.

Another aspect of the invention relates to a method of receiving a signal in an integrated circuit. In various embodiments, the method includes providing two or more successive signal manipulation stages; and providing an interface for decoupling the output impedance and the first common mode level of a first stage of the successive stages from the input impedance and the second common mode level of a second stage of the successive stages without degrading the performance of either stage.

In yet another aspect, the present invention relates to a sensor for receiving a signal in an integrated circuit. In various embodiments, the sensor comprises a voltage-mode passive mixer for down-converting one or more frequencies of the received signal; a baseband output buffer; and a transconductance amplifier coupled to the voltage-mode passive mixer for receiving an output signal therefrom and to the baseband output buffer for providing an input signal thereto, the transconductance amplifier providing a high impedance load to the voltage-mode passive mixer and shielding the baseband output buffer from high frequency feed-through. In one embodiment, a voltage-mode passive mixer includes a plurality of CMOS switches that can be driven by source followers. In addition, the voltage-mode passive mixer may include an AC coupling capacitor and/or a DC bias resistor for suppressing DC offset in the voltage-mode passive mixer.

In some embodiments, the sensor further comprises one or more filter capacitors between the voltage-mode passive mixer and the baseband output buffer for filtering the up-converted input signal. Additionally, the sensor may include a DAC for fine tuning the offset at the output of the baseband output buffer. In one embodiment, the baseband output buffer includes a transimpedance amplifier. In addition, the sensor may include one or more feedback resistors coupled to the baseband output buffer for converting the input signal from the current domain to the voltage domain.

Yet another aspect of the invention relates to an NMR apparatus comprising an NMR coil configured to enclose a sample; a receiver for receiving NMR signals from a sample, the receiver comprising (i) a voltage-mode passive mixer for down-converting a frequency of the received NMR signals, (ii) a baseband output buffer, and (iii) a transconductance amplifier coupled to the voltage-mode passive mixer for receiving output signals therefrom and to the baseband output buffer for providing input signals thereto, the transconductance amplifier providing a high impedance load to the voltage-mode mixer and shielding the baseband output buffer from high frequency feed-through; a controller configured to analyze the received NMR signals.

In some embodiments, the voltage-mode passive mixer includes a plurality of CMOS switches that can be driven by source followers. In addition, the voltage-mode passive mixer may include an AC coupling capacitor and/or a DC bias resistor for suppressing DC offset in the voltage-mode passive mixer. In one embodiment, the NMR apparatus further comprises one or more filter capacitors, located between the voltage-mode passive mixer and the baseband output buffer, for filtering the upconverted input signal. Additionally, the NMR apparatus may include a DAC for fine tuning the offset at the output of the baseband output buffer. In one embodiment, the baseband output buffer includes a transimpedance amplifier. In addition, the NMR apparatus may include one or more feedback resistors coupled to the baseband output buffer for converting the input signal from the current domain to the voltage domain.

In another aspect, the invention relates to a method of receiving a signal in an integrated circuit. In various embodiments, the method comprises providing a frequency conversion device for downconverting the frequency of a received signal; providing first amplifying means for converting the signal from the current domain to the voltage domain; providing second amplifying means coupled to the frequency conversion means for receiving the output signal therefrom and coupled to the first amplifying means for providing the input signal thereto; the second amplifying means provides a high impedance load to the frequency conversion means and protects the first amplifying means from high frequency feed-through.

In another aspect, the present invention relates to a PGA including an open-loop source degeneration amplifier having a pair of input devices; a pair of super-g_mFeedback loops, each coupled to one of the input devices for enhancing its effective transconductance; and constant-g_mAnd the bias circuit is used for setting the bias current of the device in the open-loop source degeneration amplifier.

In some embodiments, the PGA also includes electronic devices (e.g., transistors) for forcing the current through the input device to be constant. In addition, super-g_mThe feedback loop may comprise a transistor. In one embodiment, constant-g_mThe bias circuit is configured to automatically adjust the bias current to keep the effective transconductance of the input device constant as operating conditions, processes, voltages, or temperatures change. The PGA may also include a current mirror and a resistor for converting a current signal to a voltage signal at an output of the PGA.

In another aspect, the invention relates to an NMR apparatus comprising an NMR coil configured to enclose a sample; a receiver having an analog front end structure and a PGA that adjusts a gain of the front end structure based at least in part on an amplitude of an NMR signal received from a sample, the PGA including (i) an open-loop source degenerated amplifier having a pair of input devices, (ii) a pair of super-gs_m(ii) feedback loops, each loop coupled to one of the input devices for increasing its effective transconductance, and (iii) constant-g_mA bias circuit for setting a bias current of a device in the open-loop source degeneration amplifier; and a controller configured to analyze the received NMR signals. The input device may include a source degenerate differential pair. In addition, the open-loop source degeneration amplifier may include a programmable resistor for setting the gain of the PGA.

In some embodiments, the NMR apparatus further comprises electronics (e.g., transistors) for forcing the current flowing through the input device constant. In addition, super-g_mThe feedback loop may comprise a transistor. In one embodiment, constant-g_mThe bias circuit is configured to automatically adjust the bias current to keep the effective transconductance of the input device constant as operating conditions, processes, voltages, or temperatures change. The NMR apparatus may further comprise a current mirror and a resistor for converting the current signal to a voltage signal at the output of the PGA.

Another aspect of the invention relates to a method of adjusting a gain of a received signal in an integrated circuit. In various embodiments, the method comprises: amplifying the received signal using an open-loop source degeneration amplifier having a pair of input devices; enhancing the effective transconductance of the input device; and setting a bias current of the device in the open-loop source degeneration amplifier.

Generally, as used herein, the term "degeneracy" refers to a loss of greater than 10%, and in some embodiments 20%, of the amplitude of the gain, bandwidth, noise figure, and/or other parameters of an electronic component. Further, reference in the specification to "one example," "an example," "one embodiment," or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present technology. Thus, the appearances of the phrases "in one example," "in an example," "one embodiment," or "an embodiment" in various places throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, procedures, steps, or characteristics may be combined in any suitable manner in one or more examples of the present technology. The headings provided herein are for convenience only and are not intended to limit or interpret the scope or meaning of the claimed technology.

Drawings

In the drawings, like reference numerals generally refer to like parts throughout the different views. Moreover, the drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the invention. In the following description, various embodiments of the present invention are described with reference to the following drawings, in which:

fig. 1A schematically depicts the architecture of an RF receiver according to the prior art;

fig. 1B and 1C schematically show the architecture of an active mixer and a passive mixer, respectively, according to the prior art;

fig. 1D and 1E schematically show the architecture of a closed-loop PGA and an open-loop PGA, respectively, according to the prior art;

2A-2C schematically depict an exemplary NMR system, in accordance with various embodiments;

FIG. 3A schematically depicts an exemplary standardized interface connecting various components (or stages) of a sensor/receiver, in accordance with various embodiments;

fig. 3B schematically illustrates an architecture of an exemplary standardized interface implemented between various components (or stages) of a sensor/receiver, in accordance with various embodiments;

fig. 4 schematically depicts an exemplary standardized interface integrated with a mixer of a receiver, in accordance with various embodiments;

fig. 5 schematically illustrates multiple front-end components of a receiver connected in parallel with the same component via an exemplary standardized interface, in accordance with various embodiments;

fig. 6 schematically depicts a PGA of a receiver connected to multiple parallel mixers via an exemplary standardized interface, in accordance with various embodiments.

Fig. 7 depicts an exemplary circuit implemented in a sensor/receiver in accordance with various embodiments; and

fig. 8 schematically depicts an exemplary PGA implemented in a sensor/receiver in accordance with various embodiments.

Detailed Description

Sensors typically detect events or changes in their environment and send information to other electronic devices for analysis. For example, the NMR system may include an RF receiver to detect echo signals from the sample, and then send the signals to a processor for analysis of imaging and/or material information of the sample. FIG. 2A shows an exemplary NMR system 200 according to various embodiments of the invention, including an NMR coil 202 surrounding a sample 204 to be analyzed, a magnet 206 for generating a static magnetic field at the sample 204 and coil 202, an RF transceiver 208 coupled to the NMR coil 202, and a controller 210 for controlling operation of the RF transceiver 208. In one embodiment, referring to fig. 2B and 2C, the transceiver 208 includes a transmitter (Tx) section 212 for generating and transmitting RF signals to the sample 204 and a receiver (Rx) section 214 for receiving echo signals from the sample 204.

During NMR measurements, magnet 206 is activated to produce a substantially uniform magnetic field B on sample 204₀(e.g., within 0.1 parts per million (ppm), or in some embodiments, within 100 ppm); the individual magnetic moments of the spins in the sample 204 may attempt to interact with the applied field B₀And (6) aligning. As a result, the sum of the magnetic moments of all cores in the sample is at the typical Larmor frequency ω₀Winding field B₀Satisfies ω is the net magnetic moment of precession of the axis (process)₀＝γB_0，Wherein gamma is the gyromagnetic ratio. Because different cores have different gyromagnetic ratios, measuring the larmor frequency of the sample 204 may reveal material properties (e.g., chemical composition) of the sample 204. In various embodiments, to observe precession of the net magnetic moment, controller 210 causes emitter 212 to emit a light having a frequency substantially close to larmor frequency ω₀An RF signal 216 (typically comprising a pulse sequence) at a resonant frequency (e.g., within ± 1%) to the coil 202; the coil 202 then generates an RF magnetic field that "tilts" the net magnetic moment of the core in the sample 204 "

Away from the static magnetic field B₀The shaft of (a). Typically, the RF magnetic field has a time-varying magnitude and is perpendicular to the static magnetic field B₀In the plane of the axis of (a).

Referring to FIG. 2C, after a predetermined duration Δ t, the transmitter 212 stopsAn RF excitation signal 216 is transmitted and the coil 202 is switched via, for example, a mechanical switch or an electrical switch (e.g., a transistor) to the receiver 214 for receiving echo signals from the sample 204. By stopping the RF excitation, the nuclear spins within the sample 204 are at the Larmor frequency ω₀Around B₀-shaft precession; this causes a corresponding signal oscillation. The nuclear spins then slowly lose phase coherence through inter-spin interactions, which, in precession of the net magnetic moment, appear as an exponential relaxation (ex-nuclear relaxation) or damping signal 218 (called "free induction decay") on a macroscopic average. The oscillation and relaxation of the NMR signal may be detected by the coil 202. Because the inter-spin interactions are specific to the material of the sample 204 being tested, the characteristic time of the relaxation signal (commonly referred to as T)₂) Also material specific. Thus, by measuring the Larmor frequency ω₀(e.g. for spectroscopy) and/or characteristic time T₂(e.g., for relaxation), NMR techniques can be used as analytical tools in many fields, including but not limited to chemical composition analysis, medical imaging, and biosensing. An exemplary NMR system is described in U.S. patent No.8,643,368, the entire disclosure of which is incorporated herein by reference.

In NMR applications, the strength and size of magnet 206 and sample size may vary widely from one NMR apparatus to another. Thus, a flexible architecture that can easily accommodate changes in the bandwidth, gain, and other requirements of receiver 214 may advantageously reduce design time and cost and allow receiver performance to be optimized for each NMR device. Various embodiments of the present invention address, among other things, the problem of an integrated solution that is at a premium for area and power of the receiver. For example, referring to FIG. 3A, an exemplary standardized interface 302 may be implemented as various components (or stages) 304 and 310 that connect RF receivers. In one embodiment, the interface 302 includes an AC coupling network 312 and a buffer circuit 314 between two components (e.g., between two amplification stages 304, 306 or between one amplification stage 308 and one frequency conversion stage 310). Although the embodiment depicted in fig. 3A is fully differential, it may be single-ended without loss of generality. Additionally, it should be noted that in some embodiments, all pairs of consecutive stages in the RF receiver are decoupled using the interface 302 (as shown in fig. 3A). Further, the interface 302 described herein may not be limited to only RF receiver or NMR applications; but can also be implemented in any analog front end architecture used in various sensors.

Referring to fig. 3B, in various embodiments, the buffer circuit 314 includes a source follower and may be before or after the AC coupling network 312. The low input capacitance and output impedance of the source follower buffer 314 may decouple the trade-off between the output and input impedances of two successive stages, advantageously allowing each stage to be optimized for noise, gain, bandwidth, and power independently of the subsequent stages. Similarly, the AC coupling network 312 may decouple the output and input common mode levels of each stage. This design allows the output common mode level of each stage to be optimized for performance without having to meet the requirements of the subsequent stage. Additionally, normalizing the input common mode level (e.g., voltage level or current level) of each stage using this architecture may allow the input devices of each stage to be biased at the same level, simplifying the overall design. In addition, the AC coupling network 312 may remove D C offsets between the two stages of the receiver, thereby eliminating the need for offset trimming circuitry employed in conventional receivers to prevent the offsets from saturating the output. In various embodiments, the size of the capacitor 318 in the AC coupling is optimized based on the bandwidth requirements of the application; this provides further advantages in achieving an area efficient receiver design. Thus, interface 302 may be particularly beneficial for parallel applications requiring multiple analog front ends.

Referring again to fig. 3A, in various embodiments, one or more switches 316 may be employed in one or more stages of the RF receiver. For example, a switch 316 may be added around the third gain stage 306 to bypass the third gain stage 306 and reduce the overall gain of the receiver by 20 dB. This provides a coarse gain adjustment to extend the overall programmable gain of the receiver and may be beneficial for applications where the input signal strength may vary greatly, such as NMR. However, the bypass switch 316 may introduce capacitance; as a result, in conventional designs, the output stage of the second stage amplifier 304 is redesigned to avoid reducing bandwidth. In contrast, various embodiments of the present invention utilize an interface 302 that includes an AC coupling network 312 and a buffer circuit 314 to decouple the introduced capacitance of the third stage 306 from the second stage 304, thereby avoiding the need to redesign the second stage 304. In addition, the interface 302 provides another benefit: even when the input impedance of the subsequent stage is different, the same amplifier can be used for the subsequent stage without affecting the performance thereof.

Referring to fig. 4, in various embodiments, the interface 302 with the AC coupling network 312 and the source follower buffer 314 is integrated with a mixer (e.g., a voltage mode passive mixer) 402. The interface 302 may decouple the driving requirements of the mixer switch 402 from the PGA previously shown in fig. 3A. Thus, the same PGA can be used for both stages in the PGA package 308 even when the driving requirements of the frames following them are different.

In some embodiments, an interface 302 with an AC coupling network 312 and a source follower buffer 314 as described herein is introduced between stages to allow multiple components of a sensor (e.g., an RF receiver) to be connected in parallel to a common component without affecting the performance of each component. For example, referring to FIG. 5, multiple front-end components 502-506 may be connected in parallel and share the same mixer 508. The AC coupling network 312 and buffer 314 prevent the output stages of each front-end component from loading each other and allow the unused front-end components to be disconnected from the mixer 508 by simply powering them down; this approach eliminates the need for a conventional switching network to select one of the components 502 and 506 for connection to the mixer 508. Thus, the design may advantageously save power, area, and design time. In an NMR system, this embodiment may be suitable for analyzing multiple samples in parallel while sharing the same mixer and ADC.

In addition, with interface 302, a single front-end component can drive multiple parallel components in an RF receiver or other sensor. For example, referring to FIG. 6, interface 302 with AC coupling network 312 and buffer 314 may connect the final PGA602 to multiple parallel mixers 604-608 without degrading the performance of PGA602 due to the increased loading of multiple mixers 604-608. Thus, this design eliminates the need to redesign the PGA602 or interface between PGA602 and mixer 604-608. In an NMR system, the architecture may advantageously allow simultaneous analysis of multiple frequencies within the received NMR signal by independently setting the frequency of a Local Oscillator (LO) in each mixer.

Thus, as described herein, the interface 302 connecting the various components in the RF receiver or other sensor may allow for the rapid assembly of different analog front end configurations from a set of standard components, thereby greatly reducing the design time of an integrated solution without impacting performance. In addition, the interface 302 allows the receiver/sensor to be easily reconfigured to accommodate a wide range of operating conditions and the needs of various applications without redesigning the interface between the various components.

In various embodiments, the frequency of the received RF signal is downconverted to a lower baseband frequency in order to relax the ADC requirements for digitizing the signal for further processing. In various embodiments, referring to fig. 7, frequency conversion is achieved using a circuit 700 that includes one or more voltage-mode passive mixers 702 in combination with a baseband output buffer 704 (e.g., a transimpedance output buffer). In one embodiment, the voltage-mode passive mixer 702 includes a source follower buffer 706 that provides an input signal (e.g., a received RF signal) to a plurality of mixer switches 708, which may be driven by a rail-to-rail square wave LO signal. In addition, receiver/sensor circuit 700 may include a transconductance (Gm) stage 710; the LO signal may then switch the polarity of the input signal at the input of the transconductance stage 710 based on the polarity of the input signal. Transconductance stage 710 may effectively shield mixer switch 708 from transimpedance output buffer 704 and provide a high impedance load to mixer switch 708, thereby avoiding a gain and linearity degradation of the voltage mode signal. In addition, because the received signal remains in voltage mode, an Alternating Current (AC) coupling capacitor 712 (C) may be used in the receiver circuit 700₁) And a DC bias resistor 714 (R)_CM) To effectively suppress any unwanted DC offset in the mixer 702 and thereby optimize the input bias at the transconductance stage 710. Thus, according toVarious embodiments of the present invention may simplify the design complexity of the circuitry driving the mixer switch 708. For example, as shown in fig. 7, in one embodiment, the drive circuit may simply be a source follower 706.

In various embodiments, circuit 700 also includes a capacitor 716 placed after transconductance stage 710 to filter out the upconverted input signal. This approach also shields the transimpedance output buffer 704 from high frequency feedthrough, allowing its bandwidth to be greatly reduced. Without the filter capacitor 716, any signal above the bandwidth of the amplifier in the transimpedance stage 704 may not "see" the AC ground at the input of the transimpedance stage 704, resulting in reduced linearity. Additionally, since the input of the transimpedance output buffer 704 operates at baseband frequency, a simple current DAC 718 may be included to fine tune the output offset. The implementation of DAC 718 is a simpler approach than the complex trimming routines or circuits used in conventional current-mode architectures, where an offset trimming current is injected into one of the switching nodes operating at higher frequencies. Furthermore, the total offset that needs to be trimmed in various embodiments of the invention may be much smaller, since any offset in the mixer itself is already suppressed by the AC coupling capacitor 712, and larger devices may be used in the baseband circuit to reduce their offset and any mismatch.

In some embodiments, a feedback resistor 720 is added around the transimpedance output buffer 704 to convert the signal from the current domain back to the voltage domain. Shielding the transimpedance output buffer 704 from any high frequency feed-through greatly simplifies its design compared to designs used in conventional current-mode architectures. In addition, the embodiments of the circuit 700 in the receiver/sensor described herein advantageously allow the transimpedance amplifier that sets the gains of the mixer and the output buffer to follow the mixer and operate at baseband frequencies. Thus, using circuit 700 (shown in fig. 1A) in a conventional quadrature receiver may simplify gain matching between two voltage-mode mixers 702, as compared to methods implemented to match the gain between two current-mode mixers.

Accordingly, embodiments of the present invention provide a circuit configuration that combines a voltage-mode passive mixer 702 and a baseband output buffer 704 for down-converting a received high-frequency signal to a baseband frequency. The core of the voltage-mode mixer 702 may include a set of CMOS switches 708 driven by a source follower buffer 706. A transconductance stage 710 and a filter capacitor 716 may be strategically placed between the output of the mixer switch 708 and the baseband transimpedance output buffer 704 to provide a high impedance load to the voltage-mode mixer switch 708 and to shield the transimpedance output buffer 704 from high frequency feedthrough interference. The circuit architecture disclosed herein advantageously shifts much of the design burden from the RF domain to the baseband domain compared to conventional mixer architectures; as a result, a simpler and more energy-efficient design is achieved.

It should be noted that although the circuit implementation shown in fig. 7 is fully differential, it may also be single ended. In addition, embodiments of the invention are not limited to implementation in RF receivers, and may be used to implement mixers in many analog front end architectures employed in various types of sensors. Furthermore, NMR is an exemplary application that may benefit from implementing a frequency down conversion architecture; one of ordinary skill in the art will appreciate that many suitable applications may benefit from the sensor/receiver architecture described herein and, therefore, are within the scope of the present invention.

In some embodiments, the NMR application further implements a PGA in the RF receiver for adjusting the gain of the front-end components based on the amplitude of the input signal, thereby enabling the amplitude at the output of the receiver to be optimized for a wide dynamic range of input signals. Fig. 8 depicts an exemplary PGA800 implemented in an RF receiver (or other sensor) according to various embodiments of the invention. In one embodiment, PGA800 includes an open-loop source degenerate differential pair 802 having input devices (e.g., transistors 804, 806) for receiving input signals (e.g., RF signals). In addition, the PGA may include a programmable source degeneration resistor 808 for setting its gain-by changing the resistance R of the programmable resistor 808₁The gain of the PGA may be adjusted. In some embodiments, the PGA800 further includesOne or more devices (e.g., transistors) 810 for forcing the current through the input transistor 804 to be constant. In addition, super-g may be added around the input transistor 804_m Feedback loop 812 to pass super-g_mThe loop gain of the feedback loop 812 increases the effective transconductance of the input transistor 804. Because the current through the input transistor 804 is constant, the input signal may appear entirely across the resistor 808 and all of the resulting AC current may flow through super-g_m A feedback transistor 812. The AC current may then be mirrored with a resistance R via one or more devices (e.g., transistors) 814₂One or more load resistors 816; load resistor 816 then converts the current back to the voltage signal at the output of P GA 800.

In one embodiment, super-g_mThe feedback loop 812 includes one or more transistors; the loop gain may be achieved by multiplying the parallel output impedance at the drains of input transistor 804 and transistor 810 by super-g_mThe transconductance of the feedback transistor 812. The enhanced effective transconductance of the input transistor 804 may be closer to 1/R than in the conventional open-loop PGA160 (shown in FIG. 1E)₁(ii) a This allows the gain step size of PGA800 to be better defined based, at least in part, on the resistance of programmable resistor 808. In addition, since it is super-g_mThe feedback loop 812 increases the effective transconductance of the input transistor 804, so the dependence of the overall effective transconductance of the source degenerate differential pair 802 on the transconductance of the input transistor 804 can be greatly reduced. As a result, the PGA gain dependence on PVT variations may advantageously be reduced, increasing the performance (e.g., linearity and/or stability) of PGA800 compared to conventional open-loop PGA 160.

In various embodiments, the PGA800 also includes a constant transconductance (constant-g)_m) A bias circuit 818 for reducing any remaining dependence on the transconductance of the input transistor 804. Constant-g_mThe bias circuit 818 may generate bias currents for all devices in the PGA800 and may automatically adjust the bias currents to keep the transconductance of the input transistor 804 constant as operating conditions, processes, voltages, and/or temperatures change. Thus, canThe effect on PGA gain due to any remaining dependence of the total transconductance of the input differential pair on the transconductance of the input transistor 804 is advantageously avoided (or at least reduced). Constant-g_mThe bias circuit may be of any suitable design commonly implemented in many analog integrated circuit applications (e.g., "Razavi, B. (2001). analog CMOS integrated circuit design, New York, NY: Merguo Hill (McGraw-Hill))_mBias circuits) and are therefore readily available and straightforward to implement.

Thus, the integrated PGA800 described herein utilizes super-g_mFeedback loop 812 and/or constant-g_mThe bias circuit 818 advantageously increases the effective transconductance of the input differential pair to be closer to 1/R than is the case in a conventional open loop amplifier₁. The enhanced effective transconductance of the input differential pair may provide gain stability under different operating conditions and PVT variations. In one embodiment, the overall gain of the PGA800 is based on the impedance ratio of the load resistor 816 to the programmable source degeneration resistor 808 (i.e., R₂/R₁) Determining; as a result, the PGA gain can be accurately set by the resistance ratio of the two resistors, and is not affected by variations in operating conditions and PVT variations. Thus, the PGA800 described herein provides similar benefits as the closed-loop embodiment 150 as shown in fig. 1D. In addition, the PGA800 described herein advantageously maintains open loop operation, resulting in improved power efficiency and higher bandwidth capability. In addition, the input transistor 804 can be made smaller while having a larger effective transconductance than other open-loop architectures; as a result, the load of the preceding stage is reduced, thereby enabling the PGA800 to be designed with greater power efficiency at a given bandwidth.

It should be noted that the transistors 804, 806, 810, 812, 814 implemented in the PGA800 may be any type of transistor, such as Bipolar Junction Transistors (BJTs) or Field Effect Transistors (FETs). In one embodiment, the transistor is a Metal Oxide Semiconductor FET (MOSFET). Additionally, embodiments of the PGA are not limited to implementation in RF receivers, and may be used in any suitable analog front end components employed in various types of sensors. Furthermore, NMR is an exemplary application that may beneficially utilize PGA 800; those of ordinary skill in the art will appreciate that the sensor/receiver architecture described herein is suitable for many applications and, therefore, is within the scope of the present invention.

The terms and expressions which have been employed herein are used as terms of description and not of limitation, and there is no intention in the use of such terms and expressions of excluding any equivalents of the features shown and described or portions thereof. In addition, having described certain embodiments of the invention, it will be apparent to those of ordinary skill in the art that other embodiments incorporating the concepts disclosed herein may be used without departing from the spirit and scope of the invention. The described embodiments are, therefore, to be considered in all respects only as illustrative and not restrictive.

The method of claim: