阅读说明：本技术 一种载波电路和定向发声设备 (Carrier circuit and directional sound production equipment ) 是由 贾玉虎 于 2019-09-06 设计创作，主要内容包括：本申请实施例公开了一种载波电路,该载波电路包括：反相器,滤波电路,充放电电路和电源,反相器的电源端连接电源,反相器的使能端和反相器的接地端分别接地,反相器用于：在反相器的输入端接收输入信号,对输入信号的相位进行反转处理,在反相器的输出端得到载波信号,滤波电路的一端连接电源端,滤波电路的另一端接地,滤波电路用于对电源进行滤波,充放电电路的第一端连接输出端,充放电电路的第二端连接输入端,充放电电路的第三端接地,充放电电路用于根据载波信号进行充电或者放电,以更新输入端的输入信号,本申请实施例还同时提供了一种定向发声设备。(The embodiment of the application discloses a carrier circuit, this carrier circuit includes: the power supply end of the phase inverter is connected with the power supply, the enabling end of the phase inverter and the grounding end of the phase inverter are respectively grounded, and the phase inverter is used for: the directional sounding device comprises a phase inverter, a power supply end, a filter circuit, a charging and discharging circuit and a directional sounding device, wherein the input end of the phase inverter is used for receiving an input signal, the phase inverter is used for inverting the phase of the input signal, a carrier signal is obtained at the output end of the phase inverter, one end of the filter circuit is connected with the power supply end, the other end of the filter circuit is grounded, the filter circuit is used for filtering the power supply, the first end of the charging and discharging circuit is connected with the output end, the second end of the charging and discharging circuit is connected with the input end, the third end of the charging and discharging circuit is grounded, the.)

1. A carrier circuit, comprising: the device comprises an inverter, a filter circuit, a charging and discharging circuit and a power supply; wherein the content of the first and second substances,

the power supply end of the phase inverter is connected with the power supply, and the enabling end of the phase inverter and the grounding end of the phase inverter are respectively grounded; the inverter is used for: receiving an input signal at the input end of the phase inverter, inverting the phase of the input signal, and obtaining a carrier signal at the output end of the phase inverter;

one end of the filter circuit is connected with the power supply end, and the other end of the filter circuit is grounded; the filter circuit is used for filtering the power supply;

the first end of the charge and discharge circuit is connected with the output end, the second end of the charge and discharge circuit is connected with the input end, and the third end of the charge and discharge circuit is grounded; the charging and discharging circuit is used for charging or discharging according to the carrier signal so as to update the input signal of the input end.

2. The carrier circuit of claim 1, wherein the filtering circuit comprises: a first capacitor.

3. The carrier circuit according to claim 1 or 2, wherein the input of the inverter comprises: the output end of the phase inverter comprises a first output end, a second output end and a third output end; wherein the content of the first and second substances,

the first input end is connected with the second end of the charge and discharge circuit, the second input end is connected with the first output end, the third input end is connected with the second output end, and the third output end is connected with the first end of the charge and discharge circuit;

the inverter is used for: and receiving an input signal at a first input end of the phase inverter, inverting the phase of the input signal, and obtaining a carrier signal at a third output end of the phase inverter.

4. The carrier circuit according to claim 3, wherein when the input signal is low;

the inverter is used for: receiving a low level at a first input end of the phase inverter, performing inversion processing on the phase of the received first level, and obtaining a carrier signal at a third output end of the phase inverter; wherein the carrier signal is high.

5. The carrier circuit according to claim 3, wherein when the input signal is high;

the inverter is used for: receiving a high level at a first input end of the phase inverter, carrying out inversion processing on the phase of the received high level, and obtaining a carrier signal at a third output end of the phase inverter; wherein the carrier signal is low level.

6. The carrier circuit according to claim 3, further comprising: a feedback circuit; wherein the content of the first and second substances,

one end of the feedback circuit is connected with the second output end, and the other end of the feedback circuit is connected with the first input end;

the feedback circuit is used for feeding back the signal of the second output end to the first input end.

7. The carrier circuit of claim 6, wherein the feedback circuit comprises: a first resistor.

8. The carrier circuit according to claim 3, wherein the charge and discharge circuit comprises: a second resistor, a third resistor and a second capacitor;

one end of the second resistor is connected to the third output end, the other end of the second resistor is respectively connected to one end of the third resistor and one end of the second capacitor, the other end of the third resistor is connected to the first input end, and the other end of the second capacitor is grounded;

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge and discharge the second capacitor to obtain a charged and discharged signal;

the third resistor is used for transmitting the charged and discharged signals to the first input end so as to update the input signals of the first input end.

9. The carrier circuit of claim 8, wherein when the carrier signal is high, accordingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge the second capacitor to obtain a charged signal;

the third resistor is used for transmitting the charged signal to the first input end so as to update the input signal of the first input end; wherein the updated input signal is at a high level.

10. The carrier circuit of claim 8, wherein when the carrier signal is low, accordingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so that the second capacitor discharges to obtain a discharged signal;

the third resistor is used for transmitting the discharged signal to the first input end so as to update the input signal of the first input end; wherein the updated input signal is at a low level.

11. A directional sound production device, characterized in that the carrier circuit of the directional sound production device is a carrier circuit according to any of the preceding claims 1-10.

Technical Field

The present application relates to carrier circuits, and more particularly, to a carrier circuit and a directional sound generating apparatus.

Background

At present, with the increase of audition scenes of users and the protection of information privacy, the appearance of orientation generating equipment gradually becomes the choice of consumers, the current mainstream orientation generating equipment is mainly applied to scenes such as exhibition halls and shopping guide tables, the equipment consists of an audio processing module, a power supply module and an ultrasonic sounding module, wherein the most critical ring in the audio processing module is a carrier circuit.

Generally, a carrier circuit outputs a carrier signal with a required frequency by using a Micro Control Unit (MCU) + a crystal oscillator, but the MCU is used to generate the carrier signal, which has poor signal quality and stability and is easily interfered to generate signal jitter, and the MCU needs to be externally connected with the crystal oscillator, thereby increasing hardware cost; it can be seen that the quality of the carrier signal generated by the conventional carrier circuit is poor.

Disclosure of Invention

The embodiment of the application provides a carrier circuit and directional sounding equipment, which can improve the instruction of a carrier signal generated by the carrier circuit.

The technical scheme of the application is realized as follows:

an embodiment of the present application provides a carrier circuit, including: the device comprises an inverter, a filter circuit, a charging and discharging circuit and a power supply; wherein the content of the first and second substances,

the power supply end of the phase inverter is connected with the power supply, and the enabling end of the phase inverter and the grounding end of the phase inverter are respectively grounded; the inverter is used for: receiving an input signal at the input end of the phase inverter, inverting the phase of the input signal, and obtaining a carrier signal at the output end of the phase inverter;

one end of the filter circuit is connected with the power supply end, and the other end of the filter circuit is grounded; the filter circuit is used for filtering the power supply;

the first end of the charge and discharge circuit is connected with the output end, the second end of the charge and discharge circuit is connected with the input end, and the third end of the charge and discharge circuit is grounded; the charging and discharging circuit is used for charging or discharging according to the carrier signal so as to update the input signal of the input end.

In the above carrier circuit, the filter circuit includes: a first capacitor.

In the above carrier circuit, an input terminal of the inverter includes: the output end of the phase inverter comprises a first output end, a second output end and a third output end; wherein the content of the first and second substances,

the first input end is connected with the second end of the charge and discharge circuit, the second input end is connected with the first output end, the third input end is connected with the second output end, and the third output end is connected with the first end of the charge and discharge circuit;

the inverter is used for: and receiving an input signal at a first input end of the phase inverter, inverting the phase of the input signal, and obtaining a carrier signal at a third output end of the phase inverter.

In the above carrier circuit, when the input signal is at a low level;

the inverter is used for: receiving a low level at a first input end of the phase inverter, performing inversion processing on the phase of the received first level, and obtaining a carrier signal at a third output end of the phase inverter; wherein the carrier signal is high.

In the above carrier circuit, when the input signal is at a high level;

the inverter is used for: receiving a high level at a first input end of the phase inverter, carrying out inversion processing on the phase of the received high level, and obtaining a carrier signal at a third output end of the phase inverter; wherein the carrier signal is low level.

In the above carrier circuit, the carrier circuit further includes: a feedback circuit; wherein the content of the first and second substances,

one end of the feedback circuit is connected with the second output end, and the other end of the feedback circuit is connected with the first input end;

the feedback circuit is used for feeding back the signal of the second output end to the first input end.

In the above carrier circuit, the feedback circuit includes: a first resistor.

In the above carrier circuit, the charge and discharge circuit includes: a second resistor, a third resistor and a second capacitor;

one end of the second resistor is connected to the third output end, the other end of the second resistor is respectively connected to one end of the third resistor and one end of the second capacitor, the other end of the third resistor is connected to the first input end, and the other end of the second capacitor is grounded;

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge and discharge the second capacitor to obtain a charged and discharged signal;

the third resistor is used for transmitting the charged and discharged signals to the first input end so as to update the input signals of the first input end.

In the above carrier circuit, when the carrier signal is at a high level, accordingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge the second capacitor to obtain a charged signal;

the third resistor is used for transmitting the charged signal to the first input end so as to update the input signal of the first input end; wherein the updated input signal is at a high level.

In the above carrier circuit, when the carrier signal is at a low level, accordingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so that the second capacitor discharges to obtain a discharged signal;

the third resistor is used for transmitting the discharged signal to the first input end so as to update the input signal of the first input end; wherein the updated input signal is at a low level.

The embodiment of the application provides a directional sound production device, and a carrier circuit of the directional sound production device is the carrier circuit in one or more embodiments.

The embodiment of the application provides a carrier circuit and directional sound production equipment, and this carrier circuit includes the phase inverter, and filter circuit, charge-discharge circuit and power, wherein, the power is connected to the power end of phase inverter, and the enable terminal of phase inverter and the earthing terminal of phase inverter ground respectively, and the phase inverter is used for: the method comprises the steps that an input signal is received at the input end of a phase inverter, the phase of the input signal is inverted, a carrier signal is obtained at the output end of the phase inverter, one end of a filter circuit is connected with a power supply end, the other end of the filter circuit is grounded, the filter circuit is used for filtering a power supply, the first end of a charge-discharge circuit is connected with the output end, the second end of the charge-discharge circuit is connected with the input end, the third end of the charge-discharge circuit is grounded, and the charge-discharge circuit is used for charging or discharging according to the carrier signal; that is to say, in this application embodiment, the phase of the input signal is inverted through the inverter, and the delay time of the inverter can be adjusted by using the charge-discharge circuit while the input signal of the inverter is updated, so as to output a carrier signal with a desired frequency, and the power supply is filtered by the filter circuit to remove ripple noise, so that the interference of the power supply to the inverter can be reduced, the stability of the carrier signal is improved, and the quality of the carrier signal is improved.

Drawings

Fig. 1 is a schematic structural diagram of an alternative carrier circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of an example of an alternative carrier circuit according to an embodiment of the present disclosure;

fig. 3 is a schematic diagram of an optional simulation result corresponding to fig. 2 according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of an alternative directional sound generating apparatus according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

The directional sounding is to send sound signals in a fixed direction through ultrasonic carrier signals, wherein the carrier circuit is used for generating carrier signals and modulating common signals.

With the development of the field of directional sound production, directional sound production equipment is mainly and widely applied to exhibition halls, shopping guide platforms and other scenes, a carrier circuit in the directional sound production equipment is one of the most critical modules, the existing carrier circuit outputs carrier signals with required frequency by using an MCU + crystal oscillator, however, the carrier signals generated by the MCU + crystal oscillator are poor in stability and easy to interfere, so that the quality is poor, and the MCU is externally connected with the crystal oscillator, so that the hardware cost is higher.

In order to improve the quality of a carrier signal, an embodiment of the present application provides a carrier circuit, and fig. 1 is a schematic structural diagram of an optional carrier circuit provided in the embodiment of the present application, and referring to fig. 1, the carrier circuit includes: an inverter 11, a filter circuit 12, a charge and discharge circuit 13, and a power supply 14, wherein,

the power supply end 111 of the inverter 11 is connected with a power supply, and the enable end 112 of the inverter 11 and the ground end 113 of the inverter 11 are respectively grounded; the inverter 11 is used for: receiving an input signal at an input end 114 of the inverter 11, inverting the phase of the input signal, and obtaining a carrier signal at an output end 115 of the inverter 11;

one end of the filter circuit 12 is connected to the power supply terminal 111, and the other end of the filter circuit 12 is grounded; the filter circuit 12 is used for filtering the power supply 14;

the first end 131 of the charge and discharge circuit 13 is connected with the output end 115, the second end 132 of the charge and discharge circuit 13 is connected with the input end 114, and the third end 133 of the charge and discharge circuit 13 is grounded; the charge and discharge circuit 13 is used for charging or discharging according to the carrier signal to update the input signal at the input terminal 114.

Specifically, the inverter 11 is mainly used to invert the phase of the received input signal by 180 degrees, for example, when the input signal is at a high level, the carrier signal is at a low level, and when the input signal is at a low level, the carrier signal is at a high level.

The inverter 11 may include a plurality of input terminals, each input terminal corresponds to an output terminal, and when an input signal is received at a certain input terminal of the inverter 11, the inverter 11 processes the input signal to obtain an inverted signal of the input signal at the output terminal corresponding to the input terminal, for example, when the input signal received at one input terminal of the plurality of input terminals is a high level, the inverter 11 inverts a phase of the high level, the carrier signal obtained at the corresponding output terminal is an inverted low level, the input signal received at one input terminal of the plurality of input terminals is a low level, the inverter 11 inverts a phase of the high level, and the carrier signal obtained at the corresponding output terminal is an inverted high level.

In the above carrier circuit, the filter circuit 12 is used to filter the power supply 14, so that the filter circuit 12 can filter ripple noise in the power supply 14 to prevent the power supply 14 from interfering with the inverter 11, thereby increasing the anti-interference capability of the inverter 11.

The charge and discharge circuit 13 performs charge and discharge according to the carrier signal, that is, when the carrier signal is at a high level, the charge and discharge circuit 13 is charged, so that the input signal is clamped to be at a high level, and the carrier signal obtained at the output end is at a low level; when the carrier signal is at a low level, discharging the charge-discharge circuit 13 to clamp the input signal to be at a low level, thereby obtaining a carrier signal at an output end as a high level; therefore, a square wave, i.e. a carrier signal, can be obtained at the output end 115 of the inverter 11, and the frequency of the carrier signal can be adjusted by adjusting the circuit parameters of the charge and discharge circuit 13 to adjust the delay time of the carrier inverter 11, thereby achieving the purpose of adjusting the frequency of the carrier signal.

It can be seen that the ripple noise of the power supply 14 to the inverter 11 is filtered by the filter circuit 12, the inverter 11 is powered, the phase of the input signal is inverted by the inverter 11 to obtain an output signal, the input signal is updated by the charge and discharge circuit 13, so that the output signal is inverted, the continuously inverted output signal is a carrier signal obtained at the output end of the carrier circuit, and thus, the carrier signal with adjustable frequency can be generated by the inverter 11, the charge and discharge circuit 13, the filter circuit 12 and the power supply 14.

In order to eliminate the interference of the power supply to the inverter 11, in an alternative embodiment, the filter circuit 12 may include: a first capacitor.

That is, the filter circuit 11 employs a filter capacitor to filter out the ripple noise from the power supply 14, and the interference received by the inverter 11 from the power supply 14 can be reduced to different degrees by adjusting the value of the first capacitor.

To derive the carrier signal, in an alternative embodiment, the input 114 of the inverter 11 may comprise: a first input terminal, a second input terminal, and a third input terminal, the output terminal 115 of the inverter 11 includes a first output terminal, a second output terminal, and a third output terminal; wherein the content of the first and second substances,

the first input end is connected with the second end 132 of the charge-discharge circuit 13, the second input end is connected with the first output end, the third input end is connected with the second output end, and the third output end is connected with the first end 131 of the charge-discharge circuit 13;

the inverter 11 is used for: the input signal is received at a first input end of the inverter 11, the phase of the input signal is inverted, and the carrier signal is obtained at a third output end of the inverter 11.

That is, the inverter 11 is an inverter including at least three input terminals and corresponding output terminals, and when the signal input by the first input terminal is at a low level, the signal output by the first output terminal is at a high level.

By the connection mode, an input signal is input at the first input end, the phase of the input signal is inverted by 180 degrees through the inversion method, the third output end is used as the output end of the carrier circuit, and a signal output by the third output end is used as a carrier signal.

To obtain the carrier signal, in an alternative embodiment, when the input signal is low;

the inverter 11 is used for: receiving a low level at a first input end of the inverter 11, performing inversion processing on a phase of the received low level, and obtaining a carrier signal at a third output end of the inverter 11;

wherein the carrier signal is high.

When the input signal received by the first input end is low level, the first output end inverts the phase of the input signal to obtain high level, the output signal of the first output end clamps the electric potential of the second input end to high level, after phase inversion, the output signal of the second output end is low level, the output signal of the second output end clamps the electric potential of the third input end to low level, after phase inversion, the output signal of the third output end is high level, namely, the obtained carrier signal is high level.

When the carrier signal is at a high level, the charging and discharging circuit 13 charges to update the input signal at the first input terminal to a high level, and the carrier signal is changed to a low level through the inverter including at least the three input terminals and the output terminal, so that a continuous square wave, i.e., the carrier signal is formed.

To obtain the carrier signal, in an alternative embodiment, when the input signal is high;

the inverter 11 is used for: receiving a high level at a first input end of the inverter 11, performing inversion processing on a phase of the received high level, and obtaining a carrier signal at a third output end of the inverter 11;

wherein the carrier signal is low.

When the input signal received by the first input end is high level, the first output end inverts the phase of the input signal to obtain low level, the output signal of the first output end clamps the electric potential of the second input end to be low level, after phase inversion, the output signal of the second output end is high level, the output signal of the second output end clamps the electric potential of the third input end to be high level, after phase inversion, the output signal of the third output end is low level, namely, the obtained carrier signal is low level.

When the carrier signal is at a low level, the charge/discharge circuit 13 discharges to update the input signal at the first input terminal to a low level, and the carrier signal is changed to a high level by the inverter including at least the three input terminals and the output terminal, so that a continuous square wave, i.e., a carrier signal is formed.

In order to increase the stability of the loop in the carrier circuit, in an alternative embodiment, the carrier circuit may further include: a feedback circuit; wherein the content of the first and second substances,

one end of the feedback circuit is connected with the second output end, and the other end of the feedback circuit is connected with the first input end;

the feedback circuit is used for feeding back the signal of the second output end to the first input end.

That is, a feedback circuit is provided between the second output terminal and the first input terminal, and the stability of the loop in the carrier circuit can be increased.

In an alternative embodiment, the feedback circuit may comprise: a first resistor.

Here, a first resistor is arranged between the second output end and the first input section, and the stability of a loop in the carrier circuit can be adjusted by adjusting the resistance of the first resistor.

In an alternative embodiment, the charging and discharging circuit 13 may include: a second resistor, a third resistor and a second capacitor;

one end of the second resistor is connected to the third output end, the other end of the second resistor is respectively connected to one end of the third resistor and one end of the second capacitor, the other end of the third resistor is connected to the first input end, and the other end of the second capacitor is grounded;

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge and discharge the second capacitor to obtain a charged and discharged signal;

the third resistor is used for transmitting the charged and discharged signals to the first input end so as to update the input signals of the first input end.

That is, the charging and discharging circuit 13 is composed of a second resistor, a third resistor and a second capacitor, the second resistor and the second capacitor form an RC network of the first input terminal to increase the delay of the carrier circuit, and the second resistor and the third resistor form an oscillation circuit to adjust the output oscillation frequency.

In order to obtain a carrier signal of the desired frequency, in an alternative embodiment, when the carrier signal is high, the carrier signal is, correspondingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so as to charge the second capacitor to obtain a charged signal;

the third resistor is used for transmitting the charged signal to the first input end so as to update the input signal of the first input end;

wherein the updated input signal is at a high level.

When the carrier signal output by the third output end is at a high level, the carrier signal is transmitted to the equal second capacitor through the second resistor to charge the second capacitor, and the charged signal is transmitted to the first input end through the third resistor, so that the input signal input by the first input end is changed into a high level.

When the input signal input by the first input end is high level, the first output end inverts the phase of the input signal to obtain low level, the output signal of the first output end clamps the electric potential of the second input end to be low level, after phase inversion, the output signal of the second output end is high level, the output signal of the second output end clamps the electric potential of the third input end to be high level, after phase inversion, the output signal of the third output end is low level, namely, the obtained carrier signal is low level.

In this way, a square wave can be obtained, i.e. the carrier signal is obtained through output, and meanwhile, the time delay of the inverter 11 can be adjusted by adjusting the second resistor and the second capacitor, so that the carrier signal with the required frequency can be obtained.

In order to obtain a carrier signal of the desired frequency, in an alternative embodiment, when the carrier signal is low, the carrier signal is, correspondingly,

the second resistor is used for transmitting the carrier signal to the second capacitor so that the second capacitor discharges to obtain a discharged signal;

the third resistor is used for transmitting the discharged signal to the first input end so as to update the input signal of the first input end;

wherein the updated input signal is at a low level.

When the carrier signal output by the third output end is at a low level, the carrier signal is transmitted to the equal second capacitor through the second resistor to discharge for the second capacitor, and the third resistor transmits the discharged signal to the first input end, so that the input signal input by the first input end is changed into a low level.

When the input signal input by the first input end is low level, the first output end inverts the phase of the input signal to obtain high level, the output signal of the first output end clamps the electric potential of the second input end to high level, after phase inversion, the output signal of the second output end is low level, the output signal of the second output end clamps the electric potential of the third input end to low level, after phase inversion, the output signal of the third output end is high level, namely, the obtained carrier signal is high level.

In this way, a square wave, i.e. a carrier signal, can be obtained, and the delay of the inverter 11 can be adjusted by adjusting the second resistor and the second capacitor, so as to obtain a carrier signal with a desired frequency.

The carrier circuit according to one or more of the above embodiments is described below by way of example.

Fig. 2 is a schematic structural diagram of an example of an optional carrier circuit provided in an embodiment of the present application, and as shown in fig. 2, the carrier circuit may include: the charging and discharging circuit consists of an inverter U1, a filter capacitor C2, a feedback resistor R2, a resistor R1, a resistor R3 and a capacitor C1; wherein the content of the first and second substances,

u1 includes 16 ports, ports 1 and 15 being enable ports, ports 2, ports 4, ports 6, ports 10, ports 12 and 14 being 6 input ports, a1, a2, A3, a4, A5 and a6, ports 3, ports 5, ports 7, ports 9, ports 11 and 13 being 6 output ports, Y1, Y2, Y3, Y4, Y5 and Y6, wherein a1 corresponds to Y1, a2 corresponds to Y2, A3 corresponds to Y3, a4 corresponds to Y4, A5 corresponds to Y5, a6 corresponds to Y6, and port 16 being a power supply terminal vcc.

In fig. 2, the enable terminal is grounded, the power supply terminals VCC are respectively connected to one ends of power supplies VCC and C2, the other end of C2 is grounded, a1 is respectively connected to one end of R1 and one end of R2, a2 is connected to Y1, A3 is respectively connected to the other end of R2 and Y2, wherein Y3 is connected to one end of R3, the other end of R3 is respectively connected to the other end of R1 and one end of C1, the other end of C1 is grounded, and Y3 serves as an output terminal of the carrier circuit to output a carrier signal.

Wherein, R1 ═ 22K Ω, R2 ═ 100K Ω, R3 ═ 6.5K Ω, C1 ═ 3900pF, and C2 ═ 1 μ f.

The working principle is as follows:

u1 is an inverter, and the specific function table 1 is as follows, with the input and output states inverted:

TABLE 1

Input(A1，2…6)	Output(Y1，2…6)
		L	H
H	L

C2 is a power supply filter capacitor, power supply interference suffered by U1 is reduced, C1 and R1 are RC networks of the first input stage, circuit delay is increased, R2 is a feedback resistor from the second output stage to the first output stage, signal stability is increased, R3 and R1 are RC networks from the third output stage to the first input stage, and C2 is a filter capacitor, so that ripple noise is filtered, and anti-interference capability of U1 is improved.

The specific working process of fig. 2 is as follows:

referring to the above values, fig. 3 is a schematic diagram of an optional simulation result corresponding to fig. 2 according to an embodiment of the present disclosure, and referring to fig. 3, an obtained carrier signal is a square wave, a horizontal axis is time T, a vertical axis is voltage, when T is 601.214 μ s, the voltage is-2.516V, and when T is 576.972 μ s, the voltage is 2.484V, it can be seen that, according to fig. 2, a square wave with stable frequency can be obtained, a waveform frequency F is 1/T is 40KHz, simulation is consistent with theoretical design, in an actual circuit, errors of U1 and a capacitor device may be different from theoretical values, and at this time, adjustment may be performed according to actual situations.

The value of the capacitor C1 can influence the starting time of the waveform to complete oscillation, the capacitance value can be set according to the requirement of the carrier signal time sequence required by the system, and the suggested value of the capacitor C1 is less than 10nF, so that the requirement of most systems can be met.

Wherein, R1, R3 constitute the oscillating circuit, can adjust output oscillation frequency, and R2 is feedback resistance, can increase loop stability. Meanwhile, as the delay time of the U1 is in ns level, the oscillation frequency is too large, and the network formed by the R1, the R3, the R2 and the C1 can reduce the oscillation frequency and meet the design requirement.

The embodiment of the application provides a carrier circuit, and this carrier circuit includes the phase inverter, filter circuit, charge-discharge circuit and power, and wherein, the power end connection power of phase inverter, the enable terminal of phase inverter and the earthing terminal of phase inverter ground respectively, and the phase inverter is used for: the method comprises the steps that an input signal is received at the input end of a phase inverter, the phase of the input signal is inverted, a carrier signal is obtained at the output end of the phase inverter, one end of a filter circuit is connected with a power supply end, the other end of the filter circuit is grounded, the filter circuit is used for filtering a power supply, the first end of a charge-discharge circuit is connected with the output end, the second end of the charge-discharge circuit is connected with the input end, the third end of the charge-discharge circuit is grounded, and the charge-discharge circuit is used for charging or discharging according to the carrier signal; that is to say, in this application embodiment, the phase of the input signal is inverted through the inverter, and the delay time of the inverter can be adjusted by using the charge-discharge circuit while the input signal of the inverter is updated, so as to output a carrier signal with a desired frequency, and the power supply is filtered by the filter circuit to remove ripple noise, so that the interference of the power supply to the inverter can be reduced, the stability of the carrier signal is improved, and the quality of the carrier signal is improved.

Fig. 4 is a schematic structural diagram of an alternative directional sound generating apparatus according to an embodiment of the present application, and as shown in fig. 4, the embodiment of the present application provides a directional sound generating apparatus 400, and a carrier circuit of the directional sound generating apparatus 400 is the carrier circuit described in one or more embodiments above.

The computer-readable storage medium may be a magnetic random access Memory (FRAM), a Read Only Memory (ROM), a Programmable Read Only Memory (PROM), an Erasable Programmable Read Only Memory (EPROM), an Electrically Erasable Programmable Read Only Memory (EEPROM), a Flash Memory (Flash Memory), a magnetic surface Memory, an optical Disc, or a Compact Disc Read-Only Memory (CD-ROM), among others.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application.