Encoder output level control circuit

文档序号:1641238 发布日期:2019-12-20 浏览:17次 中文

阅读说明:本技术 一种编码器输出电平控制电路 (Encoder output level control circuit ) 是由 张志宏 李绍华 齐东阳 于 2019-10-24 设计创作,主要内容包括:本发明公开了一种编码器输出电平控制电路,包括编码器电平控制电路和电平隔离缓冲输出电路,所述编码器电平控制电路包括D触发器U1A和第一电阻R1、第二电阻R2,所述D触发器U1A包括CIK端、D端、S端、R端、Q端和Q-端,所述电平隔离缓冲输出电路包括三态缓冲门U2A和第三电阻R3,所述三态缓冲门U2A包括输出端和控制端,所述D触发器U1A的CIK端依次连接有编码器A和第二电阻R2,所述D触发器U1A的D端依次连接有编码器B和第一电阻R1,所述D触发器UIA的S端和R端接地;本发明中的一种编码器输出电平控制电路,其结构简单,性能稳定,实用性强,通过编码器A、B相位差的判断即可对实时控制步进电机等执行机构的转向或进退。(The invention discloses an encoder output level control circuit, which comprises an encoder level control circuit and a level isolation buffer output circuit, wherein the encoder level control circuit comprises a D trigger U1A, a first resistor R1 and a second resistor R2, the D trigger U1A comprises a CIK end, a D end, an S end, an R end, a Q end and a Q-end, the level isolation buffer output circuit comprises a tri-state buffer gate U2A and a third resistor R3, the tri-state buffer gate U2A comprises an output end and a control end, the CIK end of the D trigger U1A is sequentially connected with an encoder A and a second resistor R2, the D end of the D trigger U1A is sequentially connected with an encoder B and a first resistor R1, and the S end and the R end of the D trigger UIA are grounded; the encoder output level control circuit is simple in structure, stable in performance and strong in practicability, and steering or forward and backward of actuating mechanisms such as the stepping motor can be controlled in real time through judgment of the phase difference of the encoder A, B.)

1. The utility model provides an encoder output level control circuit, its characterized in that includes encoder level control circuit and level isolation buffering output circuit, encoder level control circuit includes D flip-flop U1A and first resistance R1, second resistance R2, D flip-flop U1A includes CIK end, D end, S end, R end, Q end and Q-end, level isolation buffering output circuit includes tristate buffer gate U2A and third resistance R3, tristate buffer gate U2A includes output and control end.

2. The encoder output level control circuit as claimed in claim 1, wherein the CIK terminal of the D flip-flop U1A is sequentially connected with an encoder a and a second resistor R2, the D terminal of the D flip-flop U1A is sequentially connected with an encoder B and a first resistor R1, the S terminal and the R terminal of the D flip-flop UIA are grounded, the Q terminal of the D flip-flop UIA is connected with the input terminal of the tri-state buffer gate U2A, and the Q-terminal of the D flip-flop UIA is floating.

3. The encoder output level control circuit as claimed in claim 1, wherein the output terminal of the tri-state buffer gate U2A is connected to the Q terminal of the D flip-flop U1A, the output terminal of the tri-state buffer gate U2A is connected to one terminal of a third resistor R3, and the control terminal of the tri-state buffer gate U2A is grounded.

4. The encoder output level control circuit of claim 1, wherein the other ends of the first resistor R1, the second resistor R2 and the third resistor R3 are all connected to a power source VCC to form a pull-up resistor.

Technical Field

The invention relates to the technical field of electromechanical integration automatic control, in particular to an encoder output level control circuit.

Background

The general rotary encoder is a detection element device used for measuring a rotating speed or a position control system, the rotary encoder for double-path exhalation outputs two groups of pulses with 90-degree phase difference, and the two groups of pulses can not only measure the rotating speed, but also judge the rotating direction. The working mode is only limited to passive detection and simple passive control of system parameters, but more active control is adopted in the field of electromechanical integrated automatic control, and more precisely, pulse output and direction judgment functions of the encoder can be fully utilized in control systems such as a stepping motor and the like, so that the application field of the rotary encoder can be further expanded.

Therefore, in view of the above technical problems, it is desirable to provide an encoder output level control circuit.

Disclosure of Invention

In view of the above, an object of the present invention is to provide an encoder output level control circuit, which has a simple structure, stable performance and strong practicability, and can control the rotation or forward/backward movement of an actuator such as a stepping motor in real time by determining the phase difference of an encoder A, B.

In order to achieve the above object, an embodiment of the present invention provides the following technical solutions:

the utility model provides an encoder output level control circuit, includes encoder level control circuit and level isolation buffering output circuit, encoder level control circuit includes D flip-flop U1A and first resistance R1, second resistance R2, D flip-flop U1A includes CIK end, D end, S end, R end, Q end and Q-end, level isolation buffering output circuit includes tristate buffer gate U2A and third resistance R3, tristate buffer gate U2A includes output and control end.

As a further improvement of the present invention, the CIK end of the D flip-flop U1A is sequentially connected to an encoder a and a second resistor R2, the D end of the D flip-flop U1A is sequentially connected to an encoder B and a first resistor R1, the S end and the R end of the D flip-flop UIA are grounded, the Q end of the D flip-flop UIA is connected to the input end of the tri-state buffer gate U2A, and the Q-end of the D flip-flop UIA is floating.

As a further improvement of the invention, the output end of the tri-state buffer gate U2A is connected with the Q end of the D flip-flop U1A, the output end of the tri-state buffer gate U2A is connected with one end of the third resistor R3, and the control end of the tri-state buffer gate U2A is grounded.

As a further improvement of the present invention, the other ends of the first resistor R1, the second resistor R2 and the third resistor R3 are all connected to a power source VCC to form a pull-up resistor.

The invention has the beneficial effects that: the encoder output level control circuit is simple in structure, stable in performance and strong in practicability, and steering or forward and backward of actuating mechanisms such as the stepping motor can be controlled in real time through judgment of the phase difference of the encoder A, B.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an encoder output level control circuit according to an embodiment of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the various drawings of the present invention, certain dimensions of structures or portions are exaggerated relative to other structures or portions for ease of illustration and, therefore, are used only to illustrate the basic structure of the subject matter of the present invention.

Terms such as "left", "right", and the like, used herein to denote relative spatial positions, are used for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. The spatially relative positional terms may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "to the right" of other elements or features would then be oriented "to the left" of the other elements or features. Thus, the exemplary term "right side" may encompass both left and right orientations. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

Referring to fig. 1, in a specific embodiment of the present invention, an encoder output level control circuit includes an encoder level control circuit and a level isolation buffer output circuit, the encoder level control circuit includes a D flip-flop U1A, a first resistor R1, and a second resistor R2, the D flip-flop U1A includes a CIK terminal, a D terminal, an S terminal, an R terminal, a Q terminal, and a Q terminal, the CIK terminal of the D flip-flop U1A is sequentially connected to an encoder a and a second resistor R2, the D terminal of the D flip-flop U1A is sequentially connected to an encoder B and the first resistor R1, the S terminal and the R terminal of the D flip-flop UIA are grounded, the Q terminal of the D flip-flop UIA is connected to an input terminal of a tri-state buffer gate U2A, and the Q terminal of the D flip-flop UIA is floating.

The level isolation buffer output circuit comprises a tri-state buffer gate U2A and a third resistor R3, the tri-state buffer gate U2A comprises an output end and a control end, the output end of the tri-state buffer gate U2A is connected with the Q end of a D trigger U1A, the output end of the tri-state buffer gate U2A is connected with one end of a third resistor R3, and the control end of the tri-state buffer gate U2A is grounded.

The other ends of the first resistor R1, the second resistor R2 and the third resistor R3 are all connected with a power supply VCC to form a pull-up resistor.

When the encoder manually rotates clockwise, the phase pulse of the encoder A leads the phase pulse of the encoder B by 90 degrees, and the tri-state buffer gate U2A outputs a high level 1; when the encoder is manually rotated anticlockwise, the pulse of the encoder A phase lags the pulse of the encoder B phase by 90 degrees, and the tri-state buffer gate U2A outputs low level 0, so that the tri-state buffer gate can be used as a direction control level for controlling actuators such as a stepping motor and the like, and can control the rotation or the advance and retreat of the actuators in real time.

According to the technical scheme, the invention has the following beneficial effects:

the encoder output level control circuit is simple in structure, stable in performance and strong in practicability, and steering or forward and backward of actuating mechanisms such as the stepping motor can be controlled in real time through judgment of the phase difference of the encoder A, B.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

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