阅读说明：本技术 一种用于充电桩的pwm整流电路 (PWM (pulse-width modulation) rectifying circuit for charging pile ) 是由 张江林 谢晓娜 庄慧敏 吴磊 樊昌元 刘兴茂 张道元 邓昌建 唐必秀 李代伟 于 2019-11-08 设计创作，主要内容包括：本发明公开了一种用于充电桩的PWM整流电路,主要解决现有充电桩整流电路对电网以及其他用电设备干扰大,功率因数低和响应频率低的问题。该电路包括与充电桩的交流输入端相连的全波整流电路、输入电流采样电路、输入电压采样电路、Boost升压电路、输出采样电路、第一PI控制电路、直流参考电压源、调节输出采样电路、信号调制电路、乘法器、第二PI控制电路、PWM产生电路、三角波发生器和驱动电路。通过上述设计,本发明实现了充电桩充电过程中的整流,减少利用充电桩对负载充电时对负载设备的干扰,提升充电桩的功率因数和响应频率。因此,具有很高的使用价值和推广价值。(The invention discloses a PWM (pulse-width modulation) rectifying circuit for a charging pile, which mainly solves the problems of large interference of the existing charging pile rectifying circuit on a power grid and other electric equipment, low power factor and low response frequency. The circuit comprises a full-wave rectifying circuit, an input current sampling circuit, an input voltage sampling circuit, a Boost circuit, an output sampling circuit, a first PI control circuit, a direct-current reference voltage source, an adjusting output sampling circuit, a signal modulation circuit, a multiplier, a second PI control circuit, a PWM (pulse width modulation) generating circuit, a triangular wave generator and a driving circuit, wherein the full-wave rectifying circuit is connected with an alternating-current input end of a charging pile. Through the design, the invention realizes rectification in the charging process of the charging pile, reduces the interference of the charging pile on load equipment during charging of the load, and improves the power factor and the response frequency of the charging pile. Therefore, the method has high use value and popularization value.)

1. A PWM rectification circuit for a charging pile is characterized by comprising a full-wave rectification circuit, an input current sampling circuit and an input voltage sampling circuit, wherein the full-wave rectification circuit is connected with an alternating current input end of the charging pile, a Boost circuit connected with the full-wave rectification circuit, an output sampling circuit connected with the Boost circuit, a first PI control circuit whose positive pole is connected with the output sampling circuit, a DC reference voltage source connected with the cathode of the first PI control circuit, a regulation output sampling circuit connected with the output end of the first PI control circuit, a signal modulation circuit connected with the regulation output sampling circuit, a multiplier connected with the signal modulation circuit and the input voltage sampling circuit, a second PI control circuit with an anode connected with the multiplier and a cathode connected with the input current sampling circuit, the PWM generating circuit is connected with the output end of the second PI control circuit, and the triangular wave generator and the driving circuit are connected with the PWM generating circuit; and the other end of the driving circuit is connected with a Boost circuit.

2. The PWM rectification circuit for the charging pile according to claim 1, wherein the input current sampling circuit comprises a chip U1 of type ACS712, a capacitor C1 with one end connected to a VCC pin of the chip U1 and the other end grounded, a capacitor C3 with one end connected to a FILTER pin of the chip U1 and the other end connected to a GND pin of the chip U1, a resistor R1 connected to a VIOUT pin of the chip U1, an amplifier A1 with an anode connected to the other end of the resistor R1, a resistor R2 connected to both the cathode and the output end of the amplifier A1, a capacitor C2 with one end connected to the cathode of a voltage source of the amplifier A1 and the other end grounded, a capacitor C4 with one end connected to the anode of a voltage source of the amplifier A1 and the other end connected to the ground, a capacitor C5 with one end connected to the other end of the resistor R2 and the other end grounded, and a plug P1 connected to both ends of; the two IP + and two IP-pins of the chip U1 are connected with the alternating current input end of the charging pile, the positive electrode of the voltage source of the amplifier A1 is connected with the positive electrode of the 12V voltage source, and the negative electrode of the voltage source of the amplifier A1 is connected with the negative electrode of the 12V voltage source; wherein plug P1 is connected to the second PI controller.

3. The PWM rectification circuit for the charging post according to claim 1, wherein the input voltage sampling circuit comprises a resistor R3 connected with the AC input end of the charging post, a transformer T1 with two interfaces connected with the resistor R3 and the AC input end of the charging post respectively at one side, a resistor R4 connected in parallel with the two secondary ends of the transformer T1 and with one end grounded, a resistor R5 connected with the other end of the resistor R4, an amplifier A2 with the anode connected with the other end of the resistor R5, a capacitor C6 and a resistor R6 with one end connected with the anode of the amplifier A2 and the other end grounded, a resistor R7 with one end connected with the cathode and the output end of the amplifier A2, a resistor R8 with one end connected with the resistor R7 and the other end connected with 3.3V voltage, a diode D1 with the anode connected with 3.3V voltage and the cathode connected with the resistors R7 and R8, a diode D2 with the anode connected with the cathode and the cathode grounded, a capacitor C7 connected in parallel across the diode D2, and a plug P2 connected in parallel across the capacitor C7; the plug P2 is connected to the multiplier.

4. The PWM rectifier circuit for the charging pile according to claim 1, wherein the output sampling circuit comprises a chip U2 with model number INA282, a plug P3 connected with a + IN pin of the chip U2, resistors R9 and R10 connected with the plug P3, a resistor R11 connected with the other end of R9, a plug P4 connected with the other end of the resistor R11, a resistor R12 connected with a connecting end of the resistors R9 and R11 and a-IN pin of the chip U2, a resistor R13 connected with the other end of the resistor R12 and grounded, a plug P5 connected with a connecting end of the resistor R12 and the resistor R13, a plug P6 connected with a V-pin of the chip U2 and connected with 12V voltage, a plug P7 connected with an OUT pin of the chip U2, and a plug P8 connected with GND, 2 and NC pins of the chip U2 and grounded; the plug P3 is connected with a Boost voltage boosting circuit, the plug P7 is connected with a regulation output sampling circuit, and the plug P6 is connected with a direct current reference voltage source.

5. The PWM rectifier circuit for the charging post according to claim 1, wherein the driving circuit comprises a coupling device chip U3 with model number HCPL-3180, a capacitor C8 with one end connected with an ANODE pin of a chip U3 and the other end grounded, a resistor R14, a resistor R15 connected with the ANODE pin of the chip U3, a plug P9 connected with the other end of the resistor R15, a capacitor C9 with one end connected with a VCC pin of the chip U3 and the other end grounded, and a plug P10 with one end connected with a VO pin of the chip U3; the N/C, CATHODE and VEE pins of the chip U3 are grounded, and the VCC pin of the chip U3 is connected with 10V voltage; the plug P9 is connected with the PWM generating circuit, and the plug P10 is connected with the Boost circuit.

Technical Field

The invention relates to the technical field of charging piles, in particular to a PWM (pulse width modulation) rectifying circuit for a charging pile.

Background

In the development process of electric vehicles, the charging pile is used as energy input, the power loss of the charging pile is large, and the harmonic pollution to a power grid is an important research point. The rectifying part of the conventional direct current charging system of the electric vehicle mostly adopts thyristor phase-controlled rectification and diode uncontrollable rectification. The technologies are more used in electric vehicle chargers, and have obvious disadvantages that the power factor is low, the harmonic pollution is great to the power grid, and the utilization rate of the electric energy of the power grid is reduced. Harmonic waves can cause power loss increase of a power grid, service life shortening of equipment, malfunction of grounding protection, overheating of lines and equipment and the like, and particularly, third harmonic waves can generate very large neutral line current to cause unsafe operation of the equipment.

When semiconductor technology is not available, rectification, i.e., rotary AC/DC conversion, is typically accomplished using motor-generator sets and valve-ion tube devices. Later, electron tube and ion tube rectifiers appeared. With the improvement of power electronic technology and the improvement of the cost performance of semiconductors, people gradually abandon rotary AC/DC conversion and electronic tube and ion tube rectifiers, and most of the prior art use uncontrollable rectification and controllable rectification. The uncontrollable rectification mainly adopts a semiconductor diode, and the single-phase conduction characteristic of the diode is utilized for rectification. Controllable rectification can be divided into phase control and PWM control. The phase-Controlled controllable rectification is mainly implemented by using a thyristor (SCR), which has no self-turn-off characteristic and is actually a semi-controllable device. The PWM-controlled rectifier performs rectification mainly by controlling the duty cycle of the turn-off switching device, and since the duty cycle can be adjusted, the final output voltage may be higher than the original input voltage. The rectifier device mainly uses a power field effect Transistor (VMOS) and an insulated Gate Transistor (IGBT).

Uncontrollable rectification is widely applied to low-power rectification equipment, and is widely used by people particularly when the open-circuit voltage is a fixed output value. The controllable rectification is mainly suitable for a high-power output circuit, the development time of the phase-controlled rectification circuit is longer than that of a PWM (pulse-width modulation) control rectification circuit, the technology is more mature, but the phase-controlled rectification circuit has the defects of low power factor, low response frequency and the like due to great interference on a power grid and other electric equipment, and the use of the phase-controlled rectification circuit has great limitation.

Disclosure of Invention

The invention aims to provide a PWM (pulse-width modulation) rectifying circuit for a charging pile, which mainly solves the problems of high interference on a power grid and other electric equipment, low power factor and low response frequency of the conventional charging pile rectifying circuit.

In order to achieve the purpose, the technical scheme adopted by the invention is as follows:

a PWM rectification circuit for a charging pile comprises a full-wave rectification circuit, an input current sampling circuit and an input voltage sampling circuit which are connected with an alternating current input end of the charging pile, a Boost circuit connected with the full-wave rectification circuit, an output sampling circuit connected with the Boost circuit, a first PI control circuit whose positive pole is connected with the output sampling circuit, a DC reference voltage source connected with the cathode of the first PI control circuit, a regulation output sampling circuit connected with the output end of the first PI control circuit, a signal modulation circuit connected with the regulation output sampling circuit, a multiplier connected with the signal modulation circuit and the input voltage sampling circuit, a second PI control circuit with an anode connected with the multiplier and a cathode connected with the input current sampling circuit, the PWM generating circuit is connected with the output end of the second PI control circuit, and the triangular wave generator and the driving circuit are connected with the PWM generating circuit; and the other end of the driving circuit is connected with a Boost circuit.

Further, the input current sampling circuit comprises a chip U1 of type ACS712, a capacitor C1 with one end connected to the VCC pin of the chip U1 and the other end grounded, a capacitor C3 with one end connected to the FILTER pin of the chip U1 and the other end connected to the GND pin of the chip U1, a resistor R1 connected to the VIOUT pin of the chip U1, an amplifier A1 with the anode connected to the other end of the resistor R1, a resistor R2 connected to the cathode and the output end of the amplifier A1, a capacitor C2 with one end connected to the cathode of the voltage source of the amplifier A1 and the other end grounded, a capacitor C4 with one end connected to the anode of the voltage source of the amplifier 1 and the other end grounded, a capacitor C5 with one end connected to the other end of the resistor R2 and the other end grounded, and a plug P1 connected to both ends of the capacitor C; the two IP + and two IP-pins of the chip U1 are connected with the alternating current input end of the charging pile, the positive electrode of the voltage source of the amplifier A1 is connected with the positive electrode of the 12V voltage source, and the negative electrode of the voltage source of the amplifier A1 is connected with the negative electrode of the 12V voltage source; wherein plug P1 is connected to the second PI controller.

Further, the input voltage sampling circuit comprises a resistor R3 connected with an alternating current input end of the charging pile, a transformer T1 with two interfaces at one side connected with the resistor R3 and the alternating current input end of the charging pile respectively, a resistor R4 connected with two secondary ends of the transformer T1 in parallel and with one end grounded, a resistor R5 connected with the other end of the resistor R4, an amplifier A2 with the anode connected with the other end of the resistor R5, a capacitor C6 and a resistor R6 which are connected with the anode of the amplifier A2 in parallel and with the other end grounded, a resistor R7 with one end connected with the cathode and the output end of the amplifier A2, a resistor R8 with one end connected with the resistor R7 and with the other end connected with 3.3V voltage, a diode D1 with the anode connected with the 3.3V voltage and the cathode connected with the resistors R7 and R8, a diode D2 with the anode connected with the cathode of the diode D1 and the cathode of the diode D2 and the cathode of the diode D, and a plug P2 connected in parallel across the capacitor C7; the plug P2 is connected to the multiplier.

Further, the output sampling circuit comprises a chip U2 with the model number INA282, a plug P3 connected with a + IN pin of the chip U2, resistors R9 and R10 connected with the plug P3, a resistor R11 connected with the other end of R9, a plug P4 connected with the other end of the resistor R11, a resistor R12 connected with the connecting end of the resistors R9 and R11 and a-IN pin of the chip U2, a resistor R13 connected with the other end of the resistor R12 and grounded at the other end, a plug P5 connected with the connecting ends of the resistors R12 and R13, a plug P6 connected with a V-pin of the chip U2 and connected with 12V voltage, a plug P2 connected with an OUT pin of the chip U2, and a plug P2 connected with an NC pin, a REF pin of the chip U2 and grounded at one end; the plug P3 is connected with a Boost voltage boosting circuit, the plug P7 is connected with a regulation output sampling circuit, and the plug P6 is connected with a direct current reference voltage source.

Further, the driving circuit comprises a coupling device chip U3 with the model of HCPL-3180, a capacitor C8 and a resistor R14 which are connected in parallel, wherein one end of the capacitor C4625 is connected with the ANODE pin of the chip U3, the other end of the capacitor C14 is grounded, a resistor R15 is connected with the ANODE pin of the chip U3, a plug P9 is connected with the other end of the resistor R15, a capacitor C9 with one end connected with the VCC pin of the chip U3 and the other end grounded, and a plug P10 with one end connected with the VO pin of the chip U3; the N/C, CATHODE and VEE pins of the chip U3 are grounded, and the VCC pin of the chip U3 is connected with 10V voltage; the plug P9 is connected with the PWM generating circuit, and the plug P10 is connected with the Boost circuit.

Compared with the prior art, the invention has the following beneficial effects:

(1) the invention adopts voltage and current double closed-loop control, utilizes the direct current boosting end of a Boost circuit to carry out voltage sampling, compares the voltage with a set reference voltage, and obtains an error value through calculation. The error value is subjected to a series of signal adjustment control and PI adjustment to obtain a periodic signal, which is voltage outer loop control. The obtained periodic signal and the current signal collected by the direct current input measurement are used for synthesis modulation, and a small value of the deviation signal is obtained at the moment, and the value of the deviation signal is almost 0 after the signal is stable, which is the current inner loop control. The gain and response speed of the signal are adjusted to a reasonable degree. Finally, a signal for controlling the power switch device is obtained, so that the boosting process is completed, rectification in the charging process of the charging pile is realized, interference to load equipment when the load is charged by the charging pile is reduced, and the power factor and the response frequency of the charging pile are improved.

(2) According to the invention, through setting two times of PI regulation control, after the final output direct current voltage is sampled, the first time of PI control is carried out, and when the alternating current is sampled, PI regulation is carried out again. When the proportional link is lifted, the dynamic error of the system can be reduced, and the precision of the control system is improved. And can eliminate the static error of system for whole charging pile charging system can be more stable.

Drawings

Fig. 1 is an overall schematic block diagram of the present invention.

Fig. 2 is a schematic diagram of an input current sampling circuit according to the present invention.

Fig. 3 is a schematic diagram of an input voltage sampling circuit according to the present invention.

Fig. 4 is a schematic diagram of an output sampling circuit of the present invention.

Fig. 5 is a schematic diagram of a driving circuit according to the present invention.

Detailed Description

The present invention will be further described with reference to the following description and examples, which include but are not limited to the following examples.