阅读说明：本技术 面向高速信号平台的多级内存管理方法 (Multi-level memory management method for high-speed signal platform ) 是由 刘雷 王旭 周广蕴 刘毅珍 杨率帅 于 2019-09-18 设计创作，主要内容包括：本发明涉及一种面向高速信号平台的内存管理方法,属于信号处理技术领域,解决代码规模与内存容量之间的矛盾问题,方法包括,将所述信号平台的内存空间划分为应用运行区和镜像驻留区；编译平台的操作系统生成操作系统的镜像文件和系统函数表,编译平台的应用软件生成应用软件的可执行文件和应用入口表；平台加电运行,根据系统函数表,将所述镜像文件加载到镜像驻留区中运行,根据应用入口表,将需要运行的所述可执行文件加载到应用运行区中运行。本发明不裁剪实时操作系统的任何功能,既缩短了应用软件的运行周期,又使得应用软件充分享受操作系统的系统服务,为DSP应用软件提供了完整功能的运行时软件环境。(The invention relates to a memory management method facing a high-speed signal platform, which belongs to the technical field of signal processing and solves the problem of contradiction between code scale and memory capacity; an operating system of the compiling platform generates a mirror image file and a system function table of the operating system, and application software of the compiling platform generates an executable file and an application inlet table of the application software; and powering up the platform for operation, loading the image file into the image resident region for operation according to the system function table, and loading the executable file to be operated into the application operation region for operation according to the application entry table. The invention does not cut any function of the real-time operating system, shortens the running period of the application software, ensures that the application software fully enjoys the system service of the operating system and provides a running software environment with complete functions for the DSP application software.)

1. A memory management method for a high-speed signal platform is characterized by comprising the following steps,

dividing the memory space of the platform into an application operation area and a mirror image residence area;

compiling an operating system of the platform to generate a mirror image file and a system function table of the operating system, and compiling application software of the platform to generate an executable file and an application inlet table of the application software; the system function table is used for recording an entry address of the mirror image file loaded into the mirror image residence area to operate; the application entry table is used for recording entry addresses of the executable files loaded into the application running area to run;

and the platform is powered on to operate, the image file is loaded into the image resident area to operate according to the system function table, and the executable file needing to operate is loaded into the application operating area to operate according to the application entry table.

2. The memory management method according to claim 1, wherein the application operating region is disposed in a processor on-chip memory space of the platform.

3. The memory management method according to claim 2, wherein the on-chip memory space of the signal platform processor is averagely allocated to the application operation area having the same size and corresponding to the DSP core according to the number of DSP cores of the platform processor.

4. The memory management method according to claim 3, wherein the mirror image residence is located in an off-chip memory space of the platform.

5. The memory management method of claim 4, wherein the off-chip memory space of a signal platform is evenly allocated to mirror residences of equal size and corresponding to DSP cores according to the number of DSP cores included in the platform's processor.

6. The memory management method according to claim 5, wherein in the operating system compilation, a DSP core and a mirror image resident area occupied by running the mirror image file are specified in a static specified manner; and appointing the entry address of the mirror image file loaded in the mirror image residence area, and recording the entry address into the system function table.

7. The memory management method according to claim 6, wherein a system function, a heap space, and a stack space of an operating system are acquired by reading a symbol table of the image file; and statically appointing the entry address of the system function loading image residence area and the entry addresses of the heap space and the stack space, and recording the entry addresses into a system function table.

8. The memory management method according to claim 7, wherein in the application software compilation, a DSP core and an application execution area occupied by executing the executable file are specified in a static specification manner; and appointing the entry address of the executable file loaded in the application running area, and recording the entry address into an application entry function table.

9. The memory management method according to claim 1, wherein in the running process of the application software, when a specified system function in the image file needs to be called, an entry address of the system function is obtained according to the system function table, a mirror image resident region is loaded, and the system function is run.

10. The memory management method according to any one of claims 1 to 9, wherein the image file and the executable file are fixed to an external non-volatile memory of the signal platform for storage.

Technical Field

The invention relates to the technical field of signal processing, in particular to a multi-level memory management method for a high-speed signal platform.

Background

High-speed real-time signal processing is a special branch of signal processing. The method is mainly characterized by high-speed processing and real-time processing, and is widely applied to the key fields of industry and military, such as radar signal processing, communication base station signal processing and the like, wherein the core of the high-speed real-time signal processing technology is a high-speed signal processor (DSP) technology.

The DSP processor is a special singlechip with a special arithmetic element, the core of the DSP processor usually has an on-chip Memory and an off-chip Memory, wherein, the on-chip Memory mostly adopts SRAM (Static Random-Access Memory), the off-chip space mostly adopts DDR (Double Data Rate SDRAM ), each DSP core has an independent on-chip space, all processor cores share the off-chip space, the operation Rate of the on-chip space program exceeds one order of magnitude of the off-chip space, and simultaneously, because the material cost of the on-chip Memory is higher, the on-chip space only has a few hundred KB size, and the off-chip space can reach a few hundred MB size.

Generally, a real-time operating system adopts flat-panel memory management, an operating system image and an application program are uniformly placed in a continuous memory space, the running space of a full-function real-time operating system needs dozens of MB, the running space of application software usually needs dozens of KB, and the flat-panel memory management cannot store the operating system image and the application program in the chip space of a DSP processor at the same time.

With the improvement of the functional complexity of the software of the DSP platform, the current software for the DSP processor not only needs to have a signal processing function, but also needs to support middleware software such as a network, a high-speed communication bus, and graphic image processing, and the like, and the increase of the functional requirements of the application software on the real-time operating system brings expansion of the code scale of the real-time operating system, and the contradiction between the huge code scale and the small-capacity on-chip storage space, so that the traditional method for cutting the real-time operating system cannot meet the requirements of the application software on the operating system.

Disclosure of Invention

In view of the foregoing analysis, the present invention aims to provide a multi-level memory management method for a high-speed signal platform, which can retain the complete functions of a real-time operating system under the condition of satisfying the storage space limitation of a DSP processor.

The purpose of the invention is mainly realized by the following technical scheme:

the invention discloses a memory management method facing a high-speed signal platform, which comprises the following steps,

dividing the memory space of the platform into an application operation area and a mirror image residence area;

compiling an operating system of the platform to generate a mirror image file and a system function table of the operating system, and compiling application software of the platform to generate an executable file and an application inlet table of the application software; the system function table is used for recording an entry address of the mirror image file loaded into the mirror image residence area to operate; the application entry table is used for recording entry addresses of the executable files loaded into the application running area to run;

and the platform is powered on to operate, the image file is loaded into the image resident area to operate according to the system function table, and the executable file needing to operate is loaded into the application operating area to operate according to the application entry table.

Further, the application operating area is disposed in an on-chip memory space of a processor of the platform.

Further, according to the number of DSP cores of the platform processor, the space of the memory in the chip of the signal platform processor is averagely distributed into application operation areas which have the same size and correspond to the DSP cores.

Further, the mirror image residence area is arranged in an off-chip memory space of the platform.

Further, according to the number of DSP cores included in the processor of the platform, the off-chip memory space of the signal platform is averagely allocated into mirror image residence areas which are equal in size and correspond to the DSP cores.

Furthermore, in the compiling of the operating system, a DSP core and a mirror image residence area occupied by the running of the mirror image file are appointed in a static appointed mode; and appointing the entry address of the mirror image file loaded in the mirror image residence area, and recording the entry address into the system function table.

Further, a system function, a heap space and a stack space of the operating system are obtained by reading the symbol table of the mirror image file; and statically appointing the entry address of the system function loading image residence area and the entry addresses of the heap space and the stack space, and recording the entry addresses into a system function table.

Furthermore, in the application software compiling, a DSP core and an application operation area occupied by the executable file are specified in a static specified mode; and appointing the entry address of the executable file loaded in the application running area, and recording the entry address into an application entry function table.

Further, in the running process of the application software, when a specified system function in the image file needs to be called, the entry address of the system function is obtained according to the system function table, and the image resident area is loaded to run the system function.

Further, the image file and the executable file are solidified to an external nonvolatile memory of the signal platform for storage.

The invention has the following beneficial effects:

the method has the advantages that any function of a real-time operating system is not cut, the memory space of a high-speed signal processing (DSP) platform is efficiently utilized, the operating system runs in the space outside a DSP chip, and the application software runs in the space inside the DSP chip, so that the running period of the application software is shortened, the application software fully enjoys the system service of the operating system, and the running software environment with complete functions is provided for the DSP application software.

Drawings

The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.

FIG. 1 is a flowchart of a memory management method according to an embodiment of the present invention;

FIG. 2 is a schematic diagram illustrating memory space partitioning according to an embodiment of the present invention;

FIG. 3 is a flow chart of system function table establishment according to an embodiment of the present invention;

FIG. 4 is a flowchart illustrating an application entry function table establishment procedure according to an embodiment of the present invention.

Detailed Description

The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form a part hereof, and which together with the embodiments of the invention serve to explain the principles of the invention.

The embodiment discloses a memory management method for a high-speed signal platform, as shown in fig. 1, including the following steps:

step S1, dividing the memory space of the signal platform into an application operation area and a mirror image residence area;

the application operation area is arranged in an on-chip Memory space SRAM (Static Random-Access Memory) of the signal platform processor; the mirror image residence area is arranged in an off-chip memory space DDR SDRAM (Double Data Rate SDRAM) of the signal platform. .

As shown in fig. 2, according to the number of DSP cores core in the high-speed signal platform processor, allocating a corresponding application operation area in the SRAM for each DSP core, and allocating a corresponding mirror image residence area space in the DDR SDRAM, that is, each DSP core has an independent application operation area and an independent mirror image residence area;

the independent application operation area or the mirror image residence area is convenient for managing the memory space, can avoid conflict in the operation process, and has higher operation speed and more convenient scheduling.

Preferably, the mirror image residence zone can be evenly distributed according to the size of the storage space of the DDR SDRAM chip of the off-chip memory and the number of DSP cores;

preferably, the application running area can be evenly distributed according to the size of the storage space of the SRAM chip of the on-chip memory and the number of DSP cores.

By dividing the memory space into an application operation area and a mirror image residence area, when the application software operates, the corresponding independent application operation area space is occupied, so that the operation cycle requirement of the application software can be met, and the occupation requirement of the memory space can also be met;

when the real-time operating system runs, corresponding independent mirror image residence area space is occupied, and the requirement of the running space of the real-time operating system (usually dozens of MB) can be met because the mirror image residence area space is the extra-chip DDR SDRAM memory space (up to hundreds of MB); therefore, any function of the real-time operating system does not need to be cut, so that the application software can fully enjoy the system service of the operating system.

Step S2, compiling the platform operating system to generate the mirror image file and system function table of the operating system, compiling the application software to generate the executable file and application entry table of the application software;

the system function table is used for recording an entry address of the mirror image file loaded into the mirror image residence area to operate; and the application entry table is used for recording an entry address of the executable file loaded into the application running area to run.

Specifically, the compiling of step S2 specifically includes the following steps:

step S2-1, compiling the real-time operating system to generate a system image file and a system function table;

in particular, as shown in figure 3,

1) compiling the real-time operating system running on the signal platform by using a compiler corresponding to the signal platform to generate an image file of the real-time operating system;

in the compiling of the operating system, a DSP core and a mirror image resident area occupied by the running of the mirror image file are appointed in a static appointed mode; and appointing the entry address of the mirror image file loaded in the mirror image residence area.

In the static assignment, any one DSP core and a mirror image residence area corresponding to the DSP core can be assigned to operate a mirror image file;

preferably, the operating system occupies larger resources when running; in the static assignment, the running image files are evenly distributed to all DSP cores and image residence areas, so that the resources of the operating system are more even when the operating system runs, the real-time performance and the flow performance of the system running are ensured, in addition, the image residence area memory space occupied by the operating system when the operating system runs is large, and any function of the real-time operating system does not need to be cut.

2) Generating a system function table through the symbol table of the mirror image;

acquiring a system function, a heap space and a stack space of an operating system by reading the symbol table of the mirror image file; and statically appointing an entry address of the system function loading image residence area and entry addresses of the heap space and the stack space, and recording the entry addresses into a system function table. As shown in Table 1

TABLE 1 System function Table

System function	Function entry address	Heap space entry address	Stack space entry address
				Function-1	0x7f11	0xff11	0xef11
Function-2	0x7f21	0xff21	0xef21
				Function-3	0x7f31	0xff31	0xef31
…	…

In table 1, each system function, its corresponding function entry address, heap space entry address, and stack space entry address are all specified in a mirror image residence area space, the mirror image residence area is divided into different areas according to the entry addresses, the system function is loaded according to the function entry address to run, and heap data or stack data generated when the system function runs is cached in the heap space or stack space according to the heap space entry address or stack space entry address;

in the static assignment of the function entry address, the heap space entry address and the stack space entry address, the size of the memory area occupied by the space where the system function operates, the heap space and the stack space needs to be considered, and the condition of cross occupation cannot occur during the assignment.

Step S2-2, compiling application software to generate an executable file and an application entry table;

in particular, as shown in figure 4,

1) compiling the application software to generate an application software executable file;

in the application software compiling, a DSP core and an application operation area occupied by the executable file are appointed to operate in a static appointed mode;

2) establishing an application entry function table by statically specifying an entry address of the application software executable file during operation in the DSP chip space;

specifically, the application entry function table is manually generated by specifying entry addresses of application software, and the entry addresses of a plurality of application software running in an application running area of the DSP chip inner space are recorded; as shown in table 2

Table 2 application entry function table

Application program	Entry address
		APP-1	0x0f11
APP-2	0x0f21
		APP-3	0x0f31
…	…

In table 2, each application program may statically specify a DSP core of the multiple DSP cores and operate, and specify an address in the application operation area corresponding to the DSP core as an entry address for the application program to operate;

different application programs can occupy different DSP cores or the same DSP core, when the different application programs occupy the same DSP core and the entry addresses of the different application programs are specified in the application running area, the size of the memory space occupied by the different application programs during running is considered, and when the different application programs are specified, the condition of cross occupation cannot occur.

Preferably, when the application entry function table is established, for each DSP core designated to run the application program, a corresponding application entry function table may be established separately, and the application program running in the DSP core and the corresponding entry address may be recorded. In the specific operation process, a table look-up mode is adopted to quickly find the DSP core corresponding to the application software to be operated and the inlet address of the application operation area to be operated.

Step S2-3, solidifying the mirror image file of the operating system

And solidifying the compiled operating system image to an external nonvolatile memory of the DSP for storage, wherein the operating system image is only stored in the external nonvolatile memory before being operated.

Because the system mirror image is solidified to an external nonvolatile memory with large storage space for storage, and when the system mirror image is operated, the system function, the heap space and the stack space which need to be operated are loaded to the mirror image residence area corresponding to the operating DSP kernel through the system function table, the operating system mirror image does not need to be cut.

Step S2-4, solidifying the executable file of the application software

And solidifying the compiled executable file of the application software into an external nonvolatile memory of the DSP for storage, wherein the application software is only stored in the external nonvolatile memory before being operated.

Step S3, the platform is powered on to operate, the image file is loaded into the image resident area to operate according to the system function table, and the executable file required to operate is loaded into the application operation area to operate according to the application entry table;

specifically, step S3 includes:

step S3-1, starting power supply system to power up;

s3-2, loading the system function to be started in the image file to the image resident area according to the system function table; operating an operating system in a signal platform;

because the mirror image residence zone is positioned in the DDR SDRAM of the off-chip memory space, the memory space is large, and the operating system is operated in the mirror image residence zone without cutting any function of the real-time operating system.

Step S3-3, when the application software needs to be operated, loading the executable file of the application software into the corresponding application operation area according to the application entry table for operation;

specifically, according to the entry address recorded in the application entry table, directly jumping to the entry address of the application running area of the application software to be run to execute the application software;

the application operation area is positioned in the SRAM of the internal memory space of the chip, so the operation speed is high, the operation period of the application software is shortened in a direct skip mode, the operation speed of the application software is improved, and the high-speed requirement is met.

Step S3-4, when the application software runs, calling the needed system service according to the system function table;

in the running process of the application software, when a specified system function in the image file needs to be called, the entry address of the system function is obtained according to the system function table, the image resident area is loaded, and the system function is run, so that the running period of the application software can be shortened, the application software can fully enjoy the system service of an operating system, and a running software environment with complete functions is provided for the DSP application software.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.