阅读说明：本技术 数据处理方法、装置、终端设备及可读存储介质 (Data processing method and device, terminal equipment and readable storage medium ) 是由 刘新 曾良 于 2021-07-27 设计创作，主要内容包括：本申请适用于嵌入式系统技术领域,提供了一种数据处理方法、装置、终端设备及可读存储介质,该方法包括：获取数据存储请求,所述数据存储请求包括需要存储的目标数据；将所述目标数据转换成目标向量数据,并将目标向量数据存储到预设空闲地址对应的存储空间中,所述预设空闲地址为中断向量表中的空闲地址。本申请可以一定程度上解决目前编译器随机分配产品信息的存储地址浪费MCU的存储空间的问题。(The application is applicable to the technical field of embedded systems, and provides a data processing method, a device, terminal equipment and a readable storage medium, wherein the method comprises the following steps: acquiring a data storage request, wherein the data storage request comprises target data to be stored; and converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table. The problem that the storage space of the MCU is wasted by randomly distributing the storage address of the product information by the current compiler can be solved to a certain extent.)

1. A data processing method, comprising:

acquiring a data storage request, wherein the data storage request comprises target data to be stored;

converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

2. The data processing method of claim 1, wherein the target data includes constant information.

3. The data processing method according to claim 1, wherein the storing the target vector data into a storage space corresponding to a preset free address comprises:

determining the size of a storage space corresponding to at least two preset free addresses;

and storing the target vector data into a target storage space, wherein the target storage space is a storage space with a size not smaller than that of the target vector data.

4. The data processing method according to claim 1, wherein the storing the target vector data into a storage space corresponding to a preset free address comprises:

determining the type of a starting address in the preset idle address;

if the type of the starting address meets a preset alignment condition, taking the starting address as a target starting address of the target vector data;

storing the target vector data into the storage space starting from the target start address.

5. The data processing method of claim 4, wherein after the determining the type of the starting address in the preset free addresses, further comprising:

if the type of the starting address does not meet a preset alignment condition, sequentially determining the type of each target idle address in the preset idle addresses, wherein the target idle addresses are preset idle addresses except the starting address in the preset idle addresses;

taking a target idle address with the type meeting a preset alignment condition as a target starting address of the target vector data, and determining the size of a corresponding storage subspace from the target starting address to an ending address of the storage space;

and if the size of the storage subspace is larger than or equal to the size of the target vector data, starting to store the target vector data to the storage subspace from the target starting address.

6. The data processing method of claim 1, further comprising:

receiving a function execution instruction, and acquiring a target function corresponding to the function execution instruction;

acquiring a target storage address of target vector data from the interrupt vector table by executing a target function;

and acquiring the target vector data from a storage space corresponding to the target storage address according to a preset rule.

7. A data processing apparatus, comprising:

the request acquisition module is used for acquiring a data storage request, wherein the data storage request comprises target data to be stored;

and the data storage module is used for converting the target data into target vector data and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

8. The data processing apparatus of claim 7, wherein the target data comprises constant information.

9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1-6 when executing the computer program.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-6.

Technical Field

The present application belongs to the field of embedded systems, and in particular, to a data processing method, apparatus, terminal device, and readable storage medium.

Background

With the development of scientific technology, embedded technology is widely applied to a plurality of fields such as industrial control, information household appliances and communication equipment.

In the process of embedded development, some product information, such as the version number of the product, the product type, and the production compilation date, needs to be saved for later calling or viewing. At present, it is common for a compiler to randomly assign a storage address of product information.

However, due to the memory alignment, the random allocation of the memory address by the compiler may generate a large amount of memory fragments, thereby wasting a large amount of memory space of a Micro Controller Unit (MCU). Because the storage space of the MCU is relatively small, the performance of the MCU is seriously affected by the storage space wasted by these memory fragments.

Disclosure of Invention

The embodiment of the application provides a data processing method and device, terminal equipment and a readable storage medium, which can solve the problem that memory space of an MCU is wasted when a compiler randomly allocates a memory address of product information to a certain extent.

In a first aspect, an embodiment of the present application provides a data processing method, including:

acquiring a data storage request, wherein the data storage request comprises target data to be stored;

and converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

Optionally, the target data includes constant information.

Optionally, the storing the target vector data into a storage space corresponding to a preset free address includes:

determining the size of a storage space corresponding to at least two preset free addresses;

and storing the target vector data into a target storage space, wherein the target storage space is a storage space with a size not smaller than that of the target vector data.

Optionally, the storing the target vector data in a storage space corresponding to a preset free address includes:

determining the type of an initial address in the preset idle address;

if the type of the initial address meets a preset alignment condition, taking the initial address as a target initial address of the target vector data;

and storing the target vector data into the storage space from the target start address.

Optionally, after determining the type of the start address in the preset idle address, the method further includes:

if the type of the initial address does not meet a preset alignment condition, sequentially determining the type of each target idle address in the preset idle addresses, wherein the target idle addresses are preset idle addresses except the initial address in the preset idle addresses;

taking a target idle address with the type meeting a preset alignment condition as a target initial address of the target vector data, and determining the size of a corresponding storage subspace between the target initial address and an end address of the storage space;

and if the size of the storage subspace is larger than or equal to the size of the target vector data, storing the target vector data into the storage subspace from the target starting address.

Optionally, the method further comprises:

receiving a function execution instruction, and acquiring a target function corresponding to the function execution instruction;

acquiring a target storage address of target vector data from the interrupt vector table by executing a target function;

and acquiring the target vector data from a storage space corresponding to the target storage address according to a preset rule.

In a second aspect, an embodiment of the present application provides a data processing apparatus, including:

the request acquisition module is used for acquiring a data storage request, wherein the data storage request comprises target data to be stored;

and the data storage module is used for converting the target data into target vector data and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

In a third aspect, an embodiment of the present application provides a terminal device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the first aspect when executing the computer program.

In a fourth aspect, the present application provides a computer-readable storage medium, where a computer program is stored, and the computer program, when executed by a processor, implements the steps of the first aspect.

In a fifth aspect, the present application provides a computer program product, which when run on a terminal device, causes the terminal device to execute the method in the first aspect.

It is understood that the beneficial effects of the second aspect to the fifth aspect can be referred to the related description of the first aspect, and are not described herein again.

Compared with the prior art, the embodiment of the application has the advantages that:

the application provides a data processing method, which comprises the steps of firstly, obtaining a data storage request, wherein the data storage request comprises target data needing to be stored. And then converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table. The target vector data are stored in the storage space corresponding to the preset free address, namely the target vector data have a fixed storage space, so that the storage address of the target vector data is not randomly allocated any more. And no data is stored in the storage space corresponding to the free address in the interrupt vector table. Therefore, the target vector data are stored to the storage space corresponding to the preset idle address, so that other storage spaces in the MCU are not occupied, and the storage space of the MCU can be saved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic flow chart of a data processing method according to an embodiment of the present application;

FIG. 2 is a diagram illustrating a starting address and a storage space according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a target start address, an end address, and a storage subspace according to an embodiment of the present application;

FIG. 4 is a schematic structural diagram of a data processing apparatus according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to" determining "or" in response to detecting ". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".

Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.

Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.

The data processing method provided by the embodiment of the application can be applied to terminal devices such as a mobile phone, a tablet computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a Personal Digital Assistant (PDA), and the like, and the embodiment of the application does not limit the specific types of the terminal devices.

In order to explain the technical solution described in the present application, the following description will be given by way of specific examples.

Example one

In the following, a data processing method provided in an embodiment of the present application is described, referring to fig. 1, where the method includes:

step S101, a data storage request is obtained, wherein the data storage request comprises target data needing to be stored.

When the user side inputs a data storage request, the terminal device may obtain target data to be stored from the data storage request. The target data may include constant information, for example, the target data may be a version number of a product, a product type, a production compilation date, and the like.

Step S102, converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

Since some free addresses exist in the interrupt vector table in some cores, the storage space corresponding to the free addresses does not store data. Therefore, after the terminal device acquires the data storage request, the terminal device can convert the target data in the data storage request into target vector data and store the target vector data into a storage space corresponding to the preset free address. Therefore, the target vector data has a fixed memory space, and the memory address of the target vector data is not randomly allocated any more. And no data is stored in the storage space corresponding to the free address in the interrupt vector table. Therefore, the target vector data are stored to the storage space corresponding to the preset idle address, so that other storage spaces in the MCU are not occupied, and the storage space of the MCU can be saved.

The default free address is composed of free addresses in the interrupt vector table, for example, the default free address is [0x01C, 0x01F ], or the default free address is [0x018, 0x01B ].

The following explains the interrupt vector table and related concepts:

(1) an interrupt vector: the entry address of the interrupt service routine.

(2) Interrupt vector table: all the interrupt type codes and their corresponding interrupt vectors in the system are stored in a region according to a certain rule, and this storage region is called an interrupt vector table.

(3) Interrupting: the interruption means that the CPU temporarily interrupts the currently running program due to the triggering of the internal/external event or the prearrangement of the program in the process of normally executing the program, and then the CPU goes to execute the service subprogram which is the internal/external event or the event prearranged by the program, and after the interruption service subprogram is executed, the CPU returns to the program (breakpoint) which is temporarily interrupted to continue executing the original program, and the process becomes interruption. In summary, the present application provides a data processing method, which first obtains a data storage request, where the data storage request includes target data to be stored. And then converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table. The target vector data are stored in the storage space corresponding to the preset free address, namely the target vector data have a fixed storage space, so that the storage address of the target vector data is not randomly allocated any more. And no data is stored in the storage space corresponding to the free address in the interrupt vector table. Therefore, the target vector data are stored to the storage space corresponding to the preset idle address, so that other storage spaces in the MCU are not occupied, and the storage space of the MCU can be saved.

In some embodiments, after acquiring the data storage request, the terminal device may determine sizes of storage spaces corresponding to two preset free addresses, and then store the target vector data into a target storage space, where the target storage space is a storage space whose size is not smaller than that of the target vector data.

Specifically, the detailed process of storing the target vector data into the target storage space, where the target storage space is a storage space with a size not smaller than that of the target vector data, may be:

the target vector data are stored to a target storage space with the size same as that of the target vector data, so that the storage space corresponding to the free address in the interrupt vector table is saved.

And if the target storage space with the size same as that of the target vector data does not exist, the terminal equipment stores the target vector data into the target storage space with the size larger than that of the target vector data.

In other embodiments, the process of storing the target vector data into the storage space corresponding to the preset free address may be: the terminal equipment firstly determines the type of an initial address in the preset idle address, takes the initial address as a target initial address of the target vector data when the type of the initial address meets the preset alignment condition, and then stores the target vector data to the storage space from the target initial address according to the front-back sequence between the preset idle addresses. And when the type of the initial address meets the preset alignment condition, the initial address is used as the target initial address, so that the storage space of the target vector data meets the alignment requirement, and the efficiency of accessing the storage space of the target vector data is improved.

For example, referring to fig. 2 (S in fig. 2 represents data, and the data occupies 3 bytes), the target vector data occupies 2 bytes, and since alignment is performed with 4 bytes, the byte corresponding to the start address is 4 bytes, and therefore, the type of the start address meets the preset alignment condition, and therefore, the start address is taken as the target start address of the target vector data.

The preset alignment condition means that the position of the byte corresponding to the target start address of the target vector data is a multiple of a preset number. For example, if the predetermined number is 4, the bytes corresponding to the target start address may be a multiple of 4.

It should be understood that, if the type of the start address is not in accordance with the preset alignment condition, the terminal device sequentially determines the type of each target idle address in the preset idle addresses, where the target idle address is a preset idle address in the preset idle addresses except for the start address, and then takes the target idle address whose type is in accordance with the preset alignment condition as the target start address of the target vector data. At this time, since the target start address is not the start address of the preset free address, there is a possibility that the size of the corresponding storage subspace from the target start address to the end address of the storage space is smaller than the size of the target vector data.

Therefore, at this time, the terminal device also needs to determine the size of the storage subspace. If the size of the storage subspace is greater than or equal to the size of the target vector data, storing the target vector data into the storage subspace starting from the target start address. And if the size of the storage subspace is smaller than that of the target vector data, storing the target vector data into a storage space corresponding to another preset free address.

For example, as shown in fig. 3 (S in fig. 3 represents data, and the data occupies 3 bytes), the target vector data occupies 2 bytes, and since the alignment is performed with 4 bytes, the byte corresponding to the start address is 3 bytes, and therefore, the type of the start address does not meet the preset alignment condition. At this time, the type of the target idle address corresponding to 4 bytes is firstly judged, and if the type of the target idle address corresponding to 4 bytes meets the preset alignment condition, the target idle address corresponding to 4 bytes is used as the target starting address. At this time, it is not necessary to judge the type of the target free address later. If the type of the target idle address corresponding to the 4 bytes does not meet the preset alignment condition, the type of the target idle address corresponding to the 5 bytes needs to be judged again until the target idle address with the type meeting the preset alignment condition is found.

It should be noted that, after storing the target vector data in the storage space corresponding to the free address in the interrupt vector table, the terminal device associates the identifier of the target vector data with the storage address of the target vector data in the interrupt vector table, so that the storage address of the target vector data can be subsequently searched from the interrupt vector table.

In addition, the method further comprises: and receiving a function execution instruction and acquiring a target function corresponding to the function execution instruction. The target storage address of the target vector data is then obtained from the interrupt vector table by executing the target function. And finally, acquiring target vector data from a storage space corresponding to the target storage address according to a preset rule. As an example, the specific process of obtaining the target storage address of the target vector data from the interrupt vector table by executing the target function may be: and the terminal equipment starts to offset according to the offset of the preset number or integral multiple of the preset number from the preset initial address of the interrupt vector table until the target storage address corresponding to the identifier of the target vector data is obtained, and finally the target vector data is obtained according to the storage space corresponding to the target storage address.

It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

Example two

Fig. 4 shows an example of a data processing apparatus, and only a part related to the embodiment of the present application is shown for convenience of explanation. The apparatus 400 comprises:

the request obtaining module 401 is configured to obtain a data storage request, where the data storage request includes target data to be stored.

A data storage module 402, configured to convert the target data into target vector data, and store the target vector data in a storage space corresponding to a preset idle address, where the preset idle address is an idle address in the interrupt vector table.

Optionally, the target data comprises constant information.

Optionally, the data storage module 402 is configured to perform:

determining the size of a storage space corresponding to at least two preset free addresses;

and storing the target vector data into a target storage space, wherein the target storage space is a storage space with the size not smaller than that of the target vector data.

Optionally, the data storage module 402 is configured to perform:

determining the type of a starting address in a preset idle address;

if the type of the initial address meets the preset alignment condition, taking the initial address as a target initial address of the target vector data;

and storing the target vector data into the storage space from the target starting address.

Optionally, the data storage module 402 is configured to perform:

if the type of the initial address does not accord with the preset alignment condition, sequentially determining the type of each target idle address in the preset idle addresses, wherein the target idle addresses are preset idle addresses except the initial address in the preset idle addresses;

taking a target idle address with the type meeting a preset alignment condition as a target initial address of target vector data, and determining the size of a corresponding storage subspace from the target initial address to an end address of the storage space;

and if the size of the storage subspace is larger than or equal to that of the target vector data, storing the target vector data into the storage subspace from the target starting address.

Optionally, the request obtaining module 401 is further configured to perform:

receiving a function execution instruction, and acquiring a target function corresponding to the function execution instruction;

acquiring a target storage address of target vector data from an interrupt vector table by executing a target function;

and acquiring target vector data from a storage space corresponding to the target storage address according to a preset rule.

It should be noted that, for the information interaction, execution process, and other contents between the above-mentioned devices/units, the specific functions and technical effects thereof are based on the same concept as those of the method embodiment of the present application, and specific reference may be made to a part of the method embodiment, which is not described herein again.

EXAMPLE III

Fig. 5 is a schematic diagram of a terminal device provided in the third embodiment of the present application. As shown in fig. 5, the terminal device 500 of this embodiment includes: a processor 501, a memory 502 and a computer program 503 stored in the memory 502 and executable on the processor 501. The steps in the various method embodiments described above are implemented when the processor 501 executes the computer program 503 described above. Alternatively, the processor 501 implements the functions of the modules/units in the device embodiments when executing the computer program 503.

Illustratively, the computer program 503 may be divided into one or more modules/units, which are stored in the memory 502 and executed by the processor 501 to complete the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 503 in the terminal device 500. For example, the computer program 503 may be divided into a request acquisition module and a data storage module, and the specific functions of each module are as follows:

acquiring a data storage request, wherein the data storage request comprises target data to be stored;

converting the target data into target vector data, and storing the target vector data into a storage space corresponding to a preset idle address, wherein the preset idle address is an idle address in an interrupt vector table.

The terminal device may include, but is not limited to, a processor 501 and a memory 502. Those skilled in the art will appreciate that fig. 5 is merely an example of a terminal device 500 and is not intended to limit the terminal device 500 and may include more or less components than those shown, or some components may be combined, or different components, for example, the terminal device may also include input and output devices, network access devices, buses, etc.

The Processor 501 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware plug-in, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The storage 502 may be an internal storage unit of the terminal device 500, such as a hard disk or a memory of the terminal device 500. The memory 502 may also be an external storage device of the terminal device 500, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 500. Further, the memory 502 may include both an internal storage unit and an external storage device of the terminal device 500. The memory 502 is used for storing the computer program and other programs and data required by the terminal device. The memory 502 described above may also be used to temporarily store data that has been output or is to be output.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned functions may be distributed as different functional units and modules according to needs, that is, the internal structure of the apparatus may be divided into different functional units or modules to implement all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the above modules or units is only one logical function division, and there may be other division manners in actual implementation, for example, a plurality of units or plug-ins may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated modules/units described above, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the processes in the above method embodiments may be implemented by a computer program, which may be stored in a computer readable storage medium and executed by a processor, so as to implement the steps of the above method embodiments. The computer program includes computer program code, and the computer program code may be in a source code form, an object code form, an executable file or some intermediate form. The computer readable medium may include: any entity or device capable of carrying the above-mentioned computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signal, telecommunication signal, software distribution medium, etc. It should be noted that the computer readable medium described above may include content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media that does not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.

The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.