阅读说明：本技术 一种三通硅基分束器芯片及其制造方法 (Three-way silicon-based beam splitter chip and manufacturing method thereof ) 是由 曾和平 冯吉军 吴昕耀 于 2019-09-30 设计创作，主要内容包括：本发明公开一种三通道硅基分束器芯片,包括一个输入波导、三个输出波导和设置在所述输入波导和所述输出波导之间的耦合区；所述耦合区为正方形；所述输入波导和所述输出波导的宽度相等,所述宽度为K：490nm<K<510nm；所述耦合区、所述输入波导和所述输出波导的厚度均相等,所述厚度为H：210nm<H<230nm；所述耦合区的边长长度为L：1600nm<L<2000nm。本发明的三通道硅基分束器芯片,集成度更高,器件尺寸小,提高了波前重构设备的便携性。(The invention discloses a three-channel silicon-based beam splitter chip, which comprises an input waveguide, three output waveguides and a coupling area arranged between the input waveguide and the output waveguides; the coupling region is square; the input waveguide and the output waveguide have equal widths, the widths being K: 490nm < K <510 nm; the coupling region, the input waveguide and the output waveguide are all equal in thickness, and the thickness is H: 210nm < H <230 nm; the length of the side of the coupling area is L: 1600nm < L <2000 nm. The three-channel silicon-based beam splitter chip has higher integration level and small device size, and improves the portability of wavefront reconstruction equipment.)

1. A three-channel silicon-based beam splitter chip is characterized in that: comprising an input waveguide (1), three output waveguides (2) and a coupling region (3) arranged between the input waveguide (1) and the output waveguides (2); the coupling region (3) is square;

the input waveguide (1) and the output waveguide (2) have equal widths, which are K: 490nm < K <510 nm; the coupling region (3), the input waveguide (1) and the output waveguide (2) are all equal in thickness, and the thickness is H: 210nm < H <230 nm; the length of the side of the coupling region (3) is L: 1600nm < L <2000 nm.

2. The subminiature three-channel silicon-based beam splitter chip for wavefront reconstruction of claim 1, wherein: the coupling region (3) is composed of N x N pixel structures (31); the pixel structure (31) comprises a silicon pixel structure (310) and a silicon dioxide pixel structure (311); the silicon pixel structures (310) and the silicon dioxide pixel structures (311) are distributed discretely on the coupling region (3); the silicon pixel structure (310) and the silicon dioxide pixel structure (311) are equal in size.

3. The subminiature three-channel silicon-based beam splitter chip for wavefront reconstruction of claim 2, wherein: the silicon pixel structures (310) and the silicon dioxide pixel structures (311) are both non-linearly adjacent or spaced apart in the coupling region (3).

4. The subminiature three-channel silicon-based beam splitter chip for wavefront reconstruction of claim 3, wherein: the three output waveguides (2) are respectively a first output waveguide (21), a second output waveguide (22) and a third output waveguide (23); the second output waveguide (22) and the input waveguide (1) are both arranged on an extension of a symmetry axis (Q) of the coupling region (3) in the direction of light source incidence; the first output waveguide (21) and the third output waveguide (23) are arranged symmetrically on both sides of the second output waveguide (22) with respect to the extension line of the symmetry axis (Q).

5. The three-channel silicon-based beam splitter chip of claim 4, wherein: the coupling region (3) is divided into a first coupling region (32) and a second coupling region (33) by the axis of symmetry (Q); the silicon pixel structures (310) and the silicon dioxide pixel structures (311) on the first coupling region (32) and the silicon pixel structures (310) and the silicon dioxide pixel structures (311) on the second coupling region (33) are symmetrically distributed along the symmetry axis (Q).

6. The three-channel silicon-based beam splitter chip of claim 5, wherein: the thickness (H) is 220nm, the length of the side length (L) is 1800nm, and the width (K) is 500 nm.

7. The three-channel silicon-based beam splitter chip of claim 6, wherein: the coupling region (3) is composed of 18 x 18 of the pixel structures (31); each pixel structure (31) has a side length of 100nm and a thickness of 220 nm;

the position of each pixel structure (31) is set to be x-y, wherein x represents the x-th row, x is more than or equal to 1 and less than or equal to 18, x is an integer, y represents the y-th column, y is more than or equal to 1 and less than or equal to 18, and y is an integer;

-the position in the first coupling region (32) at which the silicon dioxide pixel structure (311) is provided is: 1-3, 1-4, 1-6, 1-9, 1-10, 1-12, 1-13, 1-15, 1-17, 1-18, 2-1, 2-2, 2-3, 2-4, 2-5, 2-6, 2-9, 2-10, 2-15, 7-1, 7-2, 7-7, 7-9, 7-14, 7-16, 7-17, 7-18;

-the position in the second coupling region (33) where the silicon dioxide pixel structure (311) is provided is: 12-1, 12-2, 12-7, 12-9, 12-14, 12-16, 12-17, 12-18, 17-1, 17-2, 17-3, 17-4, 17-5, 17-6, 17-9, 17-10, 17-15, 18-3, 18-4, 18-6, 18-9, 18-10, 18-12, 18-13, 18-15, 18-17, 18-18;

the silicon pixel structure (310) is arranged at the rest position of the first coupling region (32) and the second coupling region (33).

8. The three-channel silicon-based beam splitter chip of claim 7, wherein: the three-channel silicon-based beam splitter is applicable to a wavelength range of 1550 nanometer wave bands.

9. A manufacturing method of a three-channel silicon-based beam splitter chip is characterized by comprising the following steps: the method comprises the following steps:

(S1) forming an input waveguide, three output waveguides and a coupling region on a silicon-based substrate using a silicon-based substrate, on which the coupling region between the input waveguide and the output waveguides is divided into N × N pixel structures; the pixel structures comprise silicon pixel structures and silicon dioxide pixel structures, and the silicon pixel structures and the silicon dioxide pixel structures are distributed on the coupling area in a discretization mode;

(S2) setting a target parameter and a structural variable, the target parameter being the transmittance of the output ports of the three output waveguides, each of which is 0.33; the structure variable is a discretized distribution structure on a coupling region by the silicon pixel structures and the silicon dioxide pixel structures (311); modeling the target parameters and the structural variables;

(S3) determining an optimal discretized distribution structure of the silicon pixel structure and the silicon dioxide pixel structure on the coupling region by iterative optimization according to different structure variables.

10. The method of fabricating a subminiature three-channel silicon-based beam splitter for wavefront reconstruction as recited in claim 9, wherein: in the step (S2), the steps of:

(S201) each pixel structure corresponds to a binary weight bit, and the weight from a low bit to a high bit is distributed according to a right-to-left mode; "1" represents that the pixel block is a silicon pixel structure, and "0" represents that the pixel block is a silicon dioxide pixel structure; each row on the coupling area (3) is composed of N pixel structures formed by 1 or 0 to form an N-bit binary number, and the N-bit binary numbers are totally N; converting the structure variable into N binary numbers with N bits;

(S202) using a particle swarm optimization algorithm as an optimization algorithm, and establishing an object function FOM formula as follows: FOM ═ T1-0.33) + (T2-0.33) + (T3-0.33), where T1, T2, and T3 are expressed in order as actual transmittances of the three output waveguides from top to bottom, respectively.

Technical Field

The invention relates to the field of integrated photonic devices, in particular to a silicon-based beam splitter technology.

Background

The laser wavefront reconstruction technology has important application in relevant applications such as laser processing and the like, such as personalized wavefront guidance in myopia laser in-situ keratomileusis. Wavefront reconstruction, namely processing the surface light field intensity of the imaged object, extracting corresponding phase surface information, and performing decomposition and reconstruction processing. The beam splitter is a key device for wavefront reconstruction, and in order to further develop the miniaturization of a wavefront reconstruction imaging system and realize more functions by using an optical device, the problem of the obstruction of integration caused by the size of the device is solved, and functional innovation is realized under the smaller size. The silicon-based integrated optoelectronic device has great advantages in the aspects of energy consumption, performance, size, cost and the like, and has important application in a plurality of fields such as wavefront reconstruction, quantum regulation, optical calculation and the like. However, reducing the device size while still maintaining high performance has been a significant challenge in the field of silicon-based photonics.

Patent document CN105334575A discloses a silicon-based metamaterial optical splitter and a manufacturing method thereof, wherein the silicon-based metamaterial optical splitter comprises a substrate, the substrate comprises an input waveguide and two output waveguides, and a coupling region composed of N × N pixel blocks with the same size is arranged between the input waveguide and the output waveguides; the pixel blocks are punched, a special punching array is formed through an optimization algorithm, and the arrangement of the air hole array with the sub-wavelength size can be equivalent to a non-uniform and slowly-changed refractive index distribution area, so that different wavelengths can be guided at the same time, the purpose of effective output at an output port can be achieved by different wavelengths, and the purpose of large working bandwidth is further achieved. Most of the silicon-based integrated beam splitters are composed of one input waveguide, a coupling region and two output waveguide beam splitters, and the three-channel silicon-based beam splitter is rarely reported. The traditional three-channel beam splitter is large in structural size, not portable, high in energy consumption, high in cost and low in performance, and meanwhile the splitting ratio of the three-channel beam splitter designed based on the traditional waveguide theory is 1:2: 1.

Disclosure of Invention

The invention aims to provide a three-channel silicon-based beam splitter which has higher integration level and small device size and improves the portability of wavefront reconstruction equipment.

In order to achieve the above object, the present invention provides a three-channel silicon-based splitter chip, comprising an input waveguide, three output waveguides and a coupling region disposed between the input waveguide and the output waveguides; the coupling region is square;

the input waveguide and the output waveguide have equal widths, the widths being K: 490nm < K <510 nm; the coupling region, the input waveguide and the output waveguide are all equal in thickness, and the thickness is H:

210nm < H <230 nm; the length of the side of the coupling area is L: 1600nm < L <2000 nm.

Further, the coupling region is composed of N pixel structures; the pixel structure comprises a silicon pixel structure and a silicon dioxide pixel structure; the silicon pixel structures and the silicon dioxide pixel structures are distributed on the coupling area in a discretization mode; the silicon pixel structure and the silicon dioxide pixel structure are equal in size.

Further, the silicon pixel structures and the silicon dioxide pixel structures are both non-linearly adjacent or spaced in the coupling region.

Further, the three output waveguides are respectively a first output waveguide, a second output waveguide and a third output waveguide; the second output waveguide and the input waveguide are both arranged on an extension line of a symmetry axis of a light source incidence direction of the coupling area; the first output waveguide and the third output waveguide are symmetrically arranged on both sides of the second output waveguide with respect to an extension line of the symmetry axis.

Further, the coupling region is divided into a first coupling region and a second coupling region by the symmetry axis; the silicon pixel structures and the silicon dioxide pixel structures on the first coupling area and the silicon pixel structures and the silicon dioxide pixel structures on the second coupling area are symmetrically distributed along the symmetry axis.

Further, the thickness is 220nm, the length of the side is 1800nm, and the width is 500 nm.

Further, the coupling region is composed of 18 × 18 pixel structures; the side length of each pixel structure is 100nm, and the thickness of each pixel structure is 220 nm; the position of each pixel structure is set to be x-y, wherein x represents the x-th row, x is more than or equal to 1 and less than or equal to 18, x is an integer, y represents the y-th column, y is more than or equal to 1 and less than or equal to 18, and y is an integer;

the positions where the silicon dioxide pixel structures are arranged in the first coupling region are as follows: 1-3, 1-4, 1-6, 1-9, 1-10, 1-12, 1-13, 1-15, 1-17, 1-18, 2-1, 2-2, 2-3, 2-4, 2-5, 2-6, 2-9, 2-10, 2-15, 7-1, 7-2, 7-7, 7-9, 7-14, 7-16, 7-17, 7-18;

the positions of the silicon dioxide pixel structures in the second coupling region are as follows: 12-1, 12-2, 12-7, 12-9, 12-14, 12-16, 12-17, 12-18, 17-1, 17-2, 17-3, 17-4, 17-5, 17-6, 17-9, 17-10, 17-15, 18-3, 18-4, 18-6, 18-9, 18-10, 18-12, 18-13, 18-15, 18-17, 18-18;

the rest positions of the first coupling area and the second coupling area are provided with the silicon pixel structures.

Further, the three-channel silicon-based beam splitter is applicable to a wavelength range of 1550 nm.

The invention also provides a manufacturing method of the three-channel silicon-based beam splitter chip, which comprises the following steps:

(S1) forming an input waveguide, three output waveguides and a coupling region on a silicon-based substrate using a silicon-based substrate, on which the coupling region between the input waveguide and the output waveguides is divided into N × N pixel structures; the pixel structures comprise silicon pixel structures and silicon dioxide pixel structures, and the silicon pixel structures and the silicon dioxide pixel structures are distributed on the coupling area in a discretization mode;

(S2) setting a target parameter and a structural variable, the target parameter being the transmittance of the output ports of the three output waveguides, each of which is 0.33; the structural variable is a discretized distribution structure on the coupling area through the silicon pixel structures and the silicon dioxide pixel structures; modeling the target parameters and the structural variables;

(S3) determining an optimal discretized distribution structure of the silicon pixel structure and the silicon dioxide pixel structure on the coupling region by iterative optimization according to different structure variables.

In the step (S2), the steps of:

(201) each pixel structure corresponds to a binary weight bit, and the weight from a low bit to a high bit is distributed according to a right-to-left mode; "1" represents that the pixel block is a silicon pixel structure, and "0" represents that the pixel block is a silicon dioxide pixel structure; each row on the coupling area is composed of N pixel structures formed by 1 or 0 to form an N-bit binary number, and the N-bit binary numbers are totally N; converting the structure variable into N binary numbers with N bits;

(S202) using a particle swarm optimization algorithm as an optimization algorithm, and establishing an object function FOM formula as follows: FOM ═ T1-0.33) + (T2-0.33) + (T3-0.33), where T1, T2, and T3 are expressed in order as actual transmittances of the three output waveguides from top to bottom, respectively.

Compared with the related technology, the invention has the following advantages:

the three-way silicon-based beam splitter chip has higher integration level and small device size, and improves the portability of wavefront reconstruction equipment; the arrangement of structural symmetry simplifies the complicated structural distribution design; the interference region is subjected to discretization coding by an inverse design method, so that the complicated waveguide theory reasoning is omitted in the design method based on machine learning; an optimal distribution structure is found out through an iterative optimization method, and a three-way silicon-based beam splitter chip with higher performance is obtained; through reasonable design, when the vertical polarized light is incident in a 1550 nanometer waveband, three output ports of the beam splitter chip meet the condition that the light intensity splitting ratio is 1:1: 1.

Drawings

FIG. 1 is a schematic diagram of a three-channel silicon-based beam splitter chip according to an embodiment of the present invention;

FIG. 2 is a top view of FIG. 1;

FIG. 3 is a structural diagram illustrating the distribution of the pixel structure of the coupling region in FIG. 1;

FIG. 4 is a graph of the transmittance as a function of wavelength for the three output waveguides of FIG. 3;

FIG. 5 is a schematic diagram of a simulated light field distribution corresponding to the discretized distribution structure of FIG. 3, where grayscales indicate the intensity of the light field distribution;

FIG. 6 is a process diagram of the fabrication of a three-channel silicon-based beam splitter chip of the present invention.

In the figure:

1-an input waveguide;

2-output waveguide, 21-first output waveguide, 22-second output waveguide, 23-third output waveguide;

3-coupling region, 31-pixel structure, 310-silicon pixel structure, 311-silicon dioxide pixel structure, 32-first coupling region, 33-second coupling region;

q-axis of symmetry.

Detailed Description

The following further describes embodiments of the present invention with reference to the drawings.

As shown in fig. 1 and fig. 2, the embodiment of the present invention discloses a three-channel silicon-based splitter chip, which comprises an input waveguide 1, three output waveguides 2 and a coupling region 3 disposed between the input waveguide 1 and the output waveguides 2; the coupling region 3 is square.

The input waveguide 1 and the output waveguide 2 have equal width, and the width is K: 490nm < K <510 nm; the thicknesses of the coupling region 3, the input waveguide 1 and the output waveguide 2 are all equal, and the thicknesses are H: 210nm < H <230 nm; the length of the side of the coupling area 3 is L: 1600nm < L <2000 nm. The three-channel silicon-based beam splitter chip is used for wavefront reconstruction, and has the advantages of small device size, compact structure and high performance.

The silicon pixel structures 310 and the silicon dioxide pixel structures 311 are both non-linearly adjacent or spaced in the coupling region 3.

The three output waveguides 2 are a first output waveguide 21, a second output waveguide 22 and a third output waveguide 23 respectively; the second output waveguide 22 and the input waveguide 1 are both arranged on an extension line of a symmetry axis Q of the light source incidence direction of the coupling region 3; the first output waveguide 21 and the third output waveguide 23 are symmetrically disposed on both sides of the second output waveguide 22 with respect to the extension line of the symmetry axis Q. The corresponding symmetrical arrangement of the coupling region 3, the first output waveguide 21, the second output waveguide 22 and the third output waveguide 23 simplifies the complexity of process design and manufacturing steps.

As shown in fig. 3, the coupling region 3 is composed of N × N pixel structures 31; the pixel structure 31 comprises a silicon pixel structure 310 and a silicon dioxide pixel structure 311; the silicon pixel structures 310 and the silicon dioxide pixel structures 311 are distributed discretely on the coupling region 3; the silicon pixel structure 310 and the silicon dioxide pixel structure 311 are equal in size. Providing a discretized distribution of silicon pixel structures and silicon dioxide pixel structures helps to improve the transmission of the light source from the input waveguides to the three output waveguides. The discretized distribution indicates that, considering the silicon pixel structures 310 and the silicon dioxide pixel structures 311 as points, the silicon pixel structures 310 and the silicon dioxide pixel structures 311 are both non-linearly adjacent or spaced apart in the coupling region 3.

The coupling region 3 is divided into a first coupling region 32 and a second coupling region 33 by the axis of symmetry Q; the silicon pixel structures 310 and the silicon dioxide pixel structures 311 on the first coupling region 32 and the silicon pixel structures 310 and the silicon dioxide pixel structures 311 on the second coupling region 33 are symmetrically distributed along the symmetry axis Q. On the premise of ensuring the high performance of the three-channel silicon-based beam splitter chip, the design of a discretization distribution structure is simplified.

The thickness H is 220nm, the length of the side length L is 1800nm, and the width K is 500 nm.

The coupling region 3 is composed of 18 × 18 pixel structures 31; each of the pixel structures 31 has a side length of 100nm and a thickness of 220 nm.

The position of each pixel structure 31 is set to x-y, wherein x represents the x-th row, x is larger than or equal to 1 and smaller than or equal to 18, x is an integer, y represents the y-th column, y is larger than or equal to 1 and smaller than or equal to 18, and y is an integer.

The positions of the silicon dioxide pixel structures 311 in the first coupling region 32 are: 1-3, 1-4, 1-6, 1-9, 1-10, 1-12, 1-13, 1-15, 1-17, 1-18, 2-1, 2-2, 2-3, 2-4, 2-5, 2-6, 2-9, 2-10, 2-15, 7-1, 7-2, 7-7, 7-9, 7-14, 7-16, 7-17, 7-18;

the positions of the silicon dioxide pixel structures 311 in the second coupling region 33 are: 12-1, 12-2, 12-7, 12-9, 12-14, 12-16, 12-17, 12-18, 17-1, 17-2, 17-3, 17-4, 17-5, 17-6, 17-9, 17-10, 17-15, 18-3, 18-4, 18-6, 18-9, 18-10, 18-12, 18-13, 18-15, 18-17, 18-18;

the silicon pixel structure 310 is disposed at the remaining positions of the first coupling region 32 and the second coupling region 33. The coupling areas 3 are sequentially ordered from top to bottom into a first row to an eighteenth row and from left to right into a first column to an eighteenth column. The distances between the first output waveguide 21 and the third output waveguide 23 and the second output waveguide 22 are both 100 nm. The three-channel silicon-based beam splitter chip is arranged by the structure, so that the splitting ratio is 1:1:1, the optical loss is small, and the transmission efficiency is high.

The three-channel silicon-based beam splitter chip can be manufactured by the following manufacturing method of the three-channel silicon-based beam splitter chip. As shown in fig. 3, the method for manufacturing the three-channel silicon-based splitter chip includes the following steps:

(S1) forming an input waveguide, three output waveguides and a coupling region on a silicon-based substrate using a silicon-based substrate, on which the coupling region between the input waveguide and the output waveguides is divided into N × N pixel structures; the pixel structures comprise silicon pixel structures and silicon dioxide pixel structures, and the silicon pixel structures and the silicon dioxide pixel structures are distributed on the coupling area in a discretization mode;

(S2) setting a target parameter and a structural variable, the target parameter being the transmittance of the output ports of the three output waveguides, each of which is 0.33; the structural variable is a discretized distribution structure on the coupling area through the silicon pixel structures and the silicon dioxide pixel structures; modeling the target parameters and the structural variables;

(S3) determining an optimal discretized distribution structure of the silicon pixel structure and the silicon dioxide pixel structure on the coupling region by iterative optimization according to different structure variables.

In the step (S2), the steps of:

(S201) each pixel structure corresponds to a binary weight bit, and the weight from a low bit to a high bit is distributed according to a right-to-left mode; "1" represents that the pixel block is a silicon pixel structure, and "0" represents that the pixel block is a silicon dioxide pixel structure; each row on the coupling area is composed of N pixel structures formed by 1 or 0 to form an N-bit binary number, and the N-bit binary numbers are totally N; converting the structure variable into N binary numbers with N bits;

(S202) using a particle swarm optimization algorithm as an optimization algorithm, and establishing an object function FOM formula as follows: FOM ═ T1-0.33) + (T2-0.33) + (T3-0.33), where T1, T2, and T3 are expressed in order as actual transmittances of the three output waveguides from top to bottom, respectively. The values of T1, T2, and T3 need to be close to the target parameters, and the smaller the value of the objective function FOM, the better.

As shown in fig. 3, a three-channel silicon-based beam splitter chip with a thickness of 220nm, a side length of 1800nm and a width of 500nm is selected; the coupling area is divided into 18 x 18 pixel structures 31, each row of 18 pixel structures consisting of 1 or 0 constituting one 18-bit binary number, for a total of 18-bit binary numbers. Each 18-bit binary number has a value range of 0-131071, wherein 131071 is 2^18-1。

Because the current beam splitter structure with one-to-three 1:1:1 has certain symmetry, 18 variables are vertically symmetrical into 9 variables for reducing the variables. The coupling region 3 is divided into a first coupling region 32 and a second coupling region 33 by the axis of symmetry Q; the silicon pixel structures 310 and the silicon dioxide pixel structures 311 on the first coupling region 32 and the silicon pixel structures 310 and the silicon dioxide pixel structures 311 on the second coupling region 33 are symmetrically distributed along the symmetry axis Q;

dividing the coupling region 3 into a first coupling region 32 and a second coupling region 33 by an axis of symmetry of the coupling region 3; the position of each pixel structure 31 is set to be x-y, wherein x represents the x-th row, x is more than or equal to 1 and less than or equal to 18, x is an integer, y represents the y-th column, y is more than or equal to 1 and less than or equal to 18, and y is an integer; finding out the optimal distribution structure of the silicon pixel structure 310 and the silicon dioxide pixel structure 311 on the coupling region 3 by an iterative optimization method, wherein the distribution structure is as follows:

the positions of the silicon dioxide pixel structures 311 in the first coupling region 32 are: 1-3, 1-4, 1-6, 1-9, 1-10, 1-12, 1-13, 1-15, 1-17, 1-18, 2-1, 2-2, 2-3, 2-4, 2-5, 2-6, 2-9, 2-10, 2-15, 7-1, 7-2, 7-7, 7-9, 7-14, 7-16, 7-17, 7-18;

-the position in the second coupling region (33) where the silicon dioxide pixel structure (311) is provided is: 12-1, 12-2, 12-7, 12-9, 12-14, 12-16, 12-17, 12-18, 17-1, 17-2, 17-3, 17-4, 17-5, 17-6, 17-9, 17-10, 17-15, 18-3, 18-4, 18-6, 18-9, 18-10, 18-12, 18-13, 18-15, 18-17, 18-18;

the silicon pixel structure (310) is provided in the remaining positions of the first coupling region 32 and the second coupling region 33.

The 9 variables for which the optimum values are obtained by the above method are, in order from top to bottom in the first coupling zone 32 or from bottom to top in the second coupling zone (33): 208020, 3319, 262143, 62952, 262143.

The relationship between the transmittance of the three output waveguides and the wavelength variation is detected and obtained, as shown in fig. 4, it can be seen from the graph that the performance of the three-channel differential chip incident with vertically polarized light at a wavelength of 1550 nm is the best, and at this time, the three output waveguides take values of 0.329, 0.336 and 0.334 in sequence from top to bottom at the wavelength of 1550 nm. The sum of the three transmittances is equal to 0.999, the light source is output through the three-way silicon-based beam splitter chip, the transmittance is high, the loss is small, and the three output ports of the beam splitter chip meet the condition that the light intensity splitting ratio is 1:1: 1.

As shown in fig. 5, a silicon dioxide insulating layer is disposed on a silicon substrate, a silicon layer is disposed on the silicon dioxide insulating layer, 100nm silicon dioxide is evaporated by a plasma enhanced chemical vapor deposition coating apparatus to serve as an etching mask, a silicon dioxide buffer layer coated with photoresist is then coated by electron beam lithography and plasma etching, and simultaneously, the real-time etching depth is monitored until the requirement of core layer manufacturing is met. After organic cleaning is carried out on the surface of the manufactured sample, the manufactured sample is placed into hydrofluoric acid solution to remove the residual silicon dioxide mask, and standard cleaning of the RCA silicon-based material is carried out; followed by plasma enhanced, chemical vapor deposition of 2 microns of silica as a cladding. And finally polished and cut on its back side for performance characterization.

During the testing and the future use of the chip, the external vibration cannot be avoided. Because chip fabrication is delicate, the efficiency of fiber coupling is directly related to the performance of the chip, and these vibrations sometimes even damage the chip. In order to improve the mechanical stability of the system and reduce the coupling damage of the optical fiber-waveguide chip, the chip needs to be packaged integrally.

Firstly, cleaning the end faces of the optical fiber and the optical waveguide, wiping the end faces of the optical fiber and the optical waveguide by using isopropanol and then drying the optical fiber and the optical waveguide; then, the waveguide is placed on a platform in a packaging system and fixed by using a special clamp; then, respectively installing the optical fibers butted with the waveguide on three-dimensional adjusting tables at two sides of the waveguide table for fixing; then connecting the light source with the input optical fiber, connecting the optical power meter with the output optical fiber, dipping a clean glass thin rod with a hemispherical front end into a little refractive index matching liquid to be coated on the end surface of the input optical fiber in the process, and naturally forming a liquid bead shape on the end surface of the optical fiber; and then adjusting the parallelism between the end surfaces of the input ends. For the waveguide and the optical fiber with good end surfaces, the parallelism adjustment between the end surfaces is easy to realize under the micromanipulation, a refractive index matching liquid bead is arranged between the two end surfaces, the position of the matching liquid bead is related to the included angle between the two end surfaces under the action of surface tension, and the good parallelism between the end surfaces can be obtained through the angle adjusting operation under the monitoring of a microsystem. And adjusting the parallelism between the end surfaces of one side of the output end. The adjustment of the input end can be successfully completed under the monitoring of a microscope system in the same way as the adjustment of the input end.

And the test wavelength is input from the light source end, the positions of the optical fibers at the input end and the output end are adjusted by adjusting the displacement platform until the output optical power is maximum, and the optimal coupling position is reached, so that the packaged chip is ensured to achieve the optimal performance. And then coating PB300 ultraviolet curing adhesive on two end faces of the waveguide. And then the adhesive is cured by ultraviolet irradiation for 180 seconds and baked for 8 hours at 50 ℃. Finally, the device is placed in a box, sealing glue is covered, and after the tail fibers are straightened out, the two ends of the device are sealed by rubber plugs; and fusing and connecting the tail fiber of the input/output port and the optical fiber jumper wire, loading the fused and connected tail fiber and the optical fiber jumper wire into a plastic box, and leading out an optical fiber jumper wire head after coiling.

The three-way silicon-based beam splitter chip has higher integration level and small device size, and improves the portability of wavefront reconstruction equipment; the arrangement of structural symmetry simplifies the complicated structural distribution design; the interference region is subjected to discretization coding by an inverse design method, so that the complicated waveguide theory reasoning is omitted in the design method based on machine learning; an optimal distribution structure is found out through an iterative optimization method, and a three-way silicon-based beam splitter chip with higher performance is obtained; through reasonable design, when the vertical polarized light is incident in a 1550 nanometer waveband, three output ports of the beam splitter chip meet the condition that the light intensity splitting ratio is 1:1: 1.