overcurrent protection circuit

文档序号:1694197 发布日期:2019-12-10 浏览:15次 中文

阅读说明:本技术 一种过流保护电路 (overcurrent protection circuit ) 是由 陈磊 于 2018-06-02 设计创作,主要内容包括:本发明公开了一种过流保护电路,包括:一折回电路,当过流发生时,使得输出电流随着输出电压的降低而降低,大大降低了系统的过流关断功耗;一核心保护电路,因为采样电阻没有和调整管串联,没有损失压降,提高了系统的转换效率;一负反馈电路,保证了对输出电流的精确采样,大大提高了过流保护的可靠性。本发明一种过流保护电路具有过流关断功耗小,可靠性高和转换效率高等优点。(the invention discloses an overcurrent protection circuit, comprising: the foldback circuit reduces the output current along with the reduction of the output voltage when overcurrent occurs, thereby greatly reducing the overcurrent turn-off power consumption of the system; the core protection circuit has no loss voltage drop because the sampling resistor is not connected with the adjusting tube in series, thereby improving the conversion efficiency of the system; and the negative feedback circuit ensures accurate sampling of output current and greatly improves the reliability of overcurrent protection. The overcurrent protection circuit has the advantages of low overcurrent turn-off power consumption, high reliability, high conversion efficiency and the like.)

1. An overcurrent protection circuit, comprising: the foldback circuit reduces the output current along with the reduction of the output voltage when overcurrent occurs, thereby greatly reducing the overcurrent turn-off power consumption of the system; the core protection circuit has no loss voltage drop because the sampling resistor is not connected with the adjusting tube in series, thereby improving the conversion efficiency of the system; and the negative feedback circuit ensures accurate sampling of output current and greatly improves the reliability of overcurrent protection.

2. The overcurrent protection circuit as claimed in claim 1, wherein said foldback circuit is formed by a first PMOS transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a first NMOS transistor NM1, a second NMOS transistor NM2, a first resistor R1, and a second resistor R2; the source electrode of the PM1 tube, the source electrode of the PM3 tube and one end of the resistor R2 are connected with the input voltage VIN; the grid electrode of the PM1 tube is connected with the drain electrode of the PM3 tube; the drain electrode of the PM1 tube is connected with the source electrode of the PM2 tube; the grid electrode of the PM2 tube is connected with the source electrode of the NM2 tube; the drain electrode of the PM2 tube is connected with the drain electrode of the NM1 tube, the grid electrode of the NM1 tube and the grid electrode of the NM2 tube; the source electrode of the NM1 tube is connected with one end of a resistor R2; the other end of the resistor R2 is grounded; the other end of the resistor R1 is connected with the grid of the PM3 tube and the drain of the NM2 tube.

3. The overcurrent protection circuit as claimed in claim 1, wherein said core protection circuit is composed of a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a sixth PMOS transistor PM6, a third NMOS transistor NM3, a third resistor R3 and a comparator; the source electrode of the PM4 tube, the source electrode of the PM5 tube and the source electrode of the PM6 tube are connected with an input voltage VIN; the grid electrode of the PM4 tube is connected with the drain electrode of the PM5 tube, the grid electrode of the PM6 tube and the grid electrode of the PM1 tube; the grid electrode of the PM5 tube is connected with the output end of the comparator; the positive end of the comparator is connected with a reference voltage VREF; the negative end of the comparator is connected with the source of the NM3 tube and one end of the resistor R3; the other end of the resistor R3 is grounded; the drain electrode of the PM4 tube is connected with the drain electrode of the NM3 tube; the drain of the PM6 transistor is connected to the gate of the PM2 transistor, and its node is used as the output voltage VOUT.

4. The overcurrent protection circuit as set forth in claim 1, wherein said negative feedback circuit is composed of a third NMOS transistor NM3, a fourth resistor R4, a fifth resistor R5 and an operational amplifier; the non-inverting input end of the operational amplifier is connected with the drain electrode of the PM4 tube, and the node of the operational amplifier is marked as A; the inverting input end of the operational amplifier is connected with the drain electrode of the PM6 tube and one end of the resistor R4; the output end of the operational amplifier is connected with the grid of the NM3 tube, and the other end of the resistor R4 is connected with one end of the resistor R5; the other end of the resistor R5 is connected to ground.

Technical Field

The invention relates to the field of protection circuits, in particular to an overcurrent protection circuit.

Background

With the rapid development of electronic technology, DC/DC converters have been widely used in various mobile electronic systems, such as mobile communication terminals, portable computers, PDAs, and the like. The LDO linear regulator is one of DC/DC converters, and is widely used in portable electronic products due to its advantages of simple structure, low cost, low noise, low power consumption, small package size, etc.

The over-current protection technology in the LDO is always the key to influence the stable operation of the LDO system. The purpose of overcurrent protection is to limit the output current to a fixed range and protect the entire system or load in the event of an output short circuit or overload. However, the current over-current protection circuits commonly used all have some problems such as reliability, over-current turn-off power consumption and the like, and the application range of the over-current protection circuits is limited.

Disclosure of Invention

In order to overcome the problems in the prior art, the invention mainly aims to provide an overcurrent protection circuit which has the advantages of low overcurrent turn-off power consumption, high reliability, high conversion efficiency and the like

in order to solve the technical problems, the invention is realized by the following technical scheme:

An overcurrent protection circuit comprising: the foldback circuit reduces the output current along with the reduction of the output voltage when overcurrent occurs, thereby greatly reducing the overcurrent turn-off power consumption of the system; the core protection circuit has no loss voltage drop because the sampling resistor is not connected with the adjusting tube in series, thereby improving the conversion efficiency of the system; and the negative feedback circuit ensures accurate sampling of output current and greatly improves the reliability of overcurrent protection.

The folding circuit is composed of a first PMOS tube PM1, a second PMOS tube PM2, a third PMOS tube PM3, a first NMOS tube NM1, a second NMOS tube NM2, a first resistor R1 and a second resistor R2; the source electrode of the PM1 tube, the source electrode of the PM3 tube and one end of the resistor R2 are connected with the input voltage VIN; the grid electrode of the PM1 tube is connected with the drain electrode of the PM3 tube; the drain electrode of the PM1 tube is connected with the source electrode of the PM2 tube; the grid electrode of the PM2 tube is connected with the source electrode of the NM2 tube; the drain electrode of the PM2 tube is connected with the drain electrode of the NM1 tube, the grid electrode of the NM1 tube and the grid electrode of the NM2 tube; the source electrode of the NM1 tube is connected with one end of a resistor R2; the other end of the resistor R2 is grounded; the other end of the resistor R1 is connected with the grid of the PM3 tube and the drain of the NM2 tube.

The core protection circuit is composed of a fourth PMOS tube PM4, a fifth PMOS tube PM5, a sixth PMOS tube PM6, a third NMOS tube NM3, a third resistor R3 and a comparator; the source electrode of the PM4 tube, the source electrode of the PM5 tube and the source electrode of the PM6 tube are connected with an input voltage VIN; the grid electrode of the PM4 tube is connected with the drain electrode of the PM5 tube, the grid electrode of the PM6 tube and the grid electrode of the PM1 tube; the grid electrode of the PM5 tube is connected with the output end of the comparator; the positive end of the comparator is connected with a reference voltage VREF; the negative end of the comparator is connected with the source of the NM3 tube and one end of the resistor R3; the other end of the resistor R3 is grounded; the drain electrode of the PM4 tube is connected with the drain electrode of the NM3 tube; the drain of the PM6 transistor is connected to the gate of the PM2 transistor, and its node is used as the output voltage VOUT.

The negative feedback circuit consists of a third NMOS tube NM3, a fourth resistor R4, a fifth resistor R5 and an operational amplifier; the non-inverting input end of the operational amplifier is connected with the drain electrode of the PM4 tube, and the node of the operational amplifier is marked as A; the inverting input end of the operational amplifier is connected with the drain electrode of the PM6 tube and one end of the resistor R4; the output end of the operational amplifier is connected with the grid of the NM3 tube, and the other end of the resistor R4 is connected with one end of the resistor R5; the other end of the resistor R5 is connected to ground.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

Fig. 1 is a circuit diagram of an overcurrent protection circuit according to the present invention.

Detailed Description

The invention will be described in further detail with reference to the following detailed description and accompanying drawings:

In the following embodiments, referring to fig. 1, the overcurrent protection circuit includes:

The foldback circuit reduces the output current along with the reduction of the output voltage when overcurrent occurs, thereby greatly reducing the overcurrent turn-off power consumption of the system; the core protection circuit has no loss voltage drop because the sampling resistor is not connected with the adjusting tube in series, thereby improving the conversion efficiency of the system; and the negative feedback circuit ensures accurate sampling of output current and greatly improves the reliability of overcurrent protection.

The core protection circuit is composed of a PM4 tube, a PM5 tube, a PM6 tube, an NM3 tube, a resistor R3 and a comparator; the PM6 tube is a regulating tube, the PM4 tube is a sampling tube, R3 is a sampling resistor, and the PM4 tube samples the current passing through the PM6 tube, so the drain current of the PM4 tube reflects the change of the output current. Under the normal working condition, the voltage drop of R3 is less than the reference voltage VREF, the comparator outputs high level, the PM5 tube is cut off, and the grid potential of the adjusting tube PM6 is determined by the output of the amplifying circuit of the system; when the output current reaches a certain value, the voltage drop on the R3 is greater than VREF, the comparator outputs low level, the PM5 tube is conducted, the grid potential of the adjusting tube PM6 is pulled high, and the output current is limited to a certain value, so that the purpose of overcurrent protection is achieved.

The negative feedback circuit consists of an NM3 tube, a resistor R4, a resistor R5 and an operational amplifier; by utilizing the virtual short virtual break characteristic of the operational amplifier, when the output end has large power consumption or VOUT is reduced, the grid electrode potential of the NM3 tube is increased, the NM3 tube is conducted, the potential of the point A is reduced, and the point A is reduced along with the reduction of the voltage of the output voltage VOUT, and vice versa. The negative feedback circuit enables the potential of the point A to change along with the change of the output voltage, and ensures accurate sampling of the output current.

The folding circuit is composed of a PM1 pipe, a PM2 pipe, a PM3 pipe, an NM1 pipe, an NM2 pipe, a resistor R1 and a resistor R2; the PM1 line is a sampling line that samples the current flowing through the regulating line PM 6. To ensure sampling accuracy, the size of the PM2 pipe was made as large as possible to reduce the pressure drop across the PM 2. Under the normal working condition, the grid-source voltage of the NM2 tube is less than Vth, the NM2 tube is cut off, the branch current is zero, and therefore the PM3 tube is also cut off; when overcurrent occurs, the core protection circuit works first, when VOUT (voltage output) is reduced to a certain value, the grid-source voltage of the NM2 tube is larger than Vth, the NM2 tube is conducted, at the moment, the voltage drop on R2 enables the PM3 tube to be conducted, the grid potential of the adjusting tube PM6 is further pulled high, and therefore the current flowing through PM6 is further reduced, and the overcurrent turn-off power consumption of a system is reduced.

The invention provides an overcurrent protection circuit, which adopts a smic cmos process to carry out design simulation, and greatly improves the sampling precision of output current by utilizing the virtual short and virtual break principle of an operational amplifier, thereby improving the reliability of the circuit; and through the added retracing circuit, the overcurrent turn-off power consumption of the LDO system is greatly reduced.

Although the present invention has been described with reference to specific examples, the description of the examples does not limit the scope of the present invention. Various modifications and combinations of the embodiments will be readily apparent to those skilled in the art, by reference to the description of the invention, without departing from the spirit and scope of the invention.

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