阅读说明：本技术 应用于电源转换器的二次侧的同步整流器及其操作方法 (Synchronous rectifier applied to secondary side of power converter and operation method thereof ) 是由 林崇伟 邹明璋 黄俊豪 于 2018-05-31 设计创作，主要内容包括：本发明公开了一种应用于电源转换器的二次侧的同步整流器及其操作方法。所述同步整流器包含一禁止开启时间产生电路、一省电模式信号产生电路和一控制器。所述禁止开启时间产生电路产生对应所述二次侧的一禁止开启时间；所述省电模式信号产生电路是当所述禁止开启时间大于一参考值至少一次时,启用一省电模式信号,且当所述禁止开启时间连续小于所述参考值一预定次数时,关闭所述省电模式信号；所述控制器是当所述省电模式信号启用时,进入一省电模式,以及当所述省电模式信号关闭时,离开所述省电模式。因此,因为所述参考值会随所述输出电压改变,所以当所述禁止开启时间随着所述输出电压改变时,所述控制器不会因而无法进入所述省电模式。(The invention discloses a synchronous rectifier applied to a secondary side of a power converter and an operation method thereof. The synchronous rectifier comprises an on-time forbidding generating circuit, a power-saving mode signal generating circuit and a controller. The starting prohibition time generating circuit generates a starting prohibition time corresponding to the secondary side; the power-saving mode signal generating circuit enables a power-saving mode signal when the opening prohibition time is larger than a reference value at least once, and closes the power-saving mode signal when the opening prohibition time is continuously smaller than the reference value for a preset number of times; the controller enters a power saving mode when the power saving mode signal is enabled, and leaves the power saving mode when the power saving mode signal is disabled. Therefore, since the reference value varies with the output voltage, the controller does not thus fail to enter the power saving mode when the off-time varies with the output voltage.)

1. A synchronous rectifier applied to a secondary side of a power converter, comprising:

The start-up prohibition time generation circuit is coupled to the secondary side of the power converter and used for generating start-up prohibition time corresponding to the secondary side according to a synchronous signal of the secondary side;

A power saving mode signal generating circuit, coupled to the off-time generating circuit and the secondary side, for enabling a power saving mode signal when the off-time is greater than a reference value at least once, and for turning off the power saving mode signal when the off-time is continuously less than the reference value for a predetermined number of times, wherein the reference value varies with an output voltage of the secondary side; and

A controller, coupled to the power saving mode signal generating circuit and the secondary side, for entering a power saving mode when the power saving mode signal is enabled, and leaving the power saving mode when the power saving mode signal is disabled.

2. The synchronous rectifier of claim 1, wherein: the controller stops generating a driving signal to drive a synchronous switch of the secondary side when the controller enters the power saving mode, and generates the driving signal when the controller leaves the power saving mode.

3. The synchronous rectifier of claim 1, wherein: the inhibit-on time is related to a discharge time of the secondary side.

4. The synchronous rectifier of claim 3, wherein: the inhibit-on time is opposite to the discharge time.

5. the synchronous rectifier of claim 1, wherein: during the turn-on prohibition time, the secondary side of the power converter is turned off.

6. The synchronous rectifier of claim 1, wherein: the predetermined number of times varies with the output voltage of the secondary side.

7. The synchronous rectifier of claim 1, wherein: the inhibit on time is related to the number of troughs of the synchronization signal.

8. An operation method of a synchronous rectifier applied to a secondary side of a power converter, wherein the synchronous rectifier comprises an on-time prohibition generation circuit, a power saving mode signal generation circuit and a controller, the method comprising:

the starting prohibition time generating circuit generates a starting prohibition time corresponding to the secondary side according to a synchronous signal of the secondary side;

when the starting prohibition time is greater than a reference value at least once, the power-saving mode signal generation circuit starts a power-saving mode signal, wherein the reference value changes along with the output voltage of the secondary side; and

When the power saving mode signal is enabled, the controller enters a power saving mode.

9. The method of operation of claim 8, wherein: and when the controller enters the power saving mode, the controller stops generating a driving signal for driving a synchronous switch on the secondary side.

10. The method of claim 8, further comprising:

When the starting prohibition time is continuously less than the reference value for a preset number of times, the power-saving mode signal generation circuit turns off the power-saving mode signal; and

When the power saving mode signal is off, the controller leaves the power saving mode.

11. The method of operation of claim 10, wherein: the controller generates the driving signal when the controller leaves the power saving mode.

12. the method of operation of claim 8, wherein: the inhibit-on time is related to a discharge time of the secondary side.

13. The method of operation of claim 12, wherein: the inhibit-on time is opposite to the discharge time.

14. The method of operation of claim 8, wherein: during the turn-on prohibition time, the secondary side of the power converter is turned off.

15. The method of operation of claim 8, wherein: the predetermined number of times varies with the output voltage of the secondary side.

16. the method of operation of claim 8, wherein: the inhibit on time is related to the number of troughs of the synchronization signal.

Technical Field

The present invention relates to a synchronous rectifier applied to a secondary side of a power converter and an operating method thereof, and more particularly, to a synchronous rectifier and an operating method thereof, which can determine whether a controller on the secondary side of the power converter enters a power saving mode according to a reference value that varies with an output voltage of the power converter and a turn-on prohibition time of the secondary side of the power converter.

background

When a power converter operates in a Discontinuous Conduction Mode (DCM) or a quasi-resonant mode (quasi-resonant mode), a primary controller applied to a primary side of the power converter generates a gate control signal corresponding to a burst mode (burst mode) to control a power switch of the primary side to be turned on and off, wherein the number of the gate control signals corresponding to the burst mode varies with an output voltage of a secondary side of the power converter. Since the discharge time of the secondary side of the power converter varies with the number of gate control signals corresponding to the burst mode, the turn-on prohibition time of the secondary side of the power converter also varies with the number of gate control signals corresponding to the burst mode (that is, the turn-on prohibition time varies with the output voltage). However, since the prior art determines whether the controller on the secondary side of the power converter enters a power saving mode according to a fixed reference value and the off-time, but the off-time varies with the output voltage, the controller on the secondary side of the power converter may fail to enter the power saving mode because the off-time varies with the output voltage, which results in wasting too much energy when the power converter operates in the discontinuous conduction mode or the quasi-resonant mode.

disclosure of Invention

An embodiment of the invention discloses a synchronous rectifier applied to a secondary side of a power converter. The synchronous rectifier comprises an on-time forbidding generating circuit, a power-saving mode signal generating circuit and a controller. The start-up prohibition time generation circuit is coupled to the secondary side of the power converter and used for generating start-up prohibition time corresponding to the secondary side according to a synchronization signal of the secondary side; the power saving mode signal generating circuit is coupled with the on-forbidden time generating circuit and the secondary side and is used for enabling (enabling) a power saving mode signal when the on-forbidden time is larger than a reference value at least one time and for disabling (disabling) the power saving mode signal when the on-forbidden time is continuously smaller than the reference value for a preset number of times, wherein the reference value is changed along with the output voltage of the secondary side; the controller is coupled to the power saving mode signal generating circuit and the secondary side, and is used for entering a power saving mode when the power saving mode signal is enabled and leaving the power saving mode when the power saving mode signal is disabled.

Another embodiment of the present invention discloses an operating method of a synchronous rectifier applied to a secondary side of a power converter, wherein the synchronous rectifier includes an off-time generating circuit, a power saving mode signal generating circuit and a controller. The operation method comprises the steps that the starting prohibition time generation circuit generates a starting prohibition time corresponding to the secondary side according to a synchronous signal of the secondary side; when the starting prohibition time is greater than a reference value at least once, the power-saving mode signal generation circuit starts a power-saving mode signal, wherein the reference value changes along with the output voltage of the secondary side; when the power saving mode signal is enabled, the controller enters a power saving mode.

The invention discloses a synchronous rectifier applied to a secondary side of a power converter and an operation method thereof. The synchronous rectifier and the operation method utilize an opening forbidding time generating circuit to generate opening forbidding time corresponding to the secondary side according to a synchronous signal of the secondary side, and utilize a power saving mode signal generating circuit to determine to enable or disable a power saving mode signal according to the opening forbidding time and a reference value, and then a controller can enter or leave a power saving mode according to whether the power saving mode signal is enabled or not. Therefore, compared to the prior art, since the reference value disclosed in the present invention changes with the output voltage of the secondary side of the power converter, when the off-time varies with the output voltage of the secondary side of the power converter, the controller does not fail to enter the power saving mode because the off-time varies with the output voltage of the secondary side of the power converter.

Drawings

Fig. 1 is a schematic diagram of a synchronous rectifier applied to a secondary side of a power converter according to a first embodiment of the present invention.

Fig. 2 is a diagram illustrating a synchronization signal, a discharge time and an inhibit on time of a secondary side of a power converter.

fig. 3 is a flowchart of an operation method of a synchronous rectifier applied to a secondary side of a power converter according to a second embodiment of the present invention.

Wherein the reference numerals are as follows:

100 power converter

102 primary side winding

104 power switch

106 synchronous switch

108 secondary side winding

200 synchronous rectifier

202 forbidding turn-on time generating circuit

204 power-saving mode signal generating circuit

206 controller

DRV drive signal

FTON on time

GCS Gate control Signal

GMCS Power saving mode Signal

IPRI current

PRI Primary side

PWMON off time

SEC Secondary side

SYN synchronization signal

TDIS discharge time

VREF reference voltage

300 step 314

Detailed Description

Referring to fig. 1, fig. 1 is a schematic diagram of a synchronous rectifier 200 applied to a secondary side SEC of a power converter 100 according to a first embodiment of the present invention, wherein a primary side PRI of the power converter 100 is only a primary side winding 102 and a power switch 104 shown in fig. 1, and the power converter 100 is an ac/dc power converter. As shown in fig. 1, the synchronous rectifier 200 includes an off-time generating circuit 202, a power saving mode signal generating circuit 204, and a controller 206, wherein as shown in fig. 1, the off-time generating circuit 202 is coupled to a drain terminal of the synchronous switch 106 of the secondary side SEC of the power converter 100, the power saving mode signal generating circuit 204 is coupled to the off-time generating circuit 202 and an output terminal of the secondary side SEC of the power converter 100, and the controller 206 is coupled to the power saving mode signal generating circuit 204 and a drain terminal of the synchronous switch 106 of the secondary side SEC of the power converter 100.

As shown in fig. 1, when the power switch 104 is turned on, the secondary winding 108 of the secondary side SEC of the power converter 100 generates a synchronization signal SYN according to a current IPRI flowing through the primary side PRI of the power converter 100, wherein the power converter 100 operates in a Discontinuous Conduction Mode (DCM) or a quasi-resonant mode (quasi-resonant mode), that is, the power converter 100 operates in a light load condition or a no load condition. Since the turn-on-prohibition time generation circuit 202 is coupled to the drain terminal of the synchronous switch 106 of the secondary side SEC of the power converter 100, the turn-on-prohibition time generation circuit 202 may determine the discharge time TDIS (as shown in fig. 2) of the secondary side SEC of the power converter 100 according to the synchronization signal SYN and a reference voltage VREF (e.g., 0.1V, 0.2V, or 0.5V), and may generate a turn-on-prohibition time PWMON corresponding to the secondary side SEC of the power converter 100 according to the discharge time TDIS. The off-on-time PWMON is related to the discharge time TDIS because the off-time-on-time generation circuit 202 can generate the off-time PWMON according to the discharge time TDIS. In addition, if the on-time PWMON is prohibited to be equal to the on-time of the power switch 104 of the primary side PRI of the power converter 100 when the power converter 100 is operating in a Continuous Conduction Mode (CCM). However, as shown in fig. 2, since the power converter 100 is operated in the discontinuous conduction mode (or the quasi-resonant mode), the turn-on prohibition time PWMON is greater than the turn-on time FTON of the power switch 104 of the primary side PRI of the power converter 100. In addition, as shown in fig. 2, in an embodiment of the present invention, the prohibited-on-time generating circuit 202 inverts the discharge time TDIS to generate the prohibited-on-time PWMON. However, in another embodiment of the present invention, the off-time generating circuit 202 counts at least one valley of the synchronization signal SYN to generate the off-time PWMON according to the synchronization signal SYN and the reference voltage VREF, i.e., the off-time PWMON is related to the number of valleys of the synchronization signal SYN. In addition, in another embodiment of the present invention, although the off-on-time generation circuit 202 inverts the discharge time TDIS to generate the off-on-time PWMON, it outputs an off-on-signal proportional to the off-on-time PWMON to the power saving mode signal generation circuit 204. For example, the ratio of the turn-on prohibition signal to the turn-on prohibition time PWMON is 0.8, but the present invention is not limited to the ratio of the turn-on prohibition signal to the turn-on prohibition time PWMON being 0.8. In addition, as shown in fig. 2, during the disable on time PWMON, the secondary side SEC of the power converter 100 is turned off.

As shown in fig. 1, after the power saving mode signal generating circuit 204 receives the disable on-time PWMON, the power saving mode signal generating circuit 204 may compare the disable on-time PWMON with a reference value to determine whether to enable (enable) a power saving mode signal GMCS, wherein the power saving mode signal generating circuit 204 enables the power saving mode signal GMCS when the disable on-time PWMON is greater than the reference value at least once, turns off (disable) the power saving mode signal GMCS when the disable on-time PWMON is continuously less than the reference value for a predetermined number of times, and the reference value and the predetermined number of times are changed according to the output voltage VOUT of the secondary side SEC of the power converter 100. The reference value is 1.5mS, for example, when the output voltage VOUT is less than 5V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the off-prohibition time PWMON is greater than the reference value (1.5mS), and the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the off-prohibition time PWMON is continuously less than the reference value (1.5mS) for the predetermined number of times (e.g., 10 times); the reference value is 0.7mS when the output voltage VOUT is between 5V and 10V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the off-prohibition time PWMON is greater than the reference value (0.7mS), and the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the off-prohibition time PWMON is continuously less than the reference value (0.7mS) for the predetermined number of times (e.g., 20 times); the reference value is 0.2mS when the output voltage VOUT is greater than 10V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the off-prohibition time PWMON is greater than the reference value (0.2mS), and the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the off-prohibition time PWMON is continuously less than the reference value (0.2mS) for the predetermined number of times (e.g., 30 times). In addition, the present invention is not limited to the above-mentioned reference values (1.5mS, 0.7mS, 0.2mS) and the predetermined times (10 times, 20 times, 30 times).

In addition, after the power saving mode signal GMCS is enabled by the power saving mode signal generating circuit 204, the controller 206 can enter a power saving mode (i.e. the synchronous rectifier 200 enters the power saving mode) from the discontinuous conduction mode (or the quasi-resonant mode) according to the power saving mode signal GMCS. When the controller 206 enters the power saving mode, the controller 206 turns off and stops generating the driving signal DRV for driving the synchronous switch 106. In addition, after the power saving mode signal GMCS is enabled by the power saving mode signal generation circuit 204, not only the controller 206 is turned off, but also other circuits in the synchronous rectifier 200 except the off-time generation circuit 202 and the power saving mode signal generation circuit 204 are turned off. On the other hand, after the power saving mode signal generating circuit 204 turns off the power saving mode signal GMCS, the controller 206 leaves the power saving mode to enter the discontinuous conduction mode (or the quasi-resonant mode), that is, the synchronous rectifier 200 leaves the power saving mode to enter the discontinuous conduction mode (or the quasi-resonant mode). When the controller 206 leaves the power saving mode, the controller 206 turns on and generates the driving signal DRV for driving the synchronous switch 106 again. In addition, after the power saving mode signal GMCS is turned off by the power saving mode signal generation circuit 204, not only the controller 206 is turned on, but also other circuits in the synchronous rectifier 200 except the off-time generation circuit 202 and the power saving mode signal generation circuit 204 are turned on.

When the power converter 100 operates in the discontinuous conduction mode (or the quasi-resonant mode), a primary side controller (not shown in fig. 1) applied to the primary side PRI of the power converter 100 generates a gate control signal GCS corresponding to a burst mode (burst mode) to control the power switch 104 to turn on and off, wherein the number of the gate control signals GCS corresponding to the burst mode varies with the output voltage VOUT. Since the discharge time TDIS of the secondary side SEC of the power converter 100 varies with the number of the gate control signals GCS corresponding to the burst mode, the turn-on prohibition time PWMON also varies with the number of the gate control signals GCS corresponding to the burst mode (that is, the turn-on prohibition time PWMON varies with the output voltage VOUT). However, since the reference value and the predetermined number of times also vary with the output voltage VOUT of the secondary side SEC of the power converter 100, the synchronous rectifier 200 of the present invention does not fail to enter the power saving mode because the turn-on prohibition time PWMON varies with the output voltage VOUT.

Referring to fig. 1-3, fig. 3 is a flowchart illustrating an operation method of a synchronous rectifier applied to a secondary side of a power converter according to a second embodiment of the present invention. The operation method of fig. 3 is illustrated by using the power converter 100 and the synchronous rectifier 200 of fig. 1, and the detailed steps are as follows:

Step 300: starting;

step 302: the start-prohibition time generation circuit 202 generates start-prohibition time PWMON corresponding to the secondary side SEC of the power converter 100 according to the synchronization signal SYN of the secondary side SEC of the power converter 100;

Step 304: whether the inhibit on time PWMON is greater than the reference value; if yes, go to step 306; if not, go to step 310;

Step 306: the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS;

Step 308: the controller 206 enters the power saving mode and jumps back to step 304;

step 310: whether the turn-on time PWMON is prohibited from being continuously less than the reference value the predetermined number of times; if so, go to step 312; if not, go back to step 304;

step 312: the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS;

Step 314: the controller 206 leaves the power saving mode and jumps back to step 304.

In step 302, as shown in fig. 1, when the power switch 104 is turned on, the secondary winding 108 of the secondary side SEC of the power converter 100 generates the synchronization signal SYN according to the current IPRI flowing through the primary side PRI of the power converter 100, wherein the power converter 100 operates in the discontinuous conduction mode or the quasi-resonant mode, that is, the power converter 100 operates in a light load condition or a no load condition. Therefore, the turn-on-prohibition time generation circuit 202 may determine the discharge time TDIS (as shown in fig. 2) of the secondary side SEC of the power converter 100 according to the synchronization signal SYN and the reference voltage VREF (e.g., 0.1V, 0.2V, or 0.5V), and may generate the turn-on-prohibition time PWMON corresponding to the secondary side SEC of the power converter 100 according to the discharge time TDIS. The off-on-time PWMON is related to the discharge time TDIS because the off-time-on-time generation circuit 202 can generate the off-time PWMON according to the discharge time TDIS. In addition, as shown in fig. 2, in an embodiment of the present invention, the prohibited-on-time generating circuit 202 inverts the discharge time TDIS to generate the prohibited-on-time PWMON. However, in another embodiment of the present invention, the off-time generating circuit 202 counts at least one valley of the synchronization signal SYN to generate the off-time PWMON according to the synchronization signal SYN and the reference voltage VREF, i.e., the off-time PWMON is related to the number of valleys of the synchronization signal SYN. In addition, in another embodiment of the present invention, although the off-on-time generation circuit 202 inverts the discharge time TDIS to generate the off-on-time PWMON, it outputs an off-on-signal proportional to the off-on-time PWMON to the power saving mode signal generation circuit 204. For example, the ratio of the inhibit on signal to the inhibit on time PWMON is 0.8.

In step 304, as shown in FIG. 1, after the power saving mode signal generation circuit 204 receives the disable on-time PWMON, the power saving mode signal generation circuit 204 may compare the disable on-time PWMON with the reference value to determine whether to enable the power saving mode signal GMCS. In step 306, the power saving mode signal generating circuit 204 enables the power saving mode signal GMCS when the disable on-time PWMON is greater than the reference value at least once, wherein the reference value varies with the output voltage VOUT of the secondary side SEC of the power converter 100. The reference value is 1.5mS, for example, when the output voltage VOUT is less than 5V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the disable on-time PWMON is greater than the reference value (1.5 mS); the reference value is 0.7mS when the output voltage VOUT is between 5V and 10V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the disable on-time PWMON is greater than the reference value (0.7 mS); the reference value is 0.2mS when the output voltage VOUT is greater than 10V, so the power saving mode signal generation circuit 204 enables the power saving mode signal GMCS when the disable on-time PWMON is greater than the reference value (0.2 mS). In step 308, after the power saving mode signal GMCS is enabled by the power saving mode signal generating circuit 204, the controller 206 can enter the power saving mode (i.e., the synchronous rectifier 200 enters the power saving mode) from the discontinuous conduction mode (or the quasi-resonant mode) according to the power saving mode signal GMCS. When the controller 206 enters the power saving mode, the controller 206 turns off and stops generating the driving signal DRV for driving the synchronous switch 106. In addition, after the power saving mode signal GMCS is enabled by the power saving mode signal generation circuit 204, not only the controller 206 is turned off, but also other circuits in the synchronous rectifier 200 except the off-time generation circuit 202 and the power saving mode signal generation circuit 204 are turned off.

In step 312, the power saving mode signal generating circuit 204 turns off the power saving mode signal GMCS when the disable on-time PWMON is continuously less than the reference value for the predetermined number of times, and the reference value and the predetermined number of times are changed with the output voltage VOUT of the secondary side SEC of the power converter 100. The reference value is 1.5mS, for example, when the output voltage VOUT is less than 5V, so the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the prohibition on time PWMON is continuously less than the reference value (1.5mS) for the predetermined number of times (for example, 10 times); the reference value is 0.7mS when the output voltage VOUT is between 5V and 10V, so the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the disable on time PWMON is continuously less than the reference value (0.7mS) for the predetermined number of times (e.g., 20 times); the reference value is 0.2mS when the output voltage VOUT is greater than 10V, so the power saving mode signal generation circuit 204 turns off the power saving mode signal GMCS when the prohibition on time PWMON is continuously less than the reference value (0.2mS) for the predetermined number of times (e.g., 30 times).

In step 314, after the power saving mode signal generating circuit 204 turns off the power saving mode signal GMCS, the controller 206 leaves the power saving mode to enter the discontinuous conduction mode (or the quasi-resonant mode), i.e., the synchronous rectifier 200 leaves the power saving mode to enter the discontinuous conduction mode (or the quasi-resonant mode). When the controller 206 leaves the power saving mode, the controller 206 turns on and generates the driving signal DRV for driving the synchronous switch 106 again. In addition, after the power saving mode signal GMCS is turned off by the power saving mode signal generation circuit 204, not only the controller 206 is turned on, but also other circuits in the synchronous rectifier 200 except the off-time generation circuit 202 and the power saving mode signal generation circuit 204 are turned on.

When the power converter 100 operates in the discontinuous conduction mode (or the quasi-resonant mode), a primary side controller (not shown in fig. 1) applied to the primary side PRI of the power converter 100 generates a gate control signal GCS corresponding to a burst mode (burst mode) to control the power switch 104 to turn on and off, wherein the number of the gate control signals GCS corresponding to the burst mode varies with the output voltage VOUT. Since the discharge time TDIS of the secondary side SEC of the power converter 100 varies with the number of the gate control signals GCS corresponding to the burst mode, the turn-on prohibition time PWMON also varies with the number of the gate control signals GCS corresponding to the burst mode (that is, the turn-on prohibition time PWMON varies with the output voltage VOUT). However, since the reference value and the predetermined number of times also vary with the output voltage VOUT of the secondary side SEC of the power converter 100, the synchronous rectifier 200 of the present invention does not fail to enter the power saving mode because the turn-on prohibition time PWMON varies with the output voltage VOUT.

In summary, the synchronous rectifier and the operating method thereof disclosed by the present invention utilize the off-time generation circuit to generate the off-time corresponding to the secondary side according to the secondary side synchronization signal, and utilize the power saving mode signal generation circuit to determine to enable or disable the power saving mode signal according to the off-time and the reference value, and then the controller can enter or leave the power saving mode according to whether the power saving mode signal is enabled. Therefore, compared to the prior art, since the reference value and the predetermined number of times disclosed in the present invention are changed with the output voltage of the secondary side of the power converter, when the on-prohibition time is changed with the output voltage of the secondary side of the power converter, the controller does not fail to enter the power saving mode because the on-prohibition time is changed with the output voltage of the secondary side of the power converter.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.