阅读说明：本技术 一种输入控制方法、装置及存储设备 (input control method and device and storage equipment ) 是由 刘金虎 于 2019-08-09 设计创作，主要内容包括：本发明实施例公开了一种输入控制方法、装置及存储设备,涉及存储技术领域。该输入控制方法应用于包括缓存的输入控制装置,缓存在当前时刻的存储空间占用量小于预设的高水位线。输入控制装置预测缓存在当前时刻之后的存储空间占用量；若预测出缓存在第一时刻的存储空间占用量等于预设的高水位线,且在第一时刻缓存中输入侧的IOPS大于输出侧的IOPS,则输入控制装置在第一时刻将输入侧的IOPS的最大值调整为输出侧的IOPS,第一时刻为当前时刻之后缓存的存储空间占用量等于预设的高水位线的首个时刻。输入控制装置对输入侧的IOPS的提前控制,使得缓存的存储空间占用量处于相对稳定的状态,有效地提高了系统性能。(The embodiment of the invention discloses an input control method, an input control device and storage equipment, and relates to the technical field of storage. The input control method is applied to an input control device comprising a cache, and the occupancy amount of a storage space of the cache at the current moment is less than a preset high-water-level line. The input control device predicts the occupied amount of the storage space after the current moment; if the storage space occupation amount of the cache at the first moment is predicted to be equal to the preset high-water-level line, and the input-side IOPS is larger than the output-side IOPS in the cache at the first moment, the input control device adjusts the maximum value of the input-side IOPS to be the output-side IOPS at the first moment, and the first moment is the first moment when the storage space occupation amount of the cache after the current moment is equal to the preset high-water-level line. The input control device controls the IOPS at the input side in advance, so that the occupied amount of the cache storage space is in a relatively stable state, and the system performance is effectively improved.)

1. An input control method, applied to a storage device including a cache, the input control method comprising:

Predicting the occupied amount of the storage space of the cache after the current moment, wherein the occupied amount of the storage space of the cache at the current moment is smaller than a preset high-water-level line;

If the storage space occupation amount of the cache at the first moment is predicted to be equal to the preset high-water-level line, and the number of times of performing read-write operations per second on the input side in the cache at the first moment is larger than the number of times of performing read-write operations per second on the output side, adjusting the maximum value of the input-side IOPS to the output-side IOPS at the first moment, wherein the first moment is the first moment after the current moment when the storage space occupation amount of the cache is equal to the preset high-water-level line.

2. The input control method of claim 1, wherein the predicting the memory space occupancy of the cache after the current time comprises:

determining an average size of a plurality of write data requests received by the cache, and predicting the input-side IOPS and the output-side IOPS;

And predicting the storage space occupation amount of the cache after the current moment according to the average size, the IOPS of the input side and the IOPS of the output side.

3. The input control method according to claim 2, wherein the predicting the storage space occupation amount of the buffer after the current time based on the average size, the input-side IOPS, and the output-side IOPS includes:

Predicting the storage space occupation amount of the cache after the current time by adopting the following formula:

Wherein, t₀The current time or the time after the current time and before the first time; g_fIOPS, g representing the input side_bIOPS, s representing the output side_wRepresents the average size, b represents at t₀And the storage space occupation amount of the cache at the moment.

4. The input control method according to any one of claims 1 to 3, characterized in that, after the maximum value of the input-side IOPS is adjusted to the output-side IOPS at the first timing, the input control method further comprises:

If the occupied amount of the storage space cached at the second moment is equal to a preset threshold, predicting the occupied amount of the storage space cached after the second moment, wherein the preset threshold is equal to the product of a preset coefficient and the preset high-water line, and the preset coefficient is a numerical value which is larger than zero and smaller than 1.

5. an input control device, the input control device comprising a cache, the input control device comprising:

The prediction unit is used for predicting the storage space occupation amount of the cache after the current moment, wherein the storage space occupation amount of the cache at the current moment is smaller than a preset high-water-level line, and the prediction unit is used for determining that the storage space occupation amount of the cache at the first moment is equal to the preset high-water-level line;

The judging unit is used for judging whether the number of times IOPS of reading and writing operations per second of the input side in the cache at the first moment is greater than that of the IOPS of the output side;

An adjusting unit, configured to adjust a maximum value of the input-side IOPS to the output-side IOPS at a first time if the determining unit determines that the input-side IOPS is greater than the output-side IOPS in the cache at the first time, where the first time is a first time when an occupied amount of the storage space of the cache is equal to the preset high-level line after the current time.

6. the input control device of claim 5, wherein the prediction unit is specifically configured to:

Determining an average size of a plurality of write data requests received by the cache, and predicting the input-side IOPS and the output-side IOPS;

And predicting the storage space occupation amount of the cache after the current moment according to the average size, the IOPS of the input side and the IOPS of the output side.

7. the input control device of claim 6, wherein the prediction unit is specifically configured to:

Predicting the storage space occupation amount of the cache after the current time by adopting the following formula:

Wherein, t₀The current time or the time after the current time and before the first time; g_fIOPS, g representing the input side_bIOPS, s representing the output side_wrepresents the average size, b represents at t₀and the storage space occupation amount of the cache at the moment.

8. The input control device according to any one of claims 5 to 7,

the prediction unit is further configured to, after the adjustment unit adjusts the maximum value of the input-side IOPS to the output-side IOPS at the first time, predict the occupied amount of the storage space after the second time if the occupied amount of the storage space at the second time is equal to a preset threshold, where the preset threshold is equal to a product of a preset coefficient and the preset high-water line, and the preset coefficient is a numerical value greater than zero and smaller than 1.

9. A storage device, comprising: a processor, and a memory; the memory coupled with the processor, the memory storing program code;

The processor calls the program code in the memory to implement the input control method according to any one of claims 1 to 4.

10. A computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to implement the input control method of any one of claims 1-4.

Technical Field

The present application relates to the field of storage technologies, and in particular, to an input control method and apparatus, and a storage device.

Background

The storage is aimed at writing data to the hard disk, but the response speed of the hard disk often cannot keep up with the requirements of upper layer services. Existing storage devices typically use Cache memories (caches) to improve read and write efficiency. The size of the occupied storage space in the Cache is usually represented by a water line. Generally, a high and low water bit line is preset in the Cache, and the high and low water bit lines are respectively a highest limit value and a lowest limit value of data stored in the Cache.

And when the occupied amount of the storage space of the Cache is smaller than the low-water line, the storage device does not limit the writing speed of the data of the service layer any more. When the storage space occupation amount of the Cache is larger than the high-water line, the storage device limits the writing speed of the data of the service layer to a smaller value or improves the downloading speed so as to ensure the safety of the system.

Disclosure of Invention

The application provides an input control method, an input control device and storage equipment, which are used for realizing advanced control of IOPS (input-output-input-side Power protection) on an input side by predicting the storage space occupation amount of a Cache after the current moment, so that the storage space occupation amount of the Cache is in a relatively stable state, and the system performance is effectively improved.

In order to achieve the purpose, the technical scheme is as follows:

in a first aspect, an input control method is provided, which is applied to an input control device including a cache in which a memory space occupation amount at a current time is smaller than a preset high-water line. Specifically, the input control device predicts the occupied amount of the storage space after the current time; then, if it is predicted that the storage space occupation amount buffered at the first time is equal to the preset high-water-level line and the number of times of performing the read/write operation per second (IOPS) on the input side in the buffer at the first time is greater than the IOPS on the output side, the input control device adjusts the maximum value of the IOPS on the input side to the IOPS on the output side at the first time, which is the first time when the storage space occupation amount buffered after the current time is equal to the preset high-water-level line.

Therefore, the input control device realizes the advanced control of the IOPS at the input side by predicting the occupied amount of the storage space cached after the current moment, so that the occupied amount of the cached storage space is in a relatively stable state, and the system performance is effectively improved.

Optionally, in a possible implementation manner of the present application, the method for predicting the occupied amount of the storage space after the current time by the input control device includes: the input control device determines an average size of buffering a plurality of write data requests that have been received, and predicts an input-side IOPS and an output-side IOPS, and then predicts a storage space occupation amount after the current time of buffering, based on the average size, the input-side IOPS, and the output-side IOPS.

The size of different write data requests may vary for the same transaction in a system, but the average size of all write data typically remains constant. The input control device can calculate the average size of a plurality of write data requests according to the plurality of write data requests which are already received. The input-side IOPS is used for representing the number of the write data requests entering the cache in unit time, and the output-side IOPS is used for representing the number of the write data requests output from the cache in unit time, so that the input control device can predict the storage space occupation amount of the cache after the current time according to the average size, the input-side IOPS and the output-side IOPS.

Optionally, in another possible implementation manner of the present application, the method for predicting the occupied amount of the storage space cached after the current time according to the average size, the input-side IOPS, and the output-side IOPS by the input control device includes: the input control means predicts the storage space occupancy buffered after the current time using the following formula:

Wherein, t₀The current time or the time after the current time and before the first time; g_fIOPS, g, representing the input side_bIOPS, s representing the output side_wDenotes the average size, b denotes at t₀The storage space occupation amount of the time buffer.

in the above formulaIs shown at time t₀the number of newly accumulated write data requests in the buffer by the time t. Because of s_wRepresents an average size, and therefore, in the above formula (1)Representing the amount of memory space occupied by the newly accumulated write data requests in the cache 102.

Optionally, in another possible implementation manner of the present application, after the maximum value of the input-side IOPS is adjusted to the output-side IOPS at the first time, if the storage space occupation amount buffered at the second time is equal to the preset threshold, the input control device further predicts the storage space occupation amount buffered after the second time. The preset threshold is equal to the product of a preset coefficient and a preset high water level line, and the preset coefficient is a numerical value which is larger than zero and smaller than 1.

After the first time, the storage space occupation amount of the cache may gradually increase with the change of the input-side IPOS and the output-side IPOS, and in order to effectively ensure the system performance, the input control device may regard the second time as the current time and recalculate f from the second time.

In a second aspect, an input control device is provided, which is capable of performing the functions of the first aspect and any one of its possible implementations. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above-described functions.

In one possible manner of the present application, the input control apparatus may include a prediction unit, a determination unit, and an adjustment unit, and the prediction unit, the determination unit, and the adjustment unit may perform corresponding functions in the input control method of the first aspect and any one of the possible implementations thereof. For example: the prediction unit is used for predicting the storage space occupation amount of the cache after the current moment, wherein the storage space occupation amount of the cache at the current moment is smaller than the preset high-water-level line, and the prediction unit is used for determining that the storage space occupation amount of the cache at the first moment is equal to the preset high-water-level line. And the judging unit is used for judging whether the number IOPS of the read-write operations per second on the input side in the first time cache is greater than that on the output side. And an adjusting unit, configured to adjust a maximum value of the input-side IOPS to the output-side IOPS at a first time if the determining unit determines that the storage space occupancy of the cache predicted by the predicting unit at the first time is equal to a preset high-water line, and the input-side IOPS is greater than the output-side IOPS in the cache at the first time, where the first time is a first time at which the storage space occupancy of the cache after the current time is equal to the preset high-water line.

In a third aspect, a storage device is provided for executing the input control method according to the first aspect and various possible implementations thereof.

Optionally, the device further includes a transceiver, and the transceiver may be configured to perform the step of transceiving data, signaling, or information in the input control method according to the first aspect and any one of the possible implementation manners of the first aspect, for example, acquiring a write data request.

In a fourth aspect, a computer-readable storage medium having computer instructions stored therein is also provided; when the computer instructions are run on a computer, the computer performs the input control method as described above in the first aspect and its various possible implementations.

In a fifth aspect, there is also provided a computer program product comprising computer instructions which, when run on a computer, cause the computer to perform the input control method as described in the first aspect and its various possible implementations.

It should be noted that all or part of the computer instructions may be stored in a computer storage medium, where the first computer storage medium may be packaged together with the processor or may be packaged separately from the processor, and the present application is not limited thereto.

For the descriptions of the second, third, fourth, fifth and their various implementations in this application, reference may be made to the detailed description of the first aspect and its various implementations; moreover, the beneficial effects of the second aspect, the third aspect, the fourth aspect, the fifth aspect and various implementation manners thereof may refer to the beneficial effect analysis of the first aspect and various implementation manners thereof, and are not described herein again.

In the present application, the names of the above-mentioned input control means do not constitute a limitation on the devices or functional modules themselves, which may appear by other names in actual implementations. Insofar as the functions of the respective devices or functional modules are similar to those of the present application, they fall within the scope of the claims of the present application and their equivalents.

These and other aspects of the present application will be more readily apparent from the following description.

drawings

FIG. 1 is a diagram of a system architecture according to an embodiment of the present invention;

Fig. 2 is a first schematic flow chart of an input control method according to an embodiment of the present invention;

Fig. 3 is a second flowchart illustrating an input control method according to an embodiment of the present invention;

Fig. 4 is a schematic structural diagram of an input control device according to an embodiment of the present invention.

Detailed Description

Water line is a visual concept; the storage space of the Cache is thought to be a reservoir, the written data is equivalent to water injected into the reservoir, and the water level of the reservoir gradually rises along with the increase of the written data.

The high and low water bit lines of the Cache are respectively the highest limit value and the lowest limit value of the stored data in the Cache. Generally, the high-water line has a value of 80% of the size of the storage space in the Cache, and the low-water line has a value of 20% of the size of the storage space in the Cache. When the storage space occupation amount of the Cache is between the high and low water lines, the performance of the Cache and the safety of the stored data are relatively high.

The embodiment of the invention provides an input control method, which realizes advanced control of IOPS at the input side by predicting the storage space occupation amount of a Cache after the current moment, so that the storage space occupation amount of the Cache is in a relatively stable state, and the system performance is effectively improved.

The input control method provided by the embodiment of the invention is suitable for a storage system. Fig. 1 shows the architecture of the storage system. As shown in fig. 1, the storage system according to the embodiment of the present invention includes a host 20, a controller 11, and a plurality of hard disks 22. In practical applications, the storage system may include one or more hosts 20, and fig. 1 illustrates an example in which the storage system includes one host 20.

The host 20 and the controller 11 communicate with each other via a Network File System (NFS) protocol, a common network file system (CIFS) protocol, or a Fibre Channel (FC) protocol.

The host 20 may send a write data request to the controller 11, and after receiving the write data request, the controller 11 writes data carried in the write data request into the hard disk 22, and then the controller 11 sends a result of a write operation to the host 20, thereby completing an input/output (IO) operation. The host 20 may also send a read data request to the controller 11, and after receiving the read data request, the controller 11 obtains data to be read according to an address in the read data request, and sends the data to the host 20, thereby completing an IO reading operation.

Generally, the size of read/write data in IO is referred to as IO size, for example, IO size may be 2K, 4K, 32K, etc. For the same service in a certain system, the IO sizes of different IOs may be different, but the average size of all IOs usually remains stable. Based on this, the size of the write data request in the embodiment of the present invention is used to indicate the size of the data to be written in the write data request.

In practical applications, the controller 11 and the hard disk 22 may be integrated into a storage device, or may be located in two devices independent from each other, and the embodiment of the present invention does not limit the position relationship between the controller 11 and the hard disk 22.

As shown in fig. 1, the controller 11 provided in this embodiment at least includes a processor 101 and a cache 102.

The processor 101 may be a Central Processing Unit (CPU). In an embodiment of the present invention, the processor 101 may be configured to receive a read data request and a write data request from the host 20, and process the read data request and the write data request.

The cache 102 is used to temporarily store data received from the host 20 or data read from the hard disk 22. Taking the example that the controller 11 receives a plurality of write data requests sent by the host 20, when receiving a plurality of write data requests sent by the host 20, the controller 11 may temporarily store data in the plurality of write data requests in the cache 102. Subsequently, the data 104 stored in the cache 102 is sent to the hard disk 22. The hard disk 22 stores the data 104.

The cache 102 includes volatile memory, non-volatile memory, or a combination thereof. Volatile memory is, for example, random-access memory (RAM). Nonvolatile memory such as floppy disks, hard disks, Solid State Disks (SSDs), optical disks, and various other machine-readable and writable media on which program code may be stored. In the embodiment of the present invention, the Cache 102 is mainly used as an example for description.

The processor 101 may predict the number of times (IOPS) of read/write operations per second on the input side of the cache 102 and the IOPS on the output side, and may also predict the amount of occupied storage space after the current time. When the storage space occupation amount of the cache 102 at the first time is predicted to be equal to the preset high-water line, and the input-side IOPS is larger than the output-side IOPS at the first time, the processor 101 adjusts the maximum value of the input-side IOPS to the output-side IOPS at the first time. Alternatively, the processor 101 sends an adjustment instruction including the output-side IOPS to the host 20, which instructs to adjust the maximum value of the input-side IOPS to the output-side IOPS.

The input control method provided by the embodiment of the present invention is described below with reference to the storage system shown in fig. 1. The input control method can be applied to the controller 11 shown in fig. 1, and the following steps are executed by the processor 101 unless otherwise specified.

As shown in fig. 2, the input control method provided by the embodiment of the present invention includes the following steps.

S201, the processor 101 receives the plurality of write data requests sent by the host 20, and stores the plurality of received write data requests in the cache 102.

s202, the processor 101 calculates the average size of the plurality of write data requests according to the size of each received write data request.

The processor 101 obtains the size of each received write data request and calculates the average size of all the obtained write data requests.

S203, the processor 101 recognizes the plurality of write data requests, predicts an IOPS of the input side of the cache 102, and predicts an IOPS of the output side of the cache 102 in combination with the configuration of the cache 102.

The processor 101 may identify a plurality of write data requests by using a preset identification algorithm, determine a rule of the write data requests received by the cache 102, and predict an IOPS on an input side of the cache 102 according to the determined rule, that is, predict the number of write data requests received by the cache 102. The preset identification algorithm may be any algorithm for identifying a rule in the prior art, which is not limited in this embodiment.

The IOPS on the input side of the buffer 102 varies with the amount of traffic flow data. The IOPS on the input side of the cache 102 may be different at different times.

Generally, the rate at which the cache 102 sends data to the hard disk depends on the type of service and the configuration of the cache 102. The cache 102 sends data to the hard disk at different rates for different types of traffic. Therefore, the processor 101 may also determine the type of the service corresponding to the plurality of write data requests by analyzing the plurality of write data requests, and predict the IOPS on the output side of the cache 102 according to the configuration of the cache 102, that is, predict the number of write data requests sent by the cache 102 to the hard disk.

The IOPS on the output side of the cache 102 may also be different at different times.

And S204, predicting the storage space occupation amount of the cache 102 after the current moment by the processor 101 according to the average size, the input-side IOPS and the output-side IOPS.

The memory space occupation of the cache 102 at the current time is less than the preset high-water line.

The maximum storage space for storing data in the cache 102, i.e. the high-level bit line (C is adopted in the present embodiment)_maxIndicative), is usually preset, the value of which remains unchanged.Generally, the system data will occupy part of the storage space of the cache 102, and the occupied storage space can be represented as θ × C_maxTheta is more than or equal to 0 and less than or equal to 1. Thus, the maximum value of the storage space in the buffer 102 for storing the data of the traffic flow can be expressed as: c_max-θ*C_maxI.e., (1-theta). C_max。

The preset high-water-level line in the embodiment of the present invention refers to a maximum value of the storage space for storing the data of the traffic flow, that is, the preset high-water-level line is: (1-theta) C_max。

The processor 101 may predict the memory occupancy of the cache 102 after the current time using the following equation (1):

Wherein, g_fIOPS, g, representing the input side_bIOPS, s representing the output side_wDenotes the average size, b denotes at t₀The memory footprint of the time buffer 102. t is t₀Is the current time, or is a time after the current time and before the first time (refer to the following description).

in combination with the above description, g_fNumber of write data requests into cache 102, g_bIs the number of write data requests output from cache 102, and thus, in equation (1) aboveIs shown at time t₀The number of newly accumulated write data requests in the buffer 102 by the time t. Because of s_wrepresents an average size, and therefore, in the above formula (1)Representing the amount of memory space occupied by the newly accumulated write data requests in the cache 102.

To reduce unnecessary computations, reduce the amount of computations, and improve processing performance, the processor 101 may calculate f from the first time after the current time when the memory space occupancy of the cache 102 is greater than (the water line at the current time may be greater than the low water line) or equal to the low water line.

Further, if the processor 101 calculates the time t after the current time^*The size of the occupied storage space appearing for the first time is zero, i.e.The processor 101 will time t^*Is regarded as the current time and is from t^*Initially, f is recalculated.

S205, after the processor 101 determines the current time, the first time when the storage space occupation amount of the cache 102 is equal to the preset high-water line is determined.

The occupied amount of the storage space of the cache 102 at the current moment is less than the preset high-water line, and the first moment is the first moment when the occupied amount of the storage space of the cache 102 is equal to the preset high-water line, so that the occupied amount of the storage space of the cache 102 is less than the preset high-water line in the time period from the current moment to the first moment.

for example, if the first time is: t is t₁Then, then

For any time between the current time and the first time, since the storage space occupancy of the buffer memory 102 is lower than the preset high-water line, no pressure is applied to the buffer memory 102, and therefore, the processor 101 does not need to control the IOPS on the input side.

S206, the processor 101 determines whether the IOPS on the input side is larger than that on the output side at the first time.

when the input-side IOPS is larger than the output-side IOPS, the write data request is accumulated in the cache 102. The storage space occupation amount of the cache 102 at the first moment is already equal to the preset high-water-level line, and if the input-side IOPS is larger than the output-side IOPS at the first moment, the storage space occupation amount of the cache 102 at the next moment of the first moment is larger than the preset high-water-level line, so that the cache 102 runs in an overload state, and the system performance is reduced.

When the input-side IOPS is less than or equal to the output-side IOPS, the number of write data requests entering the cache 102 is less than or equal to the number of write data requests output from the cache 102, and the storage space occupancy of the cache 102 does not increase. The storage space occupation amount of the cache 102 at the first time is already equal to the preset high-water-level line, and if the IOPS at the input side is smaller than or equal to the IOPS at the output side at the first time, the storage space occupation amount of the cache 102 at the next time of the first time is still equal to or smaller than the preset high-water-level line, so that pressure cannot be applied to the cache 102, and the system performance cannot be influenced.

Specifically, if the IOPS of the input side is less than or equal to the IOPS of the output side, the processor 101 executes S207; if the input-side IOPS is larger than the output-side IOPS, the processor 101 executes S208.

S207, the processor 101 sets the first time as the current time, and re-executes S204.

S208, the processor 101 adjusts the maximum value of the input-side IOPS to the output-side IOPS at the first time.

To avoid stressing the buffer 102 and affecting system performance, the processor 101 adjusts the maximum value of the input-side IOPS to the output-side IOPS at the first time. Thus, the maximum number of write data requests entering the cache 102 is the output-side IOPS. After the first time, the input-side IOPS may be originally smaller than the output-side IOPS, so that after the first time, the input-side IOPS of the cache 102 is smaller than or equal to the output-side IOPS, which effectively reduces the storage space occupation of the cache 102.

By adopting the input control method provided by the embodiment, the storage space occupation amount of the cache 102 can be effectively controlled, and the situation that the storage space occupation amount of the cache 102 exceeds the preset high-water-level line can be avoided.

further, from a second time instant after the first time instant, the processor 101 may regard the second time instant as the current time instant and recalculate f from the second time instant. The second time may be the first time after the first time, when the storage space occupation amount of the cache 102 is equal to "the product of the preset coefficient and the preset high-water line".

With reference to fig. 2, as shown in fig. 3, the input control method provided in the embodiment of the present invention further includes S301 and S302.

S301, the processor 101 determines that, after the first time, the first time when the storage space occupation amount of the cache 102 is equal to "the product of the preset coefficient and the preset high-water line" is the second time.

Here, the value of the preset coefficient depends on the configuration of the system.

S302, the processor 101 regards the second time as the current time, and recalculates f from the second time.

Illustratively, the predetermined factor is 0.5, after the first time, if f is 0.5 (1- θ) C_maxThen the processor 101 considers the second time instant as the current time instant and recalculates f starting from the second time instant.

In summary, by using the input control method provided by the embodiment of the present invention, the storage space occupation amount of the cache 102 can be predicted in advance, and the IOPS on the input side is regulated according to the predicted storage space occupation amount, so that the situation that the storage space occupation amount of the cache 102 exceeds the preset high-water-level line does not occur, and the stability of the storage space occupation amount of the cache 102 and the stability of the system performance are effectively ensured. The stability of system performance further improves the effective utilization of the storage space in the cache 102.

The scheme provided by the embodiment of the invention is mainly introduced from the perspective of a method. To implement the above functions, it includes hardware structures and/or software modules for performing the respective functions. Those of skill in the art would readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

The embodiment of the present invention may perform the division of the functional modules on the input control device according to the above method examples, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. It should be noted that, the division of the modules in the embodiment of the present invention is schematic, and is only a logic function division, and there may be another division manner in actual implementation.

Fig. 4 is a schematic structural diagram of an input control device 40 according to an embodiment of the present invention. The input control device 40 is used to execute the input control method shown in fig. 2 or 3. The input control device 40 may include a prediction unit 401, a determination unit 402, and an adjustment unit 403.

The prediction unit 401 is configured to predict the storage space occupation amount of the buffer memory after the current time, where the storage space occupation amount of the buffer memory at the current time is less than the preset high-water line, and to determine that the storage space occupation amount of the buffer memory at the first time is equal to the preset high-water line. For example, in conjunction with fig. 2 or fig. 3, prediction unit 401 may be used to perform S204 and S205. A determination unit 402, configured to determine whether the IOPS of the input side is larger than the IOPS of the output side in the first time buffer. For example, in conjunction with fig. 2 or fig. 3, the determining unit 402 may be configured to execute S206. An adjusting unit 403, configured to, if the determining unit 402 determines that the storage space occupation amount of the cache predicted by the predicting unit 401 at the first time is equal to the preset high-water line, and the input-side IOPS in the cache at the first time is greater than the output-side IOPS, adjust the maximum value of the input-side IOPS to the output-side IOPS at the first time, where the first time is the first time when the storage space occupation amount of the cache after the current time is equal to the preset high-water line. For example, in conjunction with fig. 2 or fig. 3, the adjusting unit 403 may be configured to perform S208.

Optionally, the prediction unit 401 is specifically configured to: determining an average size of a plurality of write data requests received by a cache, and predicting an input-side IOPS and an output-side IOPS; and predicting the storage space occupation amount buffered after the current moment according to the average size, the input-side IOPS and the output-side IOPS. For example, in conjunction with fig. 2 or fig. 3, prediction unit 401 may be used to perform S202, S203, S204.

Optionally, the prediction unit 401 is specifically configured to: predicting the occupied amount of the storage space cached after the current time by adopting the following formula:

Wherein, t₀The current time or the time after the current time and before the first time; g_fIOPS, g, representing the input side_bIOPS, s representing the output side_wDenotes the average size, b denotes at t₀The storage space occupation amount of the time buffer.

Optionally, the predicting unit 401 is further configured to, after the adjusting unit 403 adjusts the maximum value of the input-side IOPS to the output-side IOPS at the first time, predict the occupied amount of the storage space cached after the second time if the occupied amount of the storage space cached at the second time is equal to a preset threshold, where the preset threshold is equal to a product of a preset coefficient and a preset high-water line, and the preset coefficient is a numerical value greater than zero and smaller than 1. For example, in conjunction with fig. 2 or fig. 3, prediction unit 401 may be used to perform S301.

Of course, the input control device 40 provided by the embodiment of the present invention includes, but is not limited to, the above modules, for example, the input control device 40 may further include the storage unit 404. The storage unit 404 may be used for storing program codes of the input control device 40, and may also be used for storing data acquired by the input control device 40 during operation, such as data in a request for writing data.

In actual implementation, the prediction unit 401, the judgment unit 402 and the adjustment unit 403 may be implemented by the processor 101 shown in fig. 1 calling the program code in the cache 102. The specific implementation process may refer to the description of the input control method portion shown in fig. 3, and is not described herein again.

Another embodiment of the present invention further provides a computer-readable storage medium, which stores instructions that, when executed on a computer, cause the computer to perform the method shown in the above method embodiment.

In another embodiment of the present invention, a computer program product is also provided, which comprises computer instructions that, when executed on a computer, cause the computer to perform the method shown in the above method embodiment.

As will be appreciated by one of ordinary skill in the art, various aspects of the invention, or possible implementations of various aspects, may be embodied as a system, method, or computer program product. Accordingly, aspects of the present invention, or possible implementations of aspects, may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a "circuit," module "or" system. Furthermore, aspects of the invention, or possible implementations of aspects, may take the form of a computer program product, which refers to computer-readable program code stored in a computer-readable medium.

A computer readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing, such as a Random Access Memory (RAM), Read Only Memory (ROM), erasable programmable read-only memory (EPROM), or an optical disc.

a processor in the computer reads the computer-readable program code stored in the computer-readable medium, so that the processor can perform the functional actions specified in each step or a combination of steps in the flowcharts.

the computer readable program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. It should also be noted that, in some alternative implementations, the functions noted in the flowchart or block diagram block may occur out of the order noted in the figures. For example, two steps or two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and those skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all such changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.