阅读说明：本技术 震荡器电路 (Oscillator circuit ) 是由 翁子翔 于 2018-06-08 设计创作，主要内容包括：本发明提供一种震荡器电路,包括一信号产生电路以及一参考电压产生电路。信号产生电路接收一参考电压,并且根据参考电压与一反馈电压的一比较结果产生一输出信号,其中反馈电压预先被充电至一系统高电平。参考电压产生电路耦接至信号产生电路,用以产生参考电压。本发明所提出的震荡器电路,输出信号的频率/周期可因应工艺、电压或温度的变异被适应性地调整,用以补偿工艺、电压或温度变异对于震荡频率造成的影响,有效地解决现有技术的缺陷。(The invention provides an oscillator circuit, which comprises a signal generating circuit and a reference voltage generating circuit. The signal generating circuit receives a reference voltage and generates an output signal according to a comparison result of the reference voltage and a feedback voltage, wherein the feedback voltage is charged to a system high level in advance. The reference voltage generating circuit is coupled to the signal generating circuit for generating a reference voltage. The oscillator circuit of the present invention can adaptively adjust the frequency/period of the output signal according to the process, voltage or temperature variation, so as to compensate the effect of the process, voltage or temperature variation on the oscillation frequency, thereby effectively solving the defects of the prior art.)

1. An oscillator circuit, comprising:

a signal generating circuit, receiving a reference voltage and generating an output signal according to a comparison result of the reference voltage and a feedback voltage, wherein the feedback voltage is pre-charged to a system high level; and

A reference voltage generating circuit coupled to the signal generating circuit for generating the reference voltage.

2. An oscillator circuit as claimed in claim 1, wherein a level of the feedback voltage repeatedly varies between the system high level and a level of the reference voltage.

3. The oscillator circuit of claim 1, wherein the output signal is a clock signal comprising a plurality of pulses, and a period of the output signal varies with a high level of the system.

4. The oscillator circuit of claim 1, wherein the output signal is a clock signal comprising a plurality of pulses, and a period of the output signal varies with a level of the reference voltage.

5. The oscillator circuit of claim 1, wherein the reference voltage generation circuit comprises a transistor, and wherein a level of the reference voltage is positively correlated to a threshold voltage of the transistor.

6. An oscillator circuit as claimed in claim 1, wherein the signal generating circuit comprises:

A comparison circuit for receiving the reference voltage and the feedback voltage, comparing the levels of the reference voltage and the feedback voltage to generate the comparison result, and generating the output signal according to the comparison result; and

A charge/discharge circuit coupled to a terminal with the comparison circuit and receiving the output signal, the charge/discharge circuit comprising:

a capacitor coupled to the terminal,

the charge/discharge circuit controls the discharge or charge of the capacitor according to a level of the output signal to generate the feedback voltage at the terminal.

7. The oscillator circuit of claim 6, wherein the charge/discharge circuit further comprises:

And the current source is coupled between the endpoint and a grounding point in parallel with the capacitor.

8. An oscillator circuit, comprising:

A signal generating circuit, receiving a reference voltage and generating an output signal according to a comparison result of the reference voltage and a feedback voltage, wherein the signal generating circuit comprises a capacitor, which is repeatedly discharged or charged according to a level of the output signal, for generating the feedback voltage at a terminal; and

a reference voltage generating circuit coupled to the signal generating circuit for generating the reference voltage.

9. the oscillator circuit of claim 8 in which the feedback voltage is precharged to a system high level and a level of the feedback voltage varies between the system high level and a level of the reference voltage.

10. The oscillator circuit of claim 8 in which the output signal is a clock signal comprising a plurality of pulses, and a period of the output signal varies with a system high level.

11. The oscillator circuit of claim 8, wherein the output signal is a clock signal comprising a plurality of pulses, and a period of the output signal varies with a level of the reference voltage.

12. the oscillator circuit of claim 8, wherein the reference voltage generation circuit comprises a transistor, and wherein a level of the reference voltage is positively correlated to a threshold voltage of the transistor.

13. An oscillator circuit as claimed in claim 10, wherein the period of the output signal is correspondingly lengthened when the system high level is increased.

14. The oscillator circuit of claim 11 in which the period of the output signal is correspondingly lengthened when the level of the reference voltage decreases.

15. the oscillator circuit of claim 12 in which a period of the output signal is correspondingly lengthened when a level of the threshold voltage decreases.

Technical Field

The present invention relates to an oscillator circuit, and more particularly, to an oscillator circuit capable of effectively compensating for process, voltage or temperature variations.

background

Process, voltage, and temperature (PVT) variations are one of the key factors that affect the performance of integrated circuits. For example, process, voltage, or temperature variations may correspondingly cause a change in the oscillation frequency of the clock signal. However, the generation of clock signals is an important component of any electronic system. In particular, for circuits driven by a system clock, the performance is further affected by the frequency variation of the clock signal. For example, a Charge Pump (Charge Pump) circuit operating according to a clock signal has a strong driving capability when an oscillation frequency of the clock signal is high, and a weak driving capability when the oscillation frequency is low.

When the driving capability of the charge pump circuit is insufficient, one solution is to increase the number of charge pump circuits. However, the circuit area is also increased accordingly. Another solution is to increase the oscillation frequency of the clock signal. However, in the case of a fast corner (fast corner) of the process, since the driving capability is excessively enhanced, a problem of excessively high voltage may be caused.

In order to overcome the undesirable effect of process, voltage or temperature variation on the oscillation frequency, the present invention provides a new oscillator circuit architecture, which can effectively compensate the effect of process, voltage or temperature variation on the oscillation frequency.

Disclosure of Invention

The invention discloses an oscillator circuit, which comprises a signal generating circuit and a reference voltage generating circuit. The signal generating circuit receives a reference voltage and generates an output signal according to a comparison result of the reference voltage and a feedback voltage, wherein the feedback voltage is charged to a system high level in advance. The reference voltage generating circuit is coupled to the signal generating circuit and used for generating a reference voltage.

the invention discloses an oscillator circuit, which comprises a signal generating circuit and a reference voltage generating circuit. The signal generating circuit receives a reference voltage and generates an output signal according to a comparison result of the reference voltage and a feedback voltage, wherein the signal generating circuit comprises a capacitor which is repeatedly discharged or charged in response to a level of the output signal and is used for generating the feedback voltage at a terminal. The reference voltage generating circuit is coupled to the signal generating circuit for generating a reference voltage.

the oscillator circuit of the present invention can adaptively adjust the frequency/period of the output signal according to the process, voltage or temperature variation, so as to compensate the effect of the process, voltage or temperature variation on the oscillation frequency, thereby effectively solving the defects of the prior art.

Drawings

fig. 1 is a block diagram illustrating an oscillator circuit according to an embodiment of the invention.

Fig. 2 is a detailed circuit diagram of an oscillator circuit according to an embodiment of the invention.

Fig. 3 is a waveform diagram illustrating an example of the output signal VOUT and the feedback voltage VFB according to an embodiment of the invention.

Fig. 4 is a detailed circuit diagram of an oscillator circuit according to another embodiment of the invention.

Fig. 5 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention.

Fig. 6 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention.

Fig. 7 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention.

reference numerals

100. 200, 400, 500, 600, 700-oscillator circuit;

110. 210-a signal generating circuit;

111. 211-charge/discharge circuit;

112. 212-a comparison circuit;

120. 220-reference voltage generating circuit;

C-capacitance;

D1-diode;

i1, I2-current source;

N1-end point;

SW-switch;

T1, T2, T3, T4-transistors;

VDD-system high voltage;

VFB-feedback voltage;

VREF-reference voltage;

VOUT is output signal.

Detailed Description

In order to make the objects, features and advantages of the present invention comprehensible, specific embodiments accompanied with figures are described in detail below. For the purposes of illustrating the spirit of the present invention and not for limiting the scope of the present invention, it is to be understood that the following embodiments may be implemented via software, hardware, firmware, or any combination thereof.

fig. 1 is a block diagram illustrating an oscillator circuit according to an embodiment of the invention. The oscillator circuit 100 may include a signal generating circuit 110 and a reference voltage generating circuit 120. The reference voltage generating circuit 120 is coupled to the signal generating circuit 110 for generating a reference voltage VREF. The signal generating circuit 110 receives the reference voltage VREF and generates an output signal VOUT according to a comparison result of the reference voltage VREF and a feedback voltage VFB. The output signal VOUT may be a clock signal or an oscillation signal including a plurality of pulses, wherein the pulses are repeatedly or periodically generated according to the comparison result, and wherein a period of the output signal VOUT may be determined by a time difference between rising/falling edges of two adjacent pulses.

According to an embodiment of the present invention, the signal generating circuit 110 may include a charge/discharge circuit 111 and a comparison circuit 112. The charge/discharge circuit 111 and the comparison circuit 112 are coupled to a node N1, and include a capacitor (not shown in FIG. 1) coupled to a node N1. The charge/discharge circuit 111 controls the capacitor to discharge or charge according to the level of the output signal VOUT, so as to generate the feedback voltage VFB at the node N1. The comparison circuit 112 receives a reference voltage VREF and a feedback voltage VFB, compares levels of the reference voltage VREF and the feedback voltage VFB to generate the comparison result, and generates an output signal VOUT according to the comparison result.

According to an embodiment of the present invention, the oscillator circuit 100 may receive a system high voltage VDD, and the feedback voltage VFB may be pre-charged to a system high level of the system high voltage VDD for discharging from the system high level after the oscillator circuit 100 starts to operate. The comparison circuit 112 continuously compares the levels of the reference voltage VREF and the feedback voltage VFB, and when the comparison result changes, the level of the output signal VOUT also changes, thereby generating a pulse of the output signal VOUT. In response to the pulse of the output signal VOUT, the signal generating circuit 110 may charge the feedback voltage VFB to the system high level, so that it may be discharged from the system high level again. By this reciprocating operation, the feedback voltage VFB can be increased or decreased repeatedly in response to the level change of the output signal VOUT, so that the output signal VOUT generates a plurality of pulses in sequence. Since the output signal VOUT includes a plurality of pulses that are repeatedly or periodically generated, the output signal VOUT can be used as a basic clock signal or oscillation signal for other circuits (e.g., charge pump circuits).

Fig. 2 is a detailed circuit diagram of an oscillator circuit according to an embodiment of the invention. The oscillator circuit 200 may include a signal generating circuit 210 and a reference voltage generating circuit 220. The reference voltage generating circuit 220 is coupled to the signal generating circuit 210 for generating a reference voltage VREF. The signal generating circuit 210 receives the reference voltage VREF and generates an output signal VOUT according to a comparison result of the reference voltage VREF and the feedback voltage VFB.

according to an embodiment of the present invention, the signal generating circuit 210 may include a charge/discharge circuit 211 and a comparison circuit 212. The charge/discharge circuit 211 may include a capacitor C, a first current source I1, and a switch SW. The capacitor C and the first current source I1 are coupled in parallel between the node N1 and a ground point. The switch SW is coupled between a voltage supply terminal providing the system high voltage VDD and a node N1, and its switching is controlled by the level of the output signal VOUT. The comparison circuit 212 includes a comparator that receives the reference voltage VREF and the feedback voltage VFB, compares the levels of the reference voltage VREF and the feedback voltage VFB to generate the comparison result, and generates the output signal VOUT according to the comparison result.

According to an embodiment of the present invention, the switch SW may be turned off in advance to charge the capacitor C, so that the feedback voltage VFB may be pulled up to the system high level in advance, and the voltage of the feedback voltage VFB is higher than a level of the reference voltage VREF. When the oscillator circuit 200 starts to operate, the switch SW is opened, so that the charge stored in the capacitor C starts to discharge through the first current source I1. When the voltage of the feedback voltage VFB continuously drops to a level lower than the reference voltage VREF, the comparison result of the comparator is also changed, so as to change the level of the output signal VOUT.

In response to the level change of the output signal VOUT, the switch SW is turned off to form a short circuit between the VDD voltage supply terminal and the node N1, so that the feedback voltage VFB at the node N1 can be charged to the system high level by the system high voltage VDD. When the feedback voltage VFB rises to a level higher than the reference voltage VREF, the comparison result is changed again, so that the level of the output signal VOUT is changed, the switch SW is opened, and the charge stored in the capacitor C starts to be discharged again through the first current source I1. By this reciprocating operation, the capacitor C can be repeatedly discharged or charged according to the level of the output signal VOUT, so that the level of the feedback voltage VFB can be correspondingly and repeatedly increased or decreased and changed between the level of the system high level VDD and the level of the reference voltage VREF, thereby enabling the comparator to sequentially generate a plurality of pulses of the output signal VOUT.

According to an embodiment of the present invention, the switch SW may be implemented by one or more transistors, wherein the transistor(s) may include a control electrode or control terminal for receiving the output signal VOUT.

Fig. 3 is a waveform diagram illustrating an example of the output signal VOUT and the feedback voltage VFB according to an embodiment of the invention. As shown, a level of the feedback voltage VFB repeatedly varies between the system high level VDD and the level of the reference voltage VREF. In addition, when the feedback voltage VFB is greater than or equal to the reference voltage VREF, the output signal VOUT has a low level. When the feedback voltage VFB is smaller than the reference voltage VREF, the output signal VOUT has a high level (is pulled high), and until it is detected that the feedback voltage VFB is not smaller than the reference voltage VREF, the output signal VOUT is pulled low to a low level again, thereby generating the pulse.

When the output signal VOUT has a low level, the switch SW is opened to form an open circuit, so that the charge stored in the capacitor C can be discharged through the first current source I1. When the output signal VOUT has a high level, the switch SW is turned off to form a short circuit, so that the feedback voltage VFB at the node N1 can be charged to a system high level.

according to an embodiment of the invention, the period of the output signal VOUT varies with the high level of the system. For example, when the system high level is increased, since the time required for the feedback voltage VFB to be charged to the system high level and discharged to the level of the reference voltage VREF is increased, the period of the output signal VOUT is correspondingly increased. Similarly, when the system high level is lowered, the period of the output signal VOUT is correspondingly shortened.

Therefore, the influence of the voltage variation on the oscillation frequency/period of the output signal VOUT can be effectively compensated. For example, in the case of fast corner of the process (high system voltage VDD is high, transistor threshold voltage Vth is low), the oscillation frequency becomes fast and the period becomes short. However, with the above circuit design, when the system high level is increased, the period of the output signal VOUT is also correspondingly increased, so that the influence of the variation of the system high voltage VDD on the oscillation frequency/period can be effectively compensated. Similarly, in the case of a slow corner (low corner) of the process (high system voltage VDD is low, and transistor threshold voltage Vth is high), the period of the output signal VOUT is correspondingly shortened by the above circuit design, so that the oscillation frequency is increased.

in addition, according to an embodiment of the invention, the period of the output signal VOUT also varies with a level of the reference voltage VREF. For example, when the level of the reference voltage VREF increases, the period of the output signal VOUT is correspondingly shortened because the time required for the feedback voltage VFB to be discharged to the level of the reference voltage VREF is shortened. Similarly, when the level of the reference voltage VREF decreases, the period of the output signal VOUT is correspondingly lengthened. Therefore, by properly controlling the reference voltage VREF to be positively correlated with the threshold voltage Vth of the transistor, for example, the influence of process or temperature variation on the oscillation frequency/period of the output signal VOUT can be effectively compensated.

According to an embodiment of the present invention, the reference voltage generation circuit 120/220 may include a transistor, and wherein a level of the reference voltage VREF may be designed to be positively correlated with a threshold voltage Vth of the transistor. That is, the level of the reference voltage VREF rises/falls correspondingly as the threshold voltage Vth rises/falls.

Referring back to fig. 2, according to an embodiment of the invention, the reference voltage generating circuit 220 may include a second current source I2 and a diode-connected transistor T1, such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), wherein the drain terminal of the transistor T1 is connected to the gate terminal. The second current source I2 and the transistor T1 are coupled in series between the VDD voltage supply terminal and ground, and the drain terminal of the transistor T1 is coupled to the comparison circuit 212 for providing the reference voltage VREF. Since the transistor T1 is a diode-connected transistor, the voltage variation at the drain end reflects the variation of the threshold voltage Vth of the transistor T1, and thus, a level of the reference voltage VREF is positively correlated with a threshold voltage Vth of the transistor T1 and varies with the variation of the threshold voltage Vth.

In this embodiment, the reference voltage VREF is substantially equal to a threshold voltage Vth of the transistor T1. Thus, the influence of the variation of the threshold voltage Vth (caused by process or temperature variation) on the oscillation frequency/period of the output signal VOUT can be effectively compensated. For example, in the case of fast corner of the process (high system voltage VDD is high, transistor threshold voltage Vth is low), the oscillation frequency becomes fast and the period becomes short. However, with the above circuit design, when the threshold voltage Vth is decreased, the period of the output signal VOUT is also correspondingly increased, so that the influence of the variation of the system high voltage VDD on the oscillation frequency/period can be effectively compensated. Similarly, in the case of a slow corner of the process (i.e., the system high voltage VDD is low, and the transistor threshold voltage Vth is high), the period of the output signal VOUT is correspondingly shortened by the above circuit design, and the oscillation frequency is increased.

It should be noted that in the embodiment shown in fig. 2, the transistor T1 is an NMOS transistor, but the invention is not limited to this embodiment.

Fig. 4 is a detailed circuit diagram of an oscillator circuit according to another embodiment of the invention. Most components of the oscillator circuit 400 are the same as those of the oscillator circuit 200, and the operation thereof is similar, so the same/similar components can be referred to the above description, and are not repeated herein. The oscillator circuit 400 may include a diode-connected transistor T2, wherein the transistor T2 is a PMOS transistor and the drain terminal of the transistor T2 is connected to the gate terminal. Similarly, in the embodiment, the reference voltage VREF is positively correlated to or substantially equal to a threshold voltage Vth of the transistor T2. Thus, the influence of the variation of the threshold voltage Vth (caused by process or temperature variation) on the oscillation frequency/period of the output signal VOUT can be effectively compensated. In addition, the influence of the variation of the system high voltage VDD on the oscillation frequency/period of the output signal VOUT can be effectively compensated.

fig. 5 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention. Most components of the oscillator circuit 500 are the same as those of the oscillator circuit 200, and the operation thereof is similar, so the same/similar components can be referred to the above description, and are not repeated herein. The oscillator circuit 500 may include a diode D1. Similarly, in this embodiment, the reference voltage VREF is positively correlated with or substantially equal to the cut-in voltage (cut-in voltage) of the diode D1. In this way, the effect of the variation of the cut-in voltage (caused by process or temperature variation) on the oscillation frequency/period of the output signal VOUT can be effectively compensated. In addition, the influence of the variation of the system high voltage VDD on the oscillation frequency/period of the output signal VOUT can be effectively compensated.

Fig. 6 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention. Most components of the oscillator circuit 600 are the same as those of the oscillator circuit 200, and the operation thereof is similar, so the same/similar components can be referred to the above description, and are not repeated herein. The oscillator circuit 600 may include a diode-connected transistor T3, wherein the transistor T3 is an npn Bipolar Junction Transistor (BJT), and the collector terminal and the base terminal of the transistor T3 are connected. Likewise, in this embodiment, the reference voltage VREF is positively correlated with, or substantially equal to, the base-emitter voltage VBE of the transistor T3. Thus, the influence of the variation of the base-emitter voltage VBE (caused by process or temperature variation) on the oscillation frequency/period of the output signal VOUT can be effectively compensated. In addition, the influence of the variation of the system high voltage VDD on the oscillation frequency/period of the output signal VOUT can be effectively compensated.

fig. 7 is a detailed circuit diagram of an oscillator circuit according to yet another embodiment of the invention. Most components of the oscillator circuit 700 are the same as those of the oscillator circuit 200, and the operation thereof is similar, so the same/similar components can be referred to the above description, and are not repeated herein. The oscillator circuit 700 may include a diode-connected transistor T4, wherein the transistor T4 is a pnp Bipolar Junction Transistor (BJT), and the collector terminal and the base terminal of the transistor T4 are connected. Similarly, in this embodiment, the reference voltage VREF is positively correlated with, or substantially equal to, the emitter-base voltage VEB of the transistor T4. Thus, the influence of the variation of the emitter-base voltage VEB (caused by process or temperature variation) on the oscillation frequency/period of the output signal VOUT can be effectively compensated. In addition, the influence of the variation of the system high voltage VDD on the oscillation frequency/period of the output signal VOUT can be effectively compensated.

compared with the prior art, the oscillator circuit of the present invention cannot effectively compensate the frequency/period of the output signal due to the process, voltage or temperature variation, and the frequency/period of the output signal can be adaptively adjusted according to the process, voltage or temperature variation to compensate the effect of the process, voltage or temperature variation on the oscillation frequency, thereby effectively solving the defects of the prior art.

Although the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.