阅读说明：本技术 用于熔融的多层非晶硒传感器的制造方法 (Method for manufacturing multilayer amorphous selenium sensor for melting ) 是由 J.朔伊尔曼 W.赵 于 2017-11-30 设计创作，主要内容包括：包括非晶硒(a-Se)的层和至少一个电荷阻挡层的传感器通过在沉积非晶硒之前将电荷阻挡层沉积在基板之上来形成,从而使得电荷阻挡层能够以升高的温度来形成。这种工艺不受a-Se的结晶化温度所限制,从而导致有效的电荷阻挡层的形成,其能够实现所得到器件的改进信号放大。可以通过在分离的基板之上形成第一和第二非晶硒层,然后以相对低的温度熔融a-Se层来制造传感器。(A sensor including a layer of amorphous selenium (a-Se) and at least one charge blocking layer is formed by depositing the charge blocking layer over a substrate prior to depositing the amorphous selenium, thereby enabling the charge blocking layer to be formed at an elevated temperature. Such a process is not limited by the crystallization temperature of a-Se, resulting in the formation of an effective charge blocking layer, which enables improved signal amplification of the resulting device. The sensor may be fabricated by forming first and second amorphous selenium layers over separate substrates, and then melting the a-Se layer at a relatively low temperature.)

1. A method of manufacturing a sensor, comprising:

Forming a first charge blocking layer over a first substrate;

Forming a first layer of amorphous selenium over the first charge blocking layer;

Forming a second charge blocking layer over the second substrate;

Forming a second layer of amorphous selenium over the second charge blocking layer;

Contacting the first layer of amorphous selenium with the second layer of amorphous selenium to form a multilayer structure;

Heating the multilayer structure to melt the first layer of amorphous selenium to the second layer of amorphous selenium.

2. The method of claim 1, wherein the first charge blocking layer and the second charge blocking layer each comprise an organic polymer.

3. The method of claim 1, wherein the first and second charge blocking layers are formed by physical vapor deposition, chemical vapor deposition, or solution-based deposition.

4. The method of claim 1, wherein the first substrate comprises an electronic reader.

5. The method of claim 1, wherein the first charge blocking layer is formed over a pixel electrode.

6. The method of claim 1, wherein a thickness of the first layer of amorphous selenium is less than a thickness of the second layer of amorphous selenium.

7. The method of claim 1, wherein at least one of the first layer of amorphous selenium and the second layer of amorphous selenium comprises doped amorphous selenium.

8. The method of claim 1, wherein the second substrate comprises electrode glass or a scintillator.

9. The method of claim 1, wherein at least one of the first substrate and the second substrate is a flexible substrate.

10. The method of claim 1, further comprising forming a high voltage electrode over the second substrate prior to forming the second charge blocking layer.

11. The method of claim 1, wherein the multilayer structure is heated to 35^°C to 60^°C to melt the amorphous selenium layer.

12. The method of claim 1, further comprising applying a compressive force to the multilayer structure during the heating.

13. The method of claim 1, wherein heating the multilayer structure to melt the first and second layers of amorphous selenium is performed under vacuum.

14. The method of claim 1, wherein the molten layer of amorphous selenium is free of porosity.

15. A method of manufacturing a sensor, comprising:

Forming a charge blocking layer over a substrate;

forming a layer of amorphous selenium over the charge blocking layer; and

Heating the layer of amorphous selenium to melt the layer of amorphous selenium to the charge blocking layer.

16. The method of claim 15, wherein the substrate is a flexible substrate.

17. the method of claim 15, wherein the charge blocking layer is at least 200 angstroms^°The temperature of C is formed by physical vapor deposition or chemical vapor deposition.

18. the method of claim 15, wherein the layer of amorphous selenium is heated to 35^°c to 60^°C to melt the layer of amorphous selenium to the charge blocking layer.

background

The present application relates generally to sensors adapted to detect optical or ionizing radiation, and more particularly to multilayer amorphous selenium (a-Se) sensors and methods of producing the same.

Amorphous selenium (a-Se) has been commercialized as both optical sensors and direct x-ray detectors, and a-Se with avalanche gain (avalanche gain) has also been proposed for use with indirect x-ray detectors. advantages of a-Se over other photoconductors, such as silicon, which can be used for optical and x-ray sensing applications, and CdTe, which can be used to detect x-rays, include the ability for large area deposition, avalanche multiplication of holes at electric fields (ESe) greater than 70V/um, and x-ray conversion gain which increases monotonically with ESe.

As will be appreciated, conventional x-ray detectors, particularly x-ray detectors adapted for low photon flux applications, suffer from image degradation due to electronic noise. However, reducing the electronic noise of the readout electronics increases the cost of the imager and has limited effectiveness.

On the other hand, for an a-Se detector, electronic noise can be overcome by adding ESe to amplify the signal before the introduction of the electronic noise. For optical sensors ESe with avalanche gain greater than 70V/um is required, while for direct x-ray sensors any increase in ESe will increase the conversion gain.

disclosure of Invention

Despite recent developments, there remains a need for improved methods for fabricating a-Se (a-Se-containing) structures that can be incorporated into systems for optical and x-ray sensing, where signal amplification can be achieved prior to the introduction of electronic noise. As described herein, a-Se containing structures can be made by delaying the formation of a temperature sensitive amorphous selenium layer until after an elevated temperature treatment of a charge blocking layer within the structure.

according to various embodiments, a method of manufacturing a sensor includes forming a first charge blocking layer over a first substrate, forming a first layer of amorphous selenium over the first charge blocking layer, forming a second charge blocking layer over a second substrate, and forming a second layer of amorphous selenium over the second charge blocking layer.

The first layer of amorphous selenium is then brought into contact with the second layer of amorphous selenium to form a multilayer structure, which is heated to melt the first layer of amorphous selenium to the second layer of amorphous selenium. Can be heated to a temperature higher than the glass transition temperature (T) of amorphous selenium_g) But below its crystallization temperature (T)_c) To complete the melting.

According to further embodiments, a sensor formation method includes forming a charge blocking layer over a substrate, forming a layer of amorphous selenium over the charge blocking layer, and heating the layer of amorphous selenium to melt the layer of amorphous selenium to the charge blocking layer.

Drawings

The following detailed description of specific embodiments of the present application can be best understood when read in conjunction with the following drawings, where like structure is indicated with like reference numerals and in which:

FIG. 1A is a schematic view of an optical sensor including a layer of amorphous selenium;

FIG. 1B is a schematic diagram of a direct x-ray sensor including an active layer of amorphous selenium;

FIG. 1C is a schematic diagram of a combined solid state Active Matrix Flat Panel Imager (AMFPI) and optical imager including a layer of amorphous selenium;

FIG. 2A illustrates the sequential formation of a charge blocking layer and a first layer of amorphous selenium over a substrate including an electronic reader;

Fig. 2B illustrates the formation of a charge blocking layer and a second layer of amorphous selenium over a substrate;

Fig. 2C illustrates formation of a multilayer structure by alignment and subsequent melting of first and second layers of amorphous selenium, in accordance with various embodiments;

FIG. 3A illustrates the sequential formation of a charge blocking layer and a first layer of amorphous selenium having a first thickness over a substrate including an electronic reader;

Fig. 3B illustrates the formation of a charge blocking layer and a second layer of amorphous selenium having a second thickness over the substrate different from the first thickness;

Fig. 3C illustrates the formation of a multilayer structure by alignment and subsequent melting of first and second layers of amorphous selenium, in accordance with certain embodiments;

FIG. 4A shows an example sensor structure formed by lamination and melting of separately formed layers of amorphous selenium;

FIG. 4B illustrates another example sensor structure formed by lamination and melting of separately formed layers of amorphous selenium;

FIG. 5 depicts an experimental setup for evaluating the disclosed multi-layered sensor;

FIG. 6 is a plot of time-of-flight versus electric field for an exemplary multi-layer sensor, an

FIG. 7 is a graph illustrating normalized signal versus time for minimum ghosting for an exemplary multi-layer sensor.

Detailed Description

Reference will now be made in detail to various embodiments of the subject matter of the present application, some of which are illustrated in the accompanying drawings. The same reference numbers will be used throughout the drawings to refer to the same or like parts.

Schematic diagrams of example optical sensors, direct x-ray detectors, and indirect x-ray detectors are shown in fig. 1A, 1B, and 1C, respectively.

Referring to fig. 1A, the optical sensor includes a transparent substrate 100, such as an electrode glass substrate. High voltage electrodes (not separately shown) may be formed on the substrate from a suitable transparent, conductive material, such as Indium Tin Oxide (ITO), using conventional deposition and patterning techniques, such as physical vapor deposition (e.g., evaporation or sputtering) and photolithography.

A first charge blocking layer 120 is formed over the substrate 100. The first charge blocking layer 120 may be a high temperature, high field hole blocking layer formed, for example, from an organic polymer. The first charge blocking layer 120 may be formed using a thermal deposition process or a chemical deposition process.

Still referring to fig. 1A, a layer 130 of amorphous selenium (a-Se) is disposed over the first charge blocking layer 120. In various embodiments disclosed herein, the layer of amorphous selenium may have a thickness of 0.5 to 100 microns, such as 0.5, 1, 2, 4, 8, 10, 20, 50, or 100 microns, including ranges between any of the foregoing values. Amorphous selenium may be doped (stabilized) or undoped. Exemplary dopants include arsenic, tellurium, and chlorine, which may be included in amounts of 0.1 to 0.5 atomic percent (e.g., 0.1, 0.2, 0.3, 0.4, or 0.5 atomic%, including ranges between any of the foregoing values).

a second charge blocking layer 140 is formed over the layer 130 of amorphous selenium. In a comparative structure, the second charge blocking layer 140 may be a low-temperature, high-field electron blocking layer formed of, for example, an organic polymer. The second charge blocking layer 140 may be formed using a thermal deposition process or a chemical deposition process. As will be appreciated, a low temperature process for forming the second charge blocking layer 140 directly over the layer 130 of amorphous selenium (a-Se) may be used to avoid crystallization of the underlying selenium layer 130. In this context, "low temperature" means that the process temperature is below the crystallization onset temperature for selenium, e.g. below 80^°C or less than 60^°C。

In the illustrated embodiment, a spacer 200, such as an air gap or vacuum gap, separates the multilayer structure including the substrate 100, the first charge blocking layer 120, the a-Se layer 130, and the second charge blocking layer 140 from the readout electronics. The readout electronics 160 may include an electron beam readout. Since the optical avalanche structure of fig. 1A relies on a vacuum tube design, direct conversion sensors cannot operate above ESe at about 10V/um. The optical sensor of fig. 1A is adapted to receive optical radiation 50 through a transparent substrate 100. When a-Se is capable of avalanche gain, the structure is referred to as a high gain avalanche surge photoconductor (HARP).

Referring to fig. 1B, an exemplary direct x-ray sensor is schematically illustrated. The direct x-ray sensor includes a layer 230 of amorphous selenium disposed between a first charge blocking layer 240 and a second charge blocking layer 220. The first charge blocking layer 240 may be a high temperature, low field electron blocking layer, while in conventional structures, the second charge blocking layer 220 may be a low temperature, low field hole blocking layer. That is, for thermal compatibility with the formed layer 230 of amorphous selenium, the second charge blocking layer 220 may be formed at a low temperature, i.e., below a crystallization start temperature for amorphous selenium.

The pixel electrode 250 may be disposed proximate to readout electronics 260. During operation, ionizing radiation, such as x-ray radiation 60, may enter the x-ray sensor of fig. 1B through transparent High Voltage (HV) electrode 210. For example, the HV electrode 210 may comprise a patterned layer of ITO.

Referring to FIG. 1C, a scintillation HARP-AMFPI (left) and an optical imager (right) are shown. Each sensor comprises, from bottom to top, read-out electronics 360, one or more pixel electrodes 350, an Electron Blocking Layer (EBL) 340, a layer 330 of amorphous selenium, a Hole Blocking Layer (HBL) 320 and a high voltage electrode 310. During use, optical radiation 50 may enter the optical imager through HV electrode 310.

In the illustrated configuration, the scintillation HARP-AMFPI sensor additionally includes a scintillator 305 disposed over the HV electrode 310. During use, ionizing radiation 60 may enter the scintillation HARP-AMFPI sensor through scintillator 305.

In some configurations, the air gap 300 between the scintillator 305 and the a-Se layer 330 may cause spatial blurring and image degradation. The flash HARP-AMFPI shown in fig. 1C may exhibit poor performance, such as breakdown during operation, when formed at low temperature (i.e., defect-containing) HBL 320.

As will be appreciated, challenges faced by developers of optical and x-ray detectors, such as those described with reference to fig. 1A-1C, as well as solid-state active matrix flat-panel imagers (AMFPIs) including utilizing avalanche a-Se sensors, relate to the possibility of process incompatibility between the amorphous selenium layer and the dielectric layer(s) (i.e., charge blocking layer (s)) used to isolate the a-Se and inhibit charge injection from neighboring electrodes during operation, i.e., dark current injection.

The difficulty is to create a multilayer structure that can withstand high ESe and limit dark current injection from the electrodes. Regardless of the application geometry or ESe requirements, a typical detector structure includes an n-type Hole Blocking Layer (HBL) and a p-type Electron Blocking Layer (EBL) to isolate the a-Se from the positive High Voltage (HV) and negative bias electrodes, respectively, to prevent charge injection.

Desirable materials for the charge blocking layer include semiconducting oxides and polymers. Exemplary oxide layers (e.g., silicon dioxide) are typically deposited by Physical Vapor Deposition (PVD) or Chemical Vapor Deposition (CVD) at least 200 a^°C substrate temperature. In another aspect, the polymer layer may be deposited by solution-based processing, but typically requires elevated temperatures (e.g., greater than 60 degrees f)^°C) an annealing step is performed to remove the solvent and cross-link the polymers.

During fabrication of the comparative detector shown in FIGS. 1A-1C, the charge blocking layer formed over the layer of a-Se must be below the crystallization onset temperature for amorphous selenium (i.e., about 60 deg.C)^°C) Is deposited so as to avoid the formation of polycrystalline aggregates within the amorphous selenium.

As will be appreciated, sub-optimal conditions (i.e., below about 200) are used^°c deposition temperature or curing temperature) results in poor stoichiometry and incorporation of defects into the charge blocking layer that may negatively impact performance or even lead to failure, especially at high ESe. Thus, the performance of the sensors depicted in FIGS. 1A-1C may be subject to a top chargethe deposition temperature of the barrier layer.

According to various embodiments, the fabrication of the multilayer sensor architecture comprising the layer of amorphous selenium comprises forming a first portion of the layer of amorphous selenium over a previously formed first charge blocking layer, i.e. Electron Blocking Layer (EBL), and forming a second portion of the layer of amorphous selenium over a previously formed second charge blocking layer, i.e. Hole Blocking Layer (HBL). The disclosed process delays the formation of the first and second portions of the (temperature sensitive) amorphous selenium layer until after the formation of the respective charge blocking layers. In some embodiments, the charge blocking layer is formed on a separate substrate. This allows the EBL and HBL deposition processes to be performed at relatively high temperatures without adversely affecting the layer(s) of amorphous selenium. An example process may be understood with reference to fig. 2A-2C.

Referring to fig. 2A, a fabrication process flow for a fused selenium sensor according to various embodiments includes forming an Electron Blocking Layer (EBL) 440 over a first substrate 460. The first substrate 460 may include an electronic readout such as a thin film transistor, CMOS transistor, or photon counting sensor. The pixel electrode or pixel electrode array 450 may be disposed over the first substrate 460, e.g., between the first substrate 460 and the EBL 440. A first doped or undoped layer 431 of amorphous selenium having a first thickness (T1) is deposited over the EBL 440.

Separately, referring to fig. 2B, a Hole Blocking Layer (HBL) 420 is formed over the second substrate 405. The second substrate 405 may comprise any substrate suitable for the desired application, including a scintillator, a fiber optic faceplate, glass, or a glass carrier of a (de-bonded) transparent thin polymer for de-bonding. The second substrate 405 may be an electrode substrate including a High Voltage (HV) electrode 410. For example, the HV electrode may comprise indium tin oxide. A second doped or undoped layer 432 of amorphous selenium having a second thickness (T2) is then deposited over HBL 420.

In certain embodiments, the first layer 431 of amorphous selenium and the second layer 432 of amorphous selenium may each be doped. In certain embodiments, the first layer 431 of amorphous selenium and the second layer 432 of amorphous selenium may each be undoped.

Referring to fig. 2C, in a further step, the first layer 431 of amorphous selenium is brought into contact with the second layer 432 of amorphous selenium to form the multilayer structure 400, which is heated at a temperature sufficient to melt the first layer of amorphous selenium to the second layer of amorphous selenium. Can be heated to a temperature higher than the glass transition temperature (T) of amorphous selenium_g) But below its crystallization temperature (T)_c) To complete the melting. The melting temperature will be determined by the glass transition temperature, which depends on the degree of doping of the amorphous selenium layer(s). In certain embodiments, the melting of the first and second layers of amorphous selenium may be accomplished by applying a compressive force. In certain embodiments, the melting may be performed in air or under vacuum (e.g., if the air cavity inhibits uniform melting).

above its glass transition temperature, a-Se becomes a viscous, rubbery binder, allowing the two layers of selenium to be fused together. The soft and flexible state will planarize and remove surface topology in a-Se, which may be caused by deposition imperfections or substrate topology. By melting the first and second layers of amorphous selenium at a temperature below the recrystallization temperature of selenium, the resulting composite (multilayer) structure 431, 432 having a total thickness of T = T1+ T2 may be free of any crystalline phase(s).

In certain embodiments, one or both substrates may be flexible substrates. For example, flexible substrates such as thin glass, phosphor screens, and Mylar (Mylar film) may induce less stress on the a-Se than non-flexible glass substrates, resulting in more uniform melting over large areas.

Applicants have shown that unequal charge transfer of holes and electrons across the melt interface may be beneficial for device performance. Although T1 is equal to T2 in the embodiment illustrated in fig. 2C, the respective thicknesses of the first and second layers of amorphous selenium may be varied to bring the melt interface closer to one of the barrier layers, which may be improved by the barrier properties of the barrier layer.

for example, according to various embodiments, time of flight (TOF) measurements for a single pixel sensor measuring approximately 2cm x 2cm show that holes, which are the predominant charge carrier in a-Se, move across the melt interface. In this case, if electron transport across the molten interface is significantly worse than holes, the thickness of the corresponding a-Se layer may be selected such that T2 is greater than T1, whereby poor transport across the molten interface may contribute to electron blocking. The thickness of T1 may be reduced as long as the substrate topology is planarized and uniform melting can be achieved.

Thus, referring to fig. 3A-3C, according to a further embodiment, the first layer 431 of amorphous selenium has a thickness T1, and the second layer 432 of amorphous selenium has a thickness T2, where T1 is less than T2. In example structures formed by melting two separate layers of amorphous selenium, the thickness of one layer (T1) may be 5% to 200% of the thickness of the other layer (T2), e.g., 5%, 10%, 20%, 50%, 100%, 150%, or 200%, including ranges between any of the foregoing values. For example, the first layer of amorphous selenium and the second layer of amorphous selenium may each have a thickness of 5.4 microns. In a further example, the first layer of amorphous selenium may have a thickness of 10 microns and the second layer of amorphous selenium may have a thickness of 5 microns.

additional methods of fabricating a multilayer sensor include forming a charge blocking layer over a substrate, forming a layer of amorphous selenium over the previously deposited charge blocking layer, and heating the layer of amorphous selenium to fuse the layer of amorphous selenium to the charge blocking layer.

referring to fig. 4A and 4B, an exemplary sensor architecture that may be formed by the melting of separately deposited (i.e., top and bottom) layers of amorphous selenium is shown. The architecture in fig. 4A includes an electrode (e.g., coated with indium tin oxide) glass substrate 660 and a first layer 631 of amorphous selenium formed thereon that has been fused to a high-pressure ITO coated glass substrate 605 via an Indium Gallium Zinc Oxide (IGZO) layer 610 and a second layer 632 of amorphous selenium formed thereon. After forming the foregoing structure, one of the substrates 605, 660 may be removed (e.g., peeled off), if desired. Referring to fig. 4B, a similar structure includes a poly (3, 4-ethylenedioxythiophene) (PEDOT) electrode 650 formed over the surface of the first layer 631 of amorphous selenium.

a measurement system 700 for evaluating a multi-layer sensor is schematically shown in fig. 5. Measurement system 700 includes a power supply 710, a high voltage filter 720, a current amplifier 730, and an oscilloscope 740. The example current amplifier 730 is a Stanford SR570 amplifier. The multi-layer sensor 400 can be mounted between a power supply 710 and an oscilloscope 740 and illuminated with a source of optical radiation (e.g., 500ps, 500nJ laser pulses).

FIG. 6 is a graph of hole time of flight (TOF) versus electric field for an exemplary multi-layer sensor demonstrating charge crossing a fused interface between a first layer and a second layer of amorphous selenium FIG. 7 is a graph of normalized signal versus time for an exemplary multi-layer sensor with 30V (~ 5V/micron) continuous 30Hz excitation demonstrating negligible ghosting, which is a measure of the drop in x-ray sensitivity to the exposed region of the sensor.

According to various embodiments, the charge blocking layer(s) and the read-out electronics may be fabricated at elevated temperatures by depositing the charge blocking layer(s) prior to depositing the amorphous selenium. This process is not limited by the crystallization temperature of a-Se, resulting in the formation of an effective charge blocking layer, which enables improved signal amplification.

The disclosed method can be used to form solid state sensors that are more reliable than vacuum tube based sensors. Moreover, such sensors can be fabricated using existing materials and material deposition techniques. In certain embodiments, unequal charge transfer across the interface between the melted first and second amorphous selenium layers may be advantageous if the interface is in proximity to the blocking layer for the slower charge carriers.

As used herein, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to a "photoconductor layer" includes examples having two or more such "photoconductor layers" unless the context clearly indicates otherwise.

unless explicitly stated otherwise, it is in no way intended that any method set forth herein be construed as requiring that its steps be performed in a specific order. Thus, where a method claim does not actually recite an order to be followed by its steps or it is not otherwise specifically stated in the claims or descriptions that the steps are to be limited to a specific order, it is no way intended that any particular order be inferred. Any recited feature or aspect in any one claim may be combined with or substituted for any other recited feature or aspect in any other claim or claims.

it will be understood that when an element such as a layer, region or substrate is referred to as being formed on, deposited on, or disposed "on" or "over" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly over" another element, there are no intervening elements present.

although the transition phrase "comprising" may be used to disclose various features, elements or steps of a particular embodiment, it is to be understood that alternative embodiments are implied to include those embodiments that may be described using the transition phrase "consisting of … …" or "consisting essentially of … …". Thus, for example, alternative embodiments that imply a photoconductor layer including amorphous selenium include embodiments in which the photoconductor layer consists essentially of amorphous selenium and embodiments in which the photoconductor layer consists of amorphous selenium.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention. Since modifications, combinations, sub-combinations and variations of the disclosed embodiments incorporating the spirit and substance of the invention may occur to persons skilled in the art, the invention should be construed to include everything within the scope of the appended claims and their equivalents.