阅读说明：本技术 Crm升压型pfc变换器电容效应补偿电路和补偿方法 (CRM boost PFC converter capacitance effect compensation circuit and compensation method ) 是由 任小永 周玉婷 陈乾宏 张之梁 张璟飞 徐子梁 李梦睿 于 2019-09-26 设计创作，主要内容包括：本发明公开了一种CRM升压型PFC变换器电容效应的补偿电路和补偿方法,属于电能变换范畴。本发明考虑功率开关器件寄生电容的非线性和输入滤波电容对输入电流畸变的影响,在变化导通时间控制的基础上,采用一种随输入电压变化的变参数控制方法以减小功率器件的非线性寄生电容对输入电流THD的影响；采用一种输入滤波电容补偿方法以改善输入电流THD。本发明所提出的CRM升压型PFC变换器的电容效应补偿策略通过实时改变导通时间以补偿功率开关器件寄生电容的非线性及输入滤波电容带来的输入电流畸变,只需在数字控制方面进行修改,无需增加额外的补偿电路,能够有效降低输入电流THD。(the invention discloses a compensation circuit and a compensation method for a capacitance effect of a CRM boost PFC converter, and belongs to the field of electric energy conversion. The invention considers the influence of the nonlinearity of parasitic capacitance of a power switch device and the distortion of input current caused by an input filter capacitor, and adopts a variable parameter control method which changes along with input voltage on the basis of the control of the variable conduction time so as to reduce the influence of the nonlinear parasitic capacitance of the power switch device on the input current THD; an input filter capacitance compensation method is used to improve the input current THD. The capacitance effect compensation strategy of the CRM boost PFC converter provided by the invention compensates the nonlinearity of the parasitic capacitance of the power switch device and the input current distortion caused by the input filter capacitance by changing the conduction time in real time, only needs to be modified in the aspect of digital control, does not need to add an additional compensation circuit, and can effectively reduce the input current THD.)

1. a CRM boost PFC converter capacitance effect compensation circuit is characterized in that: comprises a main power circuit and a control circuit;

The main power circuit comprises an EMI filter, a rectifier bridge, an input filter capacitor, a boost inductor, a switching tube, a fly-wheel diode, an output capacitor and a load, wherein both ends of the switching tube and the fly-wheel diode are respectively connected with a parasitic capacitor of the switching tube and a parasitic capacitor of a diode;

The control circuit comprises an input voltage differential sampling circuit, an inductive current zero-crossing detection circuit, an output voltage sampling circuit, a modulation wave signal generation circuit, a switching tube turn-off signal generation circuit and a driving signal generation circuit; the modulation wave signal generating circuit comprises a digital-to-analog converter and a digital controller, wherein the input end of the digital-to-analog converter is connected with the digital controller, and the output end of the digital-to-analog converter is connected with the switching tube turn-off signal generating circuit; the input end of the input voltage differential sampling circuit is connected with the input end of the EMI filter, and the output end of the input voltage differential sampling circuit is connected with the digital controller; the inductive current zero-crossing detection circuit comprises a hysteresis comparator and an auxiliary winding coupled with a boost inductor, wherein the input end of the hysteresis comparator is connected with the auxiliary winding, and the output end of the hysteresis comparator is connected with the driving signal generation circuit; the input end of the output voltage sampling circuit is connected with two ends of a load, and the output end of the output voltage sampling circuit is connected with the digital controller; the switching tube turn-off signal generating circuit comprises a comparator and a sawtooth wave generating circuit, wherein two input ends of the comparator are respectively connected with the output end of the sawtooth wave generating circuit and the output end of the digital/analog converter, and the output end of the comparator is connected with the driving signal generating circuit; and the output end of the driving signal generating circuit is connected with the grid source electrode of the switching tube.

2. the CRM boost PFC converter capacitance effect compensation circuit of claim 1, wherein: the input end of the EMI filter is connected with an input power supply, the output end of the EMI filter is connected with the input end of a rectifier bridge, the output end of the rectifier bridge is connected with two ends of an input filter capacitor, one end of the input filter capacitor is connected with one end of a boosting inductor, the other end of the boosting inductor is respectively connected with a drain electrode of a switch tube and one end of a fly-wheel diode, the other end of the fly-wheel diode is connected with one end of a load, the other end of the load is respectively connected with a source electrode of the switch tube and the other end of the input filter.

3. The CRM boost PFC converter capacitance effect compensation circuit of claim 2, wherein: the TMS320F28335 chip is adopted by the digital controller, the digital controller is provided with a first analog/digital conversion interface and a second analog/digital conversion interface, and the first analog/digital conversion interface and the second analog/digital conversion interface are respectively connected with the output end of the output voltage sampling circuit and the output end of the input voltage differential sampling circuit.

4. the CRM boost PFC converter capacitance effect compensation circuit of claim 3, wherein: the driving signal generating circuit comprises an RS trigger and a switching tube driving circuit, wherein the R end of the RS trigger is connected with the output end of the switching tube turn-off signal generating circuit, the S end of the RS trigger is connected with the output end of the inductive current zero-crossing detection circuit, the output end of the RS trigger is connected with the switching tube driving circuit, and the switching tube driving circuit adopts a single-channel high-speed low-side MOSFET grid driving chip.

5. A compensation method for capacitance effect of CRM boost PFC converter, which adopts the compensation circuit of claim 4, and is characterized by comprising the following steps:

Step one, respectively sampling an input voltage signal vin at the front side of an EMI filter and output voltage signals Vo at two ends of a load through a first analog/digital conversion interface and a second analog/digital conversion interface of a digital controller to obtain an input voltage sampling value and an output voltage sampling value;

Step two, comparing the output voltage sampling value with an output voltage reference Vref to obtain an error signal delta Vo, and generating a constant part Tonerror of the conduction time ton (t) through a voltage PI ring;

Step three, constructing an equivalent parasitic capacitance Ceq (vin) which changes along with the input voltage vin:

C(v)＝pv+q

wherein p is the slope and q is the intercept;

Step four, calculating the input filter capacitor current icom (t) to be compensated:

wherein Ccom is a compensated capacitance value, Ts is a sampling period of an analog/digital converter of the digital controller, vin [ i ] is an input voltage sampling value of the current sampling period, and vin [ i-1] is an input voltage sampling value of the previous sampling period;

step five, calculating the conducting time ton (t) of the added variable parameter compensation and the input filter capacitor current compensation in real time:

Step six, converting the on-time ton (t) into a voltage Vcomp:

V＝kT

Wherein k is the slope of the sawtooth wave signal;

Vcomp is output to the digital-to-analog converter through the digital controller to generate a modulation wave signal, and the on-time of the switching tube is controlled in real time after the modulation wave signal is compared with the sawtooth wave signal.

6. the CRM boost PFC converter capacitance effect compensation method of claim 5, wherein: in the first step, the input voltage sampling value and the output voltage sampling value are vin/Kin and Vo/Ko respectively, wherein Kin is an input voltage division coefficient, and Ko is an output voltage division coefficient.

Technical Field

The invention relates to a capacitance effect compensation strategy of a CRM boost PFC converter, and belongs to the technical field of power conversion.

background

with the rapid development of power electronic devices, a large amount of harmonic current is injected into a power grid, and the power grid has serious harmonic pollution. For this reason, current harmonic standards such as EN61000-3-2, IEC555-2, etc. are successively issued and revised by the International electrotechnical Commission, and the current harmonic standards to be satisfied by AC-DC converters of different power classes are clearly specified. The Power Factor Correction (PFC) technology can improve the Power Factor (PF) of the AC-DC converter and reduce the Total Harmonic Distortion (THD) of the input current, and has been widely used to reduce the harmonic pollution of the electronic device to the power grid, wherein the active PFC technology is the mainstream of the PFC technology due to its advantages of light volume and weight, good harmonic suppression capability, and the like. A critical continuous mode (CRM) boost PFC converter has become the most common topology for a single-phase PFC converter due to its advantages of small input current ripple and simple control.

The power switch device itself has a parasitic capacitance that varies non-linearly with the voltage across the switch device. Existing control strategies equate this parasitic capacitance to a constant value, ignoring the non-linearity of the parasitic capacitance, which results in control strategies that produce errors with limited improvement in input current THD. In addition, the presence of the input filter capacitor leads the input current and the input current is distorted near the zero crossing due to the unidirectional conductivity of the diode rectifier bridge. The distortion phenomenon is worsened along with the increase of the frequency of an input voltage line and the reduction of load, which can cause the increase of the input current THD, and the increase of the input current THD is more obvious especially under the condition of wide frequency conversion input (360-800 Hz).

Disclosure of Invention

The invention provides a capacitance effect compensation circuit and a capacitance effect compensation method aiming at nonlinearity of parasitic capacitance of a CRM boost PFC converter power switch device and input current distortion caused by an input filter capacitor.

in order to achieve the purpose, the technical scheme provided by the invention is as follows: a CRM boost PFC converter capacitance effect compensation circuit is characterized in that: comprises a main power circuit and a control circuit;

The main power circuit comprises an EMI filter, a rectifier bridge, an input filter capacitor, a boost inductor, a switching tube, a fly-wheel diode, an output capacitor and a load, wherein both ends of the switching tube and the fly-wheel diode are respectively connected with a parasitic capacitor of the switching tube and a parasitic capacitor of a diode;

The control circuit comprises an input voltage differential sampling circuit, an inductive current zero-crossing detection circuit, an output voltage sampling circuit, a modulation wave signal generation circuit, a switching tube turn-off signal generation circuit and a driving signal generation circuit; the modulation wave signal generating circuit comprises a digital-to-analog converter and a digital controller, wherein the input end of the digital-to-analog converter is connected with the digital controller, and the output end of the digital-to-analog converter is connected with the switching tube turn-off signal generating circuit; the input end of the input voltage differential sampling circuit is connected with the input end of the EMI filter, and the output end of the input voltage differential sampling circuit is connected with the digital controller; the inductive current zero-crossing detection circuit comprises a hysteresis comparator and an auxiliary winding coupled with a boost inductor, wherein the input end of the hysteresis comparator is connected with the auxiliary winding, and the output end of the hysteresis comparator is connected with the driving signal generation circuit; the input end of the output voltage sampling circuit is connected with two ends of a load, and the output end of the output voltage sampling circuit is connected with the digital controller; the switching tube turn-off signal generating circuit comprises a comparator and a sawtooth wave generating circuit, wherein two input ends of the comparator are respectively connected with the output end of the sawtooth wave generating circuit and the output end of the digital/analog converter, and the output end of the comparator is connected with the driving signal generating circuit; and the output end of the driving signal generating circuit is connected with the grid source electrode of the switching tube.

The technical scheme is further designed as follows: the input end of the EMI filter is connected with an input power supply, the output end of the EMI filter is connected with the input end of a rectifier bridge, the output end of the rectifier bridge is connected with two ends of an input filter capacitor, one end of the input filter capacitor is connected with one end of a boosting inductor, the other end of the boosting inductor is respectively connected with a drain electrode of a switch tube and one end of a fly-wheel diode, the other end of the fly-wheel diode is connected with one end of a load, the other end of the load is respectively connected with a source electrode of the switch tube and the other end of the input filter.

The TMS320F28335 chip is adopted by the digital controller, the digital controller is provided with a first analog/digital conversion interface and a second analog/digital conversion interface, and the first analog/digital conversion interface and the second analog/digital conversion interface are respectively connected with the output end of the output voltage sampling circuit and the output end of the input voltage differential sampling circuit.

The driving signal generating circuit comprises an RS trigger and a switching tube driving circuit, wherein the R end of the RS trigger is connected with the output end of the switching tube turn-off signal generating circuit, the S end of the RS trigger is connected with the output end of the inductive current zero-crossing detecting circuit, and the RS output end of the RS trigger is connected with the switching tube driving circuit; the switching tube driving circuit adopts a single-channel high-speed low-side grid electrode driving chip.

a CRM boost PFC converter capacitance effect compensation method adopts the compensation circuit of the technical scheme, and comprises the following steps:

The method comprises the steps that firstly, an input voltage signal vin at the front side of an EMI filter and an output voltage signal Vo at two ends of a load are respectively sampled through a first analog-digital conversion interface and a second analog-digital conversion interface of a digital controller, and an input voltage sampling value and an output voltage sampling value are respectively vin/Kin and Vo/Ko, wherein Kin is an input voltage division coefficient, and Ko is an output voltage division coefficient;

Step two, comparing the output voltage sampling value with an output voltage reference Vref to obtain an error signal delta Vo, and generating a constant part Tonerror of the conduction time ton (t) through a voltage PI ring;

step three, constructing an equivalent parasitic capacitance Ceq (vin) which changes along with the input voltage vin:

C(v)＝pv+q

wherein p is the slope and q is the intercept;

Step four, calculating the input filter capacitor current icom (t) to be compensated:

ccom is a compensated capacitance value, the value calculates the input current THD under different compensated capacitance values through theory, the corresponding compensated capacitance value when the input current THD is minimum is taken, Ts is the sampling period of the digital controller analog/digital converter, vin [ i ] is the input voltage sampling value of the current sampling period, vin [ i-1] is the input voltage sampling value of the previous sampling period;

step five, calculating the conducting time ton (t) of the added variable parameter compensation and the input filter capacitor current compensation in real time:

step six, converting the on-time ton (t) into a voltage Vcomp:

V＝kT

wherein k is the slope of the sawtooth wave signal;

Vcomp is output to the digital-to-analog converter through the digital controller to generate a modulation wave signal, and the on-time of the switching tube is controlled in real time after the modulation wave signal is compared with the sawtooth wave signal.

compared with the prior art, the invention has the following beneficial effects:

1. the capacitance effect compensation strategy of the CRM boost PFC converter provided by the invention can effectively improve the nonlinearity of parasitic capacitance of a power switching tube and the input current distortion caused by input filter capacitance current.

2. the capacitance effect compensation strategy provided by the invention compensates the nonlinearity of the parasitic capacitance of the power switch device and the input current distortion caused by the input filter capacitance by changing the conduction time in real time, and only needs to be modified in the aspect of digital control without adding an additional compensation circuit.

3. The capacitance effect compensation strategy of the CRM boost PFC converter provided by the invention is suitable for occasions with higher harmonic wave requirements, especially for wide-frequency-conversion 360-800 Hz input occasions, and can obtain lower input current THD through variable parameter control and input filter capacitance current compensation.

Drawings

fig. 1 is a main power circuit of a CRM boost PFC converter;

Fig. 2 is a circuit diagram of a capacitance effect compensation circuit of the CRM boost PFC converter of the present invention;

FIG. 3 is a control flow diagram of the capacitance effect compensation method of the present invention;

Fig. 4 is a comparison graph of THD measurements at different output powers using the capacitance effect compensation method of the present invention versus no capacitance effect compensation method.

in the above drawings: vin — input voltage; iin — input current at the front side of the EMI filter; | iin | -input current at the rear side of the rectifier bridge; iL — inductor current; iC — input filter capacitor current; cin — input filter capacitance; vcin is voltage at two ends of an input filter capacitor; lb-boost inductance; qb-switch tube; coss — switching tube parasitic capacitance; db-freewheeling diode; cdp — freewheeling diode parasitic capacitance; cout is the output capacitance; vo — output voltage; RL-load resistance; kin-input voltage division coefficient; ko-output voltage division coefficient; vin/Kin-input voltage sample value; Vo/Ko-output voltage sample value; vref is the output voltage reference; Δ Vo — voltage error signal; vcomp — modulated wave signal; vref _ DC — DC voltage reference; ramp-sawtooth signal; tonerror-error on time; ADC1, ADC 2-analog-to-digital converter; DAC-digital-to-analog converter.

Detailed Description

the invention is described in detail below with reference to the figures and the specific embodiments.