阅读说明：本技术 一种基于虚拟矢量的并联pwm整流器环流抑制方法 (Parallel PWM rectifier circulating current restraining method based on virtual vector ) 是由 於锋 刘兴 李凯凯 朱志豪 于 2019-10-12 设计创作，主要内容包括：本发明公开了一种基于虚拟矢量的并联PWM整流器环流抑制方法,根据矢量合成原理,将基本电压矢量两两合成,得到6个虚拟非零矢量与1个虚拟零矢量,进而采用基于虚拟矢量的模型预测电流控制算法实现并联PWM整流器的直流侧电压输出稳定、网侧电流正弦、单位功率因数以及零序环流抑制等控制要求。与常规方法不同的是,该方法无需增加硬件装置与闭环控制即可有效抑制零序环流,解决环流引起的输入电流畸变与不平衡等问题,提高系统可靠性和效率。(the invention discloses a virtual vector-based circulation suppression method for a parallel PWM (pulse-width modulation) rectifier, which is characterized in that basic voltage vectors are pairwise synthesized according to a vector synthesis principle to obtain 6 virtual non-zero vectors and 1 virtual zero vector, and further, a model prediction current control algorithm based on the virtual vectors is adopted to realize the control requirements of stable direct-current side voltage output, net side current sine, unit power factor, zero-sequence circulation suppression and the like of the parallel PWM rectifier. Compared with the conventional method, the method can effectively inhibit zero-sequence circulating current without adding hardware devices and closed-loop control, solves the problems of input current distortion, unbalance and the like caused by the circulating current, and improves the reliability and efficiency of the system.)

1. a parallel PWM rectifier circulating current restraining method based on virtual vectors is characterized by comprising the following steps:

step 1: in each control period, sampling the output voltage udc of the direct current side, and calculating a d-axis current reference value id 1/id 2 of the rectifier grid side in real time through a voltage PI controller;

Step 2: sampling three-phase voltage eabc on the network side, obtaining a phase angle theta and d/q-axis voltage ed/eq on the network side of a rectifier through a phase-locked loop module, sampling input currents iabc1 and iabc2 on alternating current sides of a VSR1 and a VSR2, and calculating current dq-axis components id1/iq1 and id2/iq2 through PARK conversion;

and step 3: respectively substituting 7 virtual vectors into a prediction model, and online calculating input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next moment; wherein the 7 virtual vectors include a virtual zero vector [ 0.50.50.5 ] and 6 virtual non-zero vectors [ 10.50 ], [ 0.510 ], [ 010.5 ], [ 00.51 ], [ 0.501 ], [ 100.5 ];

and 4, step 4: constructing cost functions g1 and g2 according to the control target:

And optimizing the value functions g1 and g2 through a value function minimizing module, and sending the three-phase bridge arm duty ratio corresponding to the virtual vector which enables the value function to be minimum to the three-phase bridge arm of the VSR1 and the VSR2, so that an expected switching sequence is obtained, and the grid-side current tracking reference value of the parallel PWM rectifier is controlled.

2. The virtual vector-based parallel PWM rectifier circulating current suppression method according to claim 1, wherein: in the step 1, the calculation method of id 1/id 2 of the grid-side d-axis current reference value is as follows: inputting the difference value eu between the reference voltage and the output voltage udc of the direct current side into a voltage PI controller, and obtaining a grid side d-axis current reference value id 1/id 2 according to a formula (1);

In the formula, kp and ki are respectively proportional gain and integral gain of the voltage PI controller, s is a complex variable, K is a current distribution coefficient, and 0< K < 1.

3. The virtual vector-based parallel PWM rectifier circulating current suppression method according to claim 1, wherein: in step 3, the input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next time are calculated by: inputting the ed/eq, id1/iq1 and id2/iq2 into a prediction model shown as the formula (2) for calculation;

in the formula, Ts is a sampling period, ω is a grid-side voltage angular frequency, L1 is a VSR1 filter inductance value, R1 is a VSR1 filter inductance internal resistance, L2 is a VSR2 filter inductance value, R2 is a VSR2 filter inductance internal resistance, ud1(k)/uq1(k) is a component of a virtual voltage vector applied to the VSR1 in a dq coordinate system, and ud2(k)/uq2(k) is a component of a virtual vector applied to the VSR2 in the dq coordinate system.

4. the virtual vector-based parallel PWM rectifier circulating current suppression method according to claim 1, wherein: the virtual zero vector [ 0.50.50.5 ] is synthesized by two zero voltage vectors [ 000 ] and [ 111 ], the virtual non-zero vector [ 10.50 ] is synthesized by two non-zero voltage vectors [ 100 ] and [ 110 ], the virtual non-zero vector [ 0.510 ] is synthesized by two non-zero voltage vectors [ 110 ] and [ 010 ], the virtual non-zero vector [ 010.5 ] is synthesized by two non-zero voltage vectors [ 010 ] and [ 011 ], the virtual non-zero vector [ 00.51 ] is synthesized by two non-zero voltage vectors [ 011 ] and [ 001 ], the virtual non-zero vector [ 0.501 ] is synthesized by two non-zero voltage vectors [ 001 ] and [ 101 ], and the virtual non-zero vector [ 100.5 ] is synthesized by two non-zero voltage vectors [ 101 ] and [ 100 ]; wherein, two voltage vectors used for synthesizing the virtual vector act 0.5Ts in a control period Ts respectively; 1, 0.5 and 0 represent duty cycles of 100%, 50% and 0%.

Technical Field

The invention belongs to the field of power electronic application, and particularly relates to a parallel PWM rectifier circulating current restraining method based on a virtual vector.

Background

the parallel PWM rectifier is widely applied to the field of high-power application to meet the requirement of large current, improve the rated power, reliability and efficiency of a system, and has the advantages of low cost, high flexibility and the like. However, the design that the common direct current bus and the alternating current side are directly connected in parallel forms a zero sequence circulating current path, and when hardware parameters or control effect differences exist between the parallel modules, a control system can generate zero sequence circulating current. The zero sequence circulating current brings extra switching loss, leads to inductance saturation and causes network side current distortion, and the power switching tube is heated seriously and even leads to burning of the power switching tube while the system efficiency is reduced. Therefore, the circulating current suppression has become a research hotspot of the parallel PWM rectifier.

In order to inhibit the zero sequence circulation of the system, domestic and foreign scholars propose various control schemes, but most of the control schemes are carried out around a space vector modulation algorithm. The model predictive control has the advantages of simple control idea, fast dynamic response, easy realization of multi-target control and the like, and is widely concerned by the students. However, few scholars use model predictive control to control the zero sequence circulating current that exists in a parallel PWM rectifier system. In addition, the adoption of model prediction control for inhibiting zero-sequence circulating current inevitably brings extra computational burden to the controller. Therefore, the parallel PWM rectifier model predictive control system capable of improving the circulation control precision and reducing the calculation time of the processor has wide application prospect.

disclosure of Invention

the purpose of the invention is as follows: in view of the above prior art, a virtual vector-based parallel PWM rectifier circulating current suppression method is provided for circulating current suppression of a parallel rectifier.

The technical scheme is as follows: a parallel PWM rectifier circulating current restraining method based on virtual vectors comprises the following steps:

Step 1: in each control period, sampling the output voltage udc of the direct current side, and calculating a d-axis current reference value id 1/id 2 of the rectifier grid side in real time through a voltage PI controller;

step 2: sampling three-phase voltage eabc on the network side, obtaining a phase angle theta and d/q-axis voltage ed/eq on the network side of a rectifier through a phase-locked loop module, sampling input currents iabc1 and iabc2 on alternating current sides of a VSR1 and a VSR2, and calculating current dq-axis components id1/iq1 and id2/iq2 through PARK conversion;

And step 3: respectively substituting 7 virtual vectors into a prediction model, and online calculating input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next moment; wherein the 7 virtual vectors include a virtual zero vector [ 0.50.50.5 ] and 6 virtual non-zero vectors [ 10.50 ], [ 0.510 ], [ 010.5 ], [ 00.51 ], [ 0.501 ], [ 100.5 ];

and 4, step 4: constructing cost functions g1 and g2 according to the control target:

and optimizing the value functions g1 and g2 through a value function minimizing module, and sending the three-phase bridge arm duty ratio corresponding to the virtual vector which enables the value function to be minimum to the three-phase bridge arm of the VSR1 and the VSR2, so that an expected switching sequence is obtained, and the grid-side current tracking reference value of the parallel PWM rectifier is controlled.

Further, in step 1, the calculation method of id 1/id 2 of the grid-side d-axis current reference value is as follows: inputting the difference value eu between the reference voltage ud c and the output voltage ud c of the direct current side into a voltage PI controller, and obtaining a d-axis current reference value id 1/id 2 of the grid side according to a formula (1);

in the formula, kp and ki are respectively proportional gain and integral gain of the voltage PI controller, s is a complex variable, K is a current distribution coefficient, and 0< K < 1.

Further, in step 3, the input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next time are calculated by: inputting the ed/eq, id1/iq1 and id2/iq2 into a prediction model shown as the formula (2) for calculation;

In the formula, Ts is a sampling period, ω is a grid-side voltage angular frequency, L1 is a VSR1 filter inductance value, R1 is a VSR1 filter inductance internal resistance, L2 is a VSR2 filter inductance value, R2 is a VSR2 filter inductance internal resistance, ud1(k)/uq1(k) is a component of a virtual voltage vector applied to the VSR1 in a dq coordinate system, and ud2(k)/uq2(k) is a component of a virtual vector applied to the VSR2 in the dq coordinate system.

further, the virtual zero vector [ 0.50.50.5 ] is synthesized by two zero voltage vectors [ 000 ] and [ 111 ], the virtual non-zero vector [ 10.50 ] is synthesized by two non-zero voltage vectors [ 100 ] and [ 110 ], the virtual non-zero vector [ 0.510 ] is synthesized by two non-zero voltage vectors [ 110 ] and [ 010 ], the virtual non-zero vector [ 010.5 ] is synthesized by two non-zero voltage vectors [ 010 ] and [ 011 ], the virtual non-zero vector [ 00.51 ] is synthesized by two non-zero voltage vectors [ 011 ] and [ 001 ], the virtual non-zero vector [ 0.501 ] is synthesized by two non-zero voltage vectors [ 001 ] and [ 101 ], and the virtual non-zero vector [ 100.5 ] is synthesized by two non-zero voltage vectors [ 101 ] and [ 100 ]; wherein, two voltage vectors used for synthesizing the virtual vector act 0.5Ts in a control period Ts respectively; 1, 0.5 and 0 represent duty cycles of 100%, 50% and 0%.

Has the advantages that: the invention relates to a virtual vector-based circulation suppression method for a parallel PWM (pulse-width modulation) rectifier, which is characterized in that basic voltage vectors are pairwise synthesized according to a vector synthesis principle to obtain 6 virtual non-zero vectors and 1 virtual zero vector, and further, a model prediction current control algorithm based on the virtual vectors is adopted to realize the control requirements of stable direct-current side voltage output, net side current sine, unit power factor, zero-sequence circulation suppression and the like of the parallel PWM rectifier. Compared with the conventional method, the method can effectively inhibit zero-sequence circulating current without adding hardware devices and closed-loop control, solves the problems of input current distortion, unbalance and the like caused by the circulating current, and improves the reliability and efficiency of the system. The method has the following specific advantages:

1) by the method, zero-sequence circulating current can be effectively inhibited, and the efficiency and reliability of the system are improved;

2) By adopting a model prediction algorithm based on a virtual vector, the switching frequency can be fixed, and the steady-state performance of the system is improved;

3) The model predictive control algorithm can effectively improve the dynamic performance of the system and the tracking precision of the network side current;

4) zero-sequence circulation can be effectively inhibited without adding any extra hardware and adopting closed-loop control, so that a control system is simplified, and the system cost is favorably reduced;

5) the zero-sequence circulating current can be effectively inhibited under various working conditions by directly starting from the inhibiting circulating current path.

drawings

FIG. 1 is a schematic diagram of a virtual vector-based circulation suppression method for a parallel PWM rectifier, wherein a 1-direct current side capacitor and load parallel module, a 2-PI controller, a 3-grid side three-phase voltage, a 4-phase-locked loop module, a 5-VSR1, a 6-VSR2, a 7-VSR1 three-phase alternating current, an 8-VSR2 three-phase alternating current, 9-PARK conversion, a 10-virtual vector, an 11-prediction model and a 12-cost function minimization module are included in the schematic diagram;

FIG. 2 is a virtual vector synthesis scheme in the parallel PWM rectifier circulating current suppression method based on virtual vectors according to the present invention;

Fig. 3 shows a grid-side a-phase voltage grid of the virtual vector-based parallel PWM rectifier loop suppression method of the present invention, where the VSR1 ac current ia1, the VSR1 ac current ia2, the grid-side input current ia, and the loop iz waveform, where L1 is 2mH, L2 is 5mH, and the current distribution coefficient K is 0.5;

Fig. 4 shows a grid-side a-phase voltage grid of the virtual vector-based parallel PWM rectifier loop suppression method of the present invention, where the VSR1 ac current ia1, the VSR1 ac current ia2, the grid-side input current ia, and the loop iz waveform, where L1 is 5mH, L2 is 5mH, and the current distribution coefficient K is 0.3;

Fig. 5 shows a grid-side a-phase voltage grid of the parallel PWM rectifier circulation suppression method based on virtual vectors, VSR1 ac current ia1, VSR1 ac current ia2, grid-side input current ia, and circulation iz waveform, where L1 is 2mH, L2 is 5mH, and current distribution coefficient K is 0.3.

Detailed Description

The invention is further explained below with reference to the drawings.

A parallel PWM rectifier circulating current restraining method based on virtual vectors is shown in a schematic diagram of fig. 1 and comprises the following steps:

step 1: in each control period, sampling the output voltage udc of the direct current side, inputting the difference value eu between the reference voltage ud & ltc & gt and the actual voltage udc into a voltage PI controller, and obtaining a grid-side current reference value id1 & ltid 2 & gt according to a formula (1):

in the formula, kp and ki are respectively proportional gain and integral gain of the voltage PI controller, s is a complex variable, K is a current distribution coefficient, and 0< K < 1.

step 2: the grid side three-phase voltage eabc is sampled, a phase angle theta and a rectifier grid side d/q axis voltage ed/eq are obtained through a phase-locked loop module, input currents iabc1 and iabc2 on alternating current sides of a VSR1 and a VSR2 are sampled, and current dq axis components id1/iq1 and id2/iq2 are calculated through PARK conversion.

And step 3: and (3) respectively substituting the 7 virtual vectors into a prediction model, and online calculating input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next moment.

Wherein, the 7 virtual vectors comprise a virtual zero vector [ 0.50.50.5 ] and 6 virtual non-zero vectors [ 10.50 ], [ 0.510 ], [ 010.5 ], [ 00.51 ], [ 0.501 ], [ 100.5 ]. As shown in FIG. 2, virtual zero vector [ 0.50.50.5 ] is synthesized from two zero voltage vectors [ 000 ] and [ 111 ], virtual non-zero vector [ 10.50 ] is synthesized from two non-zero voltage vectors [ 100 ] and [ 110 ], virtual non-zero vector [ 0.510 ] is synthesized from two non-zero voltage vectors [ 110 ] and [ 010 ], virtual non-zero vector [ 010.5 ] is synthesized from two non-zero voltage vectors [ 010 ] and [ 011 ], virtual non-zero vector [ 00.51 ] is synthesized from two non-zero voltage vectors [ 011 ] and [ 001 ], virtual non-zero vector [ 0.501 ] is synthesized from two non-zero voltage vectors [ 001 ] and [ 101 ], and virtual non-zero vector [ 100.5 ] is synthesized from two non-zero voltage vectors [ 101 ] and [ 100 ]. The two voltage vectors for synthesizing the virtual vector are each applied to 0.5Ts in one control period Ts, and 1, 0.5 and 0 represent duty ratios of 100%, 50% and 0%.

The input current dq axis components id1(k +1)/iq1(k +1) and id2(k +1)/iq2(k +1) at the next time are calculated by the following method: inputting ed/eq, id1/iq1 and id2/iq2 into a prediction model shown as a formula (2) to obtain the prediction model;

In the formula, Ts is a sampling period, ω is a grid-side voltage angular frequency, L1 is a VSR1 filter inductance value, R1 is a VSR1 filter inductance internal resistance, L2 is a VSR2 filter inductance value, R2 is a VSR2 filter inductance internal resistance, ud1(k)/uq1(k) is a component of a virtual voltage vector applied to the VSR1 in a dq coordinate system, and ud2(k)/uq2(k) is a component of a virtual vector applied to the VSR2 in the dq coordinate system.

And 4, step 4: constructing cost functions g1 and g2 according to the control target:

And optimizing the value functions g1 and g2 through a value function minimizing module, and sending the three-phase bridge arm duty ratio corresponding to the virtual vector which enables the value function to be minimum to the three-phase bridge arm of the VSR1 and the VSR2, so that an expected switching sequence is obtained, and the grid-side current tracking reference value of the parallel PWM rectifier is controlled.

the invention adopts a model prediction control method based on the virtual vector, and can effectively inhibit zero-sequence circulation generated by hardware parameter or control effect difference between parallel modules. Specifically, the method comprises the following steps:

The positive direction of the circulating current is defined as flowing from the VSR1 to the VSR2, and the circulating current flows back to the basic voltage equation according to the kirchhoff voltage law:

In the formula, iz is a zero-sequence circulating current, and dj1 and dj2(j ═ a, b, c) are duty ratios of three-phase bridge arms VSR1 and VSR2, respectively.

According to the definition of the virtual vectors in the present invention, dj1 and dj2 have only 100%, 50% and 0%, and the combination of any two virtual vectors satisfies the following relationship:

by combining the mathematical model of the circulation shown in equation (3), it is clear that the following can be concluded: by adopting the model prediction control based on the virtual vector, the average value of the zero-sequence circulating current can be ensured to be 0 in any control period, and the zero-sequence circulating current is further effectively inhibited.

when L1 is 2mH, L2 is 5mH, and the current distribution coefficient K is 0.5, the loop current suppression method of the parallel PWM rectifier based on the virtual vector disclosed by the present invention is implemented, the grid side a-phase voltage grid, the VSR1 ac current ia1, the VSR1 ac current ia2, the grid side input current ia, and the loop current iz waveform are as shown in fig. 3, it can be seen that when there is an imbalance in hardware parameters, the grid side voltage and the current are substantially in phase, the system operates in the state of unit power factor, and the zero sequence loop current is substantially 0, so that good suppression is obtained.

when L1 is L2 is 5mH and the current distribution coefficient K is 0.3, the method for restraining the circulation of the parallel PWM rectifier based on the virtual vector disclosed by the present invention is implemented, the grid-side a-phase voltage grid, the VSR1 ac current ia1, the VSR1 ac current ia2, the grid-side input current ia and the circulation iz waveform are shown in fig. 4, it can be seen that when the power requirement of the parallel rectifier is unbalanced, the grid-side voltage and the current are still in phase, the system operates in the state of unit power factor, and the zero-sequence circulation achieves a good restraining effect.

when L1 is 2mH, L2 is 5mH, and the current distribution coefficient K is 0.3, the virtual vector-based parallel PWM rectifier loop current suppression method disclosed by the invention is implemented, the grid-side a-phase voltage power grid, the VSR1 alternating current ia1, the VSR1 alternating current ia2, the grid-side input current ia and the loop current iz waveform are shown in fig. 5, it can be seen that even if the hardware parameters and the parallel rectifier power requirement are unbalanced, the system can also operate in a unit power factor state and the zero-sequence loop current is suppressed to 0, and the effectiveness of the disclosed loop current suppression method is verified.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.