阅读说明：本技术 晶粒处理 (Grain processing ) 是由 赛普里恩·艾米卡·乌佐 于 2018-04-02 设计创作，主要内容包括：代表性实施方式提供用于处理集成电路(IC)晶粒的技术及系统。经制备用于紧密的表面结合(至其他晶粒、至基板、至另一表面等)的晶粒可运用最小处置来处理,以防止该些晶粒的表面或边缘的污染。该些技术包括当该些晶粒在切割片或其他装置处理膜或表面上时处理晶粒。系统包括经配置以同时执行多个清洁程序的整合式清洁组件。(Representative embodiments provide techniques and systems for processing Integrated Circuit (IC) dies. Dies prepared for tight surface bonding (to other dies, to a substrate, to another surface, etc.) can be processed with minimal handling to prevent contamination of the surfaces or edges of the dies. These techniques include processing the dice while they are on a dicing sheet or other device processing film or surface. The system includes an integrated cleaning assembly configured to perform a plurality of cleaning procedures simultaneously.)

1. A method of forming a microelectronic assembly, comprising:

Providing a protective layer on one or both surfaces of a substrate;

securing the substrate to a carrier;

Singulating the substrate into a number of dies secured to the carrier;

processing at least a first surface of the dice while the dice are secured to the carrier;

Cutting the carrier around a perimeter of a first die, the cutting forming a portion of the carrier secured to a second surface of the first die;

Removing the first die from the number of dies while the portion of the carrier is secured to the second surface of the first die; and

Attaching the first die to a prepared surface of a substrate, the first surface of the first die being attached to the prepared surface of the substrate.

2. the method of claim 1, further comprising:

cleaning at least the first surface of the die while the die is secured to the carrier;

plasma activating the first surface of the die while the die is secured to the carrier; and

Re-cleaning at least the first surface of the die while the die is secured to the carrier.

3. The method of claim 1, further comprising thermally treating the first die and the substrate to bond the first surface of the first die to the prepared surface of the substrate.

4. the method of claim 1, further comprising:

Cleaning the second surface of the first die;

Plasma activating the second surface of the first crystal grain;

cutting the carrier around a perimeter of a second die, the cutting forming another portion of the carrier secured to a second surface of the second die;

Removing the second die from the number of dies while another portion of the carrier is secured to the second surface of the second die;

attaching a first surface of the second die to the second surface of the first die to form a stacked die configuration; and

Thermally treating the stacked die arrangement.

5. The method of claim 1, further comprising stamping one or more additional dies from the carrier, attaching the one or more additional dies to the second die, and to each subsequent die to form the stacked die configuration.

6. The method of claim 1, further comprising stretching the carrier to form gaps between the grains fixed to the carrier and perforating the carrier along the gaps.

7. the method of claim 6, wherein the carrier is perforated using an optical laser tool.

8. the method of claim 6, further comprising cleaning one or more edges of the die while the die is secured to the carrier.

9. The method of claim 1, further comprising plasma ashing the first surface of the die while the die is affixed to the carrier.

10. The method of claim 1, further comprising removing the first die using a vacuum tool, wherein the vacuum tool is configured to attach to the portion of the carrier fixed to the second surface of the first die and place the first die onto the prepared surface of the substrate without directly contacting a surface or edge of the first die.

11. the method of claim 1, further comprising:

Forming openings in the carrier by cutting the carrier around the perimeter of the first die;

Attaching a pick tool to the portion of the carrier that is secured to the second surface of the first die; and

removing the first die from the number of dies by pulling the first die through the opening or advancing the first die through the opening with the pick tool.

12. the method of claim 1, wherein the carrier comprises a dicing sheet.

13. A method of forming a microelectronic assembly, comprising:

depositing a protective coating onto one or both surfaces of the substrate;

Fixing the substrate to a dicing sheet;

Singulating the substrate into a number of singulated assemblies secured to the cutting blade;

Cleaning a first surface of the singulated assembly while the singulated assembly is secured to the cutting blade;

Exposing the singulated components to ultraviolet radiation;

stretching the cut sheet to form or extend a gap between the singulated components secured to the cut sheet;

Cleaning the protective coating from the first surface of the singulated assembly while the singulated assembly is secured to the cutting blade;

Plasma ashing said first surface of said singulated assembly while said singulated assembly is secured to said dicing sheet;

Re-cleaning the first surface of the singulated assembly while the singulated assembly is secured to the cutting blade;

plasma activating the first surface of the singulated assembly while the singulated assembly is secured to the dicing sheet;

Re-cleaning the first surface of the singulated assembly while the singulated assembly is secured to the cutting blade;

Forming perforations in the cut sheet along the gap;

stamping a first singulated component from said cut sheet with a vacuum tool along said perforations in said cut sheet, a portion of said cut sheet being secured to a second surface of said first singulated component and protecting said second surface of said first singulated component from said vacuum tool;

Placing the first singulated assembly onto a prepared substrate surface;

Attaching the first singulated component to the prepared substrate surface, the first surface of the first singulated component being attached to the prepared substrate surface;

Thermally treating the first singulated assembly and the prepared substrate surface;

cleaning the second surface of the first singulated assembly;

Plasma activating said second surface of said first singulated member;

Stamping a second singulated component from said cut sheet with said vacuum tool, another portion of said cut sheet being secured to a second surface of said second singulated component and protecting said second surface of said second singulated component from said vacuum tool;

Attaching a first surface of the second singulated component to the second surface of the first singulated component to form a stacked microelectronic configuration; and

thermally processing the stacked microelectronic configuration.

14. the method of claim 13, wherein the substrate comprises a wafer.

15. the method of claim 13, wherein the prepared substrate surface comprises a wafer surface or a die surface or a dielectric surface or a polymeric layer or a conductive layer.

16. The method of claim 13, wherein the prepared substrate surface comprises a surface of an interposer, a surface of a package, a surface of a flat panel, a surface of a circuit, or a surface of a silicon or non-silicon wafer.

17. the method of claim 13, wherein the first singulated assembly and the prepared substrate surface are comprised of the same material.

18. The method of claim 13, wherein the first singulated assembly and the prepared substrate surface are comprised of dissimilar materials.

19. the method of claim 13, wherein the first surface of the first singulated assembly comprises a flowable interconnect material.

20. A system, comprising:

an ultra-high frequency sonic converter configured to be disposed in a predetermined proximity to a surface to be cleaned, the ultra-high frequency sonic converter configured to apply sonic energy to the surface to be cleaned; and

One or more brushes coupled to or integral with the transducer, the one or more brushes configured to contact the surface to be cleaned at a predetermined contact pressure and configured to brush the surface to be cleaned while the ultra-high frequency sonic transducer applies the sonic energy to the surface to be cleaned.

21. The system of claim 20, further comprising a rotation unit coupled to one or more of the brushes, the rotation unit configured to rotate the one or more brushes relative to the surface to be cleaned while the ultra-high frequency sonic transducer applies the sonic energy to the surface to be cleaned.

22. the system of claim 21, wherein the rotation unit includes a hydraulic rotation unit configured to rotate the one or more brushes using a hydraulic fluid.

23. the system of claim 20, further comprising a rotating turntable configured to receive the surface to be cleaned, the turntable configured to rotate the surface to be cleaned while the ultra-high frequency sonic transducer applies the sonic energy to the surface to be cleaned and the one or more brushes brush the surface to be cleaned.

24. the system of claim 20, further comprising a transverse conveyor belt configured to traverse the transducer and the one or more brushes transversely back and forth across the surface to be cleaned as the ultra-high frequency sonic transducer applies the sonic energy to the surface to be cleaned and the one or more brushes brush the surface to be cleaned.

25. the system of claim 20, further comprising a cleaning solution disposed over the surface to be cleaned, the converter configured to apply the sonic energy to the surface to be cleaned via the cleaning solution.

26. the system of claim 20, further comprising a fluid level sensor disposed above the surface to be cleaned and configured to detect a level of fluid above the surface to be cleaned, the fluid level sensor configured to send at least a first signal to a fluid source when the level of the fluid is less than a first predetermined amount and a second signal to the fluid source when the level of the fluid is greater than a second predetermined amount.

27. The system of claim 20, wherein the system is configured to clean one or more surfaces of one or more substrates, wafers, and/or semiconductor dies.

28. the system of claim 20, wherein the one or more brushes are configured to brush one or more edges of one or more components corresponding to the surface to be cleaned.

29. a method, comprising:

Loading one or more microelectronic components onto the processing surface;

Positioning an integrated uhf sonic brush system proximate to the microelectronic component, the integrated uhf sonic brush system comprising an uhf sonic converter and one or more brushes coupled to or integral with the uhf sonic converter;

Applying sonic energy to the one or more microelectronic components via the ultra-high frequency sonic transducer; and

Simultaneously brushing one or more surfaces of the one or more microelectronic elements via the one or more brushes when the ultra-high frequency sonic transducer applies the sonic energy to the one or more microelectronic elements.

30. the method of claim 29, further comprising rotating the treatment surface while simultaneously applying the sonic energy via the transducer and brushing the one or more surfaces of the one or more microelectronic elements via the one or more brushes.

31. The method of claim 29, further comprising laterally scanning the integrated uhf sonic brush system while simultaneously applying the sonic energy through the converter and brushing the one or more surfaces of the one or more microelectronic components through the one or more brushes.

32. The method of claim 29, further comprising applying a predetermined amount of cleaning fluid to the one or more surfaces of the one or more microelectronic elements, and controlling the predetermined amount of cleaning fluid with a fluid level sensor in communication with a fluid source.

33. the method of claim 32, further comprising applying the sonic energy to the one or more microelectronic components via the ultra-high frequency sonic transducer with the cleaning solution.

34. A method of forming a microelectronic assembly, comprising:

Providing a protective layer on one or both surfaces of a substrate;

securing the substrate to a carrier;

Singulating the substrate into a number of dies secured to the carrier;

Treating at least a first surface of the die while the die is secured to the carrier;

Cutting the carrier around the perimeter of the first known good grains;

Removing the first known-good grains from the carrier, wherein at least a portion of the carrier is secured to a second surface of the first known-good grains;

Attaching the first known good die to a prepared substrate surface, a first surface of the first known good die being attached to the prepared substrate surface; and

removing the portion of the carrier from the second surface of the first known good grains.

35. The method of claim 34, further comprising plasma activating the first surface of the first known-good grains while the first known-good grains are secured to the carrier.

36. the method of claim 34, further comprising heat treating the first known-good grains while the first known-good grains are bonded to the prepared substrate surface.

37. the method of claim 34, further comprising:

Preparing the second surface of the first known-good grains for bonding;

Removing second known good grains from the carrier;

Attaching a first surface of the second known good die to the second surface of the first known good die to form a stacked die configuration.

38. a method of forming a microelectronic assembly, comprising:

singulating first known good grains on a clean carrier;

cutting the carrier around the perimeter of the first known good grains;

Removing the first known-good grains from the carrier, wherein at least a portion of the carrier is secured to a second surface of the first known-good grains;

Attaching a first surface of the first known good grains to a surface of a fabricated substrate; and

Removing the portion of the carrier from the second surface of the first known good grains.

39. The method of claim 38, further comprising heat treating the first known good grains and the prepared substrate.

40. The method of claim 38, further comprising:

Cleaning the second surface of the first known good grains;

plasma activating the second surface of the first known good grains;

Cleaning the first surface of the second known good grains;

Attaching the first surface of the second known good die to the second surface of the first known good die to form a stacked configuration; and

Thermally treating the stacked die arrangement.

41. The method of claim 40, further comprising attaching one or more additional known good dies to the second known good die and to subsequent known good dies to form the stacked die configuration.

42. a method of forming a microelectronic assembly, comprising:

Cutting the cleaned and singulated first known good dies from the carrier;

Removing the first known-good grains from the carrier, wherein at least a portion of the carrier is secured to a second surface of the first known-good grains;

Attaching a first surface of the first known good grains to a surface of a fabricated substrate; and

Removing the portion of the carrier from the second surface of the first known good grains.

43. the method of claim 42, further comprising:

Preparing the second surface of the first known good grains while the first known good grains are bonded to the prepared substrate;

removing second known good grains from the carrier;

attaching a first surface of the second known good die to the second surface of the first known good die to form a stacked die configuration.

44. The method of claim 43, further comprising heat treating the stacked die arrangement while the stacked die arrangement is bonded to the fabricated substrate.

45. A method of forming a microelectronic assembly, comprising:

Cutting singulated and cleaned known-good dice from a carrier, at least a portion of the carrier being affixed to a second surface of the known-good dice;

attaching a first surface of the known good grains to a surface of a fabricated substrate; and

Removing the portion of the carrier from the second surface of the known good grains.

46. A method of forming a microelectronic assembly, comprising:

cutting the singulated and cleaned first known good dies from the carrier;

attaching the cleaned surface of the first known good grains to a surface of a prepared substrate.

47. The method of claim 46, further comprising:

Preparing a second surface of the first known good grains when a first surface of the first known good grains is bonded to the surface of the prepared substrate;

attaching a first surface of a second known-good die to the second surface of the first known-good die to form a stacked die configuration.

48. The method of claim 47, further comprising heat treating the stacked die arrangement while the stacked die arrangement is bonded to the fabricated substrate.

49. The method of claim 46, wherein the cleaned surface of the first known good grains comprises a flowable interconnect material.

50. The method of claim 46, wherein the cleaned surface of the first known-good grains comprises a metal pad or a dielectric surface.

51. The method of claim 46, wherein the surface of the prepared substrate comprises a metal pad or a dielectric surface.

Technical Field

the following description is directed to the processing of an integrated circuit ("IC"). More specifically, the following description relates to apparatus and techniques for processing IC dies.

Background

the need for more compact physical configurations of microelectronic components, such as integrated chips and dies, has become increasingly stronger with the rapid development of portable electronic devices, the expansion of the internet of things, nanoscale integration, sub-wavelength optical integration, and so forth. By way of example only, devices are commonly referred to as "smart phones" that integrate the functionality of a cellular phone with a powerful data processor, memory and ancillary devices such as a global positioning system receiver, electronic cameras and local area network connections, as well as a high resolution display and associated image processing chip. Such devices may provide functions such as: full internet connectivity, including entertainment for full resolution video, navigation, electronic banking, sensors, memory, microprocessors, health electronics, automotive electronics, and the like, is all implemented in a pocket-sized device. Complex portable devices require packaging of numerous chips and dies into a small space.

Microelectronic components often comprise thin planar plates of semiconductor materials such as silicon arsenide or gallium arsenide, or others. The chips and dies are typically provided as individual pre-packaged units. In some cell designs, the die is mounted to a substrate or chip carrier, which is then mounted on a circuit panel, such as a Printed Circuit Board (PCB). The die may be disposed in a package that facilitates handling of the die during fabrication and during mounting of the die on an external substrate. For example, many dies are provided in packages suitable for surface mount. Numerous packages of this general type are proposed for various applications. Most commonly, such packages include dielectric components, often referred to as "chip carriers" having terminals formed as plated or etched metal structures on the dielectric. Terminals are typically connected to contacts (e.g., bond pads or metal posts) of the die by conductive features such as thin traces extending along the die carrier and by fine leads or wires extending between the contacts and the terminals or traces of the die. In a surface mount operation, the package may be placed onto a circuit board such that each terminal on the package is aligned with a corresponding contact pad on the circuit board. Solder or other bonding material is typically disposed between the terminals and the contact pads. The package may be permanently bonded in place by heating the assembly to melt or "reflow" the solder or otherwise activate the bonding material.

many packages include solder solids in the form of solder balls typically between about 0.025mm and about 0.8mm (1 mil and 30 mil) in diameter and attached to terminals of the package. Packages having an array of solder balls protruding from their bottom surface (e.g., the surface opposite the front side of the die) are commonly referred to as ball grid arrays or "BGA" packages. Other packages, known as land grid arrays or "LGA" packages, are secured to a substrate by way of a relatively thin layer or pad formed from solder. This type of package can be very compact. Some packages, commonly referred to as "chip scale packages," occupy an area of the circuit board that is equal to or only slightly larger than the area of the device incorporated in the package. This ratio is advantageous because it reduces the overall size of the assembly and permits the use of short interconnects between various devices on the substrate, which then limits signal propagation time between devices and thus facilitates operating the assembly at high speed.

the semiconductor dies may also be arranged in a "stacked" configuration, where, for example, one die is arranged on a carrier and another die is mounted on top of the first die. Such configurations may allow multiple different dies to be mounted within a single footprint on a circuit board, and may further facilitate high speed operation by providing short interconnects between dies. Typically, this interconnect distance may be only slightly greater than the thickness of the die itself. For interconnects to be achieved within a stack of die packages, interconnect structures for mechanical and electrical connections may be disposed on both sides (e.g., faces) of each die package (except the uppermost package). This is achieved, for example, by providing contact pads or lands on both sides of the substrate on which the die is mounted, the pads being connected through the substrate by conductive vias or the like. Examples of stacked chip configurations and interconnect structures are provided in U.S. patent application publication No. 2010/0232129, the disclosure of which is incorporated herein by reference.

The dies or wafers may also be stacked in other three-dimensional configurations as part of various microelectronic packaging schemes. This may include stacking layers of one or more dies or wafers on a larger base die or wafer, stacking multiple dies or wafers in a vertical or horizontal configuration, or stacking similar or different substrates, where one or more of the substrates may contain electrical or non-electrical components, optical or mechanical components, and/or various combinations of such components. The dice or wafers may be bonded in a stacked configuration using various Bonding techniques, including direct dielectric Bonding, adhesive-free techniques such as adhesive, or hybrid Bonding techniques such as those available from invitas Bonding technologies, Inc, both of which are available from the Inc, Xperi, Inc (see, e.g., U.S. patent nos. 6,864,585 and 7,485,968, which are incorporated herein in their entirety). When bonding stacked dies using direct bonding techniques, it is often desirable that the surfaces of the dies to be bonded be extremely flat and smooth. For example, typically, the surface topology of the surfaces should have minimal variation so that the surfaces can mate closely to form a continuous bond. For example, it is generally preferred that the variation in roughness of the bonding surface is less than 3nm and preferably less than 1.0 nm.

some stacked die configurations are sensitive to the presence of particles or contamination on one or both surfaces of the stacked die. For example, particles remaining from processing steps or contamination from die processing or tools may create poorly bonded regions between stacked dies or the like. Additional handling steps during die processing can further exacerbate the problem, leaving undesirable residues.

Drawings

the detailed description is set forth with reference to the accompanying drawings. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference numbers in different figures indicates similar or identical items.

For this discussion, the devices and systems illustrated in the figures are shown with a large number of components. As described herein, various implementations of devices and/or systems may include fewer components and remain within the scope of the invention. Alternatively, other implementations of devices and/or systems may include additional components or various combinations of the described components and remain within the scope of the invention.

Fig. 1 is a text flow diagram illustrating an example die progress column using a rotating plate.

Fig. 2 is a text flow diagram of an example die process sequence performed on a dicing tape or device handling film or surface according to an example embodiment.

Fig. 3 is a graphical flow diagram of an example die process sequence of fig. 2 according to an embodiment.

Fig. 4A-4E illustrate example steps for transferring dice from a dicing sheet to a wafer or surface according to an embodiment.

Fig. 5A-5C illustrate an example dicing sheet with die removed according to an embodiment.

Fig. 6 is a text flow diagram of an example die process sequence performed on a dicing tape or device handling film or surface according to a second specific example.

fig. 7 is a text flow diagram of an example die process sequence performed on a dicing tape or device handling film or surface according to a third embodiment.

Fig. 8 is a graphical flow diagram of the example die progress column of fig. 7, according to an embodiment.

Fig. 9A and 9B illustrate example die cleaning systems according to various embodiments.

Fig. 10A and 10B illustrate example die cleaning systems according to other embodiments.

Detailed Description

various embodiments of techniques and systems for processing Integrated Circuits (ICs) are disclosed. A die prepared for tight surface bonding (to other die, to a substrate, to another surface, etc.) may be treated with minimal handling to prevent contamination of the surface or edges of the die.

according to various embodiments, the techniques include treating the die while the die is on a dicing sheet or other device treatment film or surface. For example, the die may be cleaned, ashed, and activated while on the dicing sheet (thereby removing several processing steps and opportunities for contamination during processing). For example, the process may prepare dies to be bonded in a stacked configuration. After processing, the die can be picked directly from the dicing sheet and the die can be placed on a prepared die receiving surface (another die, substrate, etc.) for bonding to the surface.

In various embodiments, use of the disclosed techniques may reduce die manufacturing and processing costs and may reduce the complexity of manufacturing electronic packages including dies. Die stacked and bonded using and "direct bond interconnect" techniques may be particularly beneficial, as such die may be susceptible to particles and contaminants. Whether or not the fabrication process involves bonding two surfaces using low temperature covalent bonds between two corresponding semiconductor and/or insulating layers (the process is referred to as "bonding"), or whether or not the fabrication process also involves forming interconnects and bonding techniques (the process is referred to as "bonding"), a high degree of flatness and cleanliness across the bonded surfaces is often required.

The disclosed techniques may also be beneficial in other applications where, for example, a bonding region of a device may include a flowable bulk material, such as any form of solderable material for bonding. Minimizing or removing particles or smudges between bonded surfaces can significantly improve yield and reliability. In one implementation, where larger die or wafer carriers are used, such as larger dicing sheets, multiple die or wafer carriers are used, and so forth, large batches of die may be processed at once.

In some embodiments, several process steps may be removed, thereby reducing manufacturing complexity and cost while improving overall cleanliness of the die (e.g., reducing the occurrence of particles, contaminants, residues, etc.). The reduced handling of the grains may also minimize particle generation.

A flow diagram is shown at fig. 1 illustrating an example die or device process train 100 that uses a rotating plate to hold dies during processing. At blocks 1 to 4, the process begins by preparing a substrate, such as a silicon wafer, by: applying a protective coating to one or both sides of the wafer; singulating the wafer into dies (i.e., a first set of dies) on a dicing sheet or the like; exposing the die and the dicing sheet to Ultraviolet (UV) radiation and stretching the dicing sheet; and transferring the dice to the rotating plate, wherein the dice face upward. At blocks 5 to 9, the process includes the steps of: cleaning the organic layer from the grains; plasma ashing the top surface of the die to remove any remaining organic residues on the die; and further cleaning the die with deionized water (DI), such as plasma activating the top surface of the die and re-cleaning the die.

at block 10, the die is transferred to the flipper to position the die facing downward (i.e., the active surface (e.g., first surface) of the die facing downward or toward the flipper). At block 11, the die is transferred to a pick-and-place station. In this configuration, the dice are picked from their back surfaces (e.g., the show or active surface opposite the face, front surface, or first surface) and placed face down on the prepared receiving surface for bonding. To pick up the die, a pick-up vacuum tool, for example, contacts a back or second surface of the die opposite the bonded surface.

The receiving surface may comprise a prepared surface, such as a substrate, another die, a dielectric surface, a polymeric layer, a conductive layer, a surface of an interposer, another package, a surface of a flat panel, or even a surface of another circuit or a silicon or non-silicon wafer. The material of the die may be similar to or different from the material of the receiving substrate. The surface of the die may be different from the surface of the receiving substrate.

at block 13, a die placed on a substrate is heat treated to enhance bonding between a surface of the die and a receiving surface of the substrate. In some embodiments, the additional die may be attached to a back (e.g., second) surface or available surface of the bonded die. The back surface may have additional active devices therein.

At blocks 14-18, the receiving surface of the bonded die, e.g., substrate, and the exposed back surface are cleaned, plasma ashed, re-cleaned, plasma activated, and re-cleaned. At block 19, a second set of dies (having previously prepared top surfaces as described at blocks 1-11) may be attached to the first set of dies (which form a stacked die arrangement). In an example, a prepared front surface (e.g., a first surface) of a second die is attached to an exposed back surface (e.g., a second surface) of a first die. At block 20, the assembly having the first and second dies is heat treated to enhance bonding of the stack. For additional dies (e.g., a third or more dies) to be added to the stacked die arrangement, the process loops back to block 14 and continues until the desired number of dies has been added to each stack.

in various examples, a manufacturing procedure as described can use at least or about 13+7 (n-1); n >0 steps (where n is the desired number of die in the stack).

In some cases, the die may have some contaminants or particles on one or more surfaces of the die, although many cleaning steps will be included in the process. For example, the top or front surface of the die may be cleaned from contaminants, while the bottom or back surface of the die may be left with particles or contaminants. In addition, handling the die during multiple processing steps may add particles or contaminants to the die. For example, tools used during processing may deliver contaminants to the die. The location of the grain or defect on the die may determine whether the grain or defect may be potentially problematic for a stacked configuration. For example, some particles and defects may cause poor bonding between stacked dies, and the like. In another example, the device flipping step may be a source of contamination or defects because the cleaned top surface of the device is in contact with another surface after the flipping operation.

Example implementation

Fig. 2 is a flow diagram illustrating an example die progress column 200 in which dies are processed on a carrier such as a dicing tape ("dicing sheet") or other processing sheet, according to a specific example. FIG. 3 shows a graphical flow diagram representation of a procedure 200 implemented according to an example. The procedure 200 is discussed with reference to fig. 2 and 3, however, unless otherwise specified, "blocks" referred to in this discussion refer to the numbered blocks at fig. 2.

at block 1, the wafer 302 is processed, including the addition of one or more protective layers or coatings 304 to one or both surfaces of the wafer 302 (block 2). Protective layer 304 may comprise photoresist or similar protective agent. Wafer 302 is transferred to dicing sheet 306 and temporarily secured to dicing sheet 306 using adhesive 308. At block 3, wafer 302 is singulated into dies 310 while dicing 306.

At block 4, when die 310 is attached to dicing sheet 306, die 310 is cleaned including the edges of die 310 to remove particles. The cleaning may be performed mechanically and/or chemically. For example, the die 310 may be bombarded with fine CO2 particles and/or exposed to a brush cleaning step, which may be enhanced with ultrasonic or ultra-high frequency sound waves. The brush 312 (as shown in fig. 3) may rotate or otherwise move in any direction relative to the surface of the die 310. The die 310 may additionally or alternatively be exposed to wet etching, water jets, and the like. At block 5, dicing sheet 306 may be slightly stretched to create spaces between dice 310 to accommodate cleaning the edges of dice 310. The dies 310 on the dicing sheet 306 may be exposed to Ultraviolet (UV) radiation to decompose the resist 304 and/or adhesive 308 layer. If it is desired to prepare the die 310 for removal from the dicing sheet 306, the dicing sheet 306 may be further stretched.

at block 6, when the die 310 is on the dicing sheet 306, the remaining residues of the resist layer 304 are cleaned off the exposed surface (e.g., first surface) of the die 310. Cleaning solutions may be used, as well as other chemical and/or mechanical cleaning techniques such as those described herein. In addition, while the die 310 remains on the dicing sheet 306, a first (e.g., exposed) surface of the die 310 is plasma ashed (e.g., oxygen ashed) to remove any undesirable organic residues.

At block 7, the first surface of the dice 310 are again cleaned using a wet cleaning technique (e.g., deionized water, cleaning solution, etc.), which may include ultra-high frequency sonic scrubbing, mechanical brush scrubbing or agitation, or other suitable cleaning technique. For example, in some cases, after the ashing step, additional cleaning may be performed by wet cleaning and/or by a stream of CO2 particles, or a rotating brush, water jet, or ultra high frequency sonic assisted wet cleaning technique, or a combination thereof.

at block 8, a first surface of the die 310 is plasma activated (e.g., nitrogen plasma, etc.) to create or enhance a bond for stacking the die 310. At block 9, activated die 310 is cleaned using a wet cleaning technique (e.g., deionized water, hot deionized water, water vapor, or high pH cleaning solutions, etc.) that may be enhanced with ultra high frequency sonic waves or a combination of the cleaning techniques described above, or the like.

at block 10, a die 310 (e.g., a known good die) 310 is transferred from the dicing sheet 306 to a receiving surface 314 (fabricated die, substrate, etc.) for bonding to the receiving surface 314. In some cases, the various cleaning and surface activation procedures discussed above may be performed on the exposed surfaces of the dice 310 and/or the receiving surfaces 314.

In various embodiments, die 310 is transferred from dicing sheet 306 using a "stamping" technique (as illustrated in fig. 4 and 5). The stamping technique allows for the transfer of the die 310 (e.g., known good die) without contaminating the surface or edges of the die 310. Also, the stamping technique allows the die 310 (e.g., a known good die) to be bonded to a "downward facing" bonding surface 314 using DBI hybrid bonding techniques, solder bumping, or the like, the bonding surface 314 being with a first surface of the die 310 facing the receiving surface 314.

In one example, as shown in fig. 4(a), 5(a), and 5(B), the stretched cut sheet 306 is held by a clamp ring 402 or a frame or the like. The grains 310 on the dice 306 are separated by gaps 404 (about 2um to 200um wide) that may be attributed, at least in part, to stretching. As shown at fig. 4(B) and 4(C), the dicing sheet 306 may be perforated along the gaps 404 between the dies 310 using one or more of various tools 406, such as a cutting blade, a thermal knife, an optical knife (laser ablation), and the like. In one embodiment, the perforations allow individual punching of dies 310 (e.g., known good dies) from the dicing sheet 306, leaving other dies 310 in place on the dicing sheet 306. A vacuum tool 408 or the like (i.e., a "pick-up head") may be used to punch individual dies 310 from the perforated dicing sheet 306 (as shown in fig. 4 (B)), from the back of the dicing sheet 306, for example. The vacuum tool 408 is capable of transporting a die 310 (e.g., a known good die) from a surface of the dicing tape 306 opposite the die 310, with a portion of the dicing tape 306 (or handling sheet) in place between the tool 408 and the die 310. Thus, the die 310 (e.g., known good die) reaches the bonding surface 314, and the vacuum tool 408 does not contaminate the surfaces or edges to be bonded of the die 310. The portion of tape 306 that remains attached to the back surface of die 310 (e.g., a known good die) thereby protects die 310 from contamination from contact with tool 408.

Fig. 4(D) shows a cross-sectional view of dicing sheet 306 with die 310 removed. Holes 410 are present in dicing sheet 306 because a portion of dicing sheet 306 and die 310 are removed. (this is further shown at fig. 5(a) -5 (C)) fig. 4(E) shows a number of dies 310 placed on a substrate 314 for bonding.

in another embodiment, a device pick-up head 408 (e.g., a vacuum tool) picks up a die 310 (e.g., a known-good die) from the backside of the die 310 (e.g., a known-good die) by the dicing sheet 306, while a corresponding tool uses a laser source (or the like) to cut the dicing sheet 306 around the perimeter of the die 310. In some applications, during the pick-up of die 310 from the back side by vacuum tool 408, the edge of heated blade 406 may be used to melt dicing sheet 306 around die 310 to completely separate die 310 from dicing sheet 306. An inert gas may be applied to the surface of die 310 to prevent fumes or other contaminants from the device isolation step from contaminating the cleaned surface of die 310. In other embodiments, a vacuum may be used in place of the inert gas, while in other embodiments, both the inert gas and the vacuum are used to protect the surface of the die 310 during the device detachment procedure.

In various implementations, the cleaned exposed surface of the dice 310 is not touched by any other surface or material than the surface of the receiving substrate 314. This is in contrast to some prior art techniques, where a cleaned surface of a die 310 (e.g., a known good die) typically contacts some portion of the receiving flap. In other common techniques, the vacuum pick-up device 408 may pick up the clean die 310 (e.g., a known good die), for example, by touching a portion of the surface of the clean die 310, which may cause contamination of the touched surface.

Referring back to fig. 2 and 3, at block 11, the wafer or substrate 314 with the most recently stacked die 310 is heat treated (e.g., to 50 to 150 ° F) to strengthen the bond of the die 310 and the substrate 314. At block 12, the currently exposed surface ("back surface" or "second surface") of the die 310 and the substrate 314 are prepared by chemical and/or mechanical cleaning techniques (e.g., surfactants, non-PVA rotating brushes, ultra high frequency sonic waves, etc.). This removes any remaining adhesive 308, dicing sheet 306, protective layer 304, or other residues from the back surface of die 310. At block 13, the back surfaces of the dies 310 are plasma activated in preparation for further bonding.

at block 14, additional prepared dice 316 are separated by techniques disclosed herein and disposed on prepared back (e.g., second) surfaces of dice 310 previously placed, for example, on substrate 314, along with the first surfaces that are "face down" (e.g., active side down, prepared side down, etc.). The newly added die 316 is heat treated (e.g., block 11) to strengthen the bond to die 310. For additional dies 316 (e.g., a third or more dies) to be added to the stacked die arrangement, the process loops back to block 12 and continues until the desired number of dies 310, 316 has been added to each stack.

In various examples, a fabrication procedure as described can use approximately 11+2 (n-1); n >0 steps (where n is the desired number of die 310, 316 in the stack). When compared to the procedure described with respect to fig. 1: (13+7(n-1)), this represents a significant reduction in manufacturing steps. Reducing the number of process steps not only reduces manufacturing costs and complexity, but also reduces the chance of contaminating die 310, resulting in better quality and higher throughput at a lower cost. Reduced processing steps translate into cost savings per die 310, and the removal of rotating plates (or similar processing components) translates into additional manufacturing cost savings. For example, approximately 50 to 100 dies 310 may be processed at a time using a rotating plate, and approximately 200 to 10,000 dies 310 or more may be processed at a time using a dicing sheet 306 procedure as described.

a second example embodiment 600 for processing dice 310 on a dicing sheet 306 is shown at fig. 6. Example embodiment 600 illustrates that some of the process steps may be performed in a different order, including reduced process steps. For example, as previously described, at blocks 1-3, wafer 302 is treated with protective coating 304, singulated into dies 310 on dice 306, and cleaned on dice 306. Optionally, the dicing sheet 306 may be somewhat stretched to accommodate cleaning between the dies 310, and/or the dies 310 may be exposed to UV light to break down the resist 304 and adhesive 308. At block 4, while the die 310 remains on the dicing sheet 306, the first surface of the die 310 is plasma ashed (e.g., oxygen ashed) to remove any unwanted organic residues (or other contaminants) from the first surface.

At block 5, the ashed surfaces of the dice 310 are cleaned using a wet cleaning technique as described above (e.g., deionized water, cleaning solution, etc.), which may include ultra-high frequency sonic waves or the like. At block 6, a first surface of the die 310 is plasma activated (e.g., nitrogen plasma, etc.) to create or enhance a bond for stacking the die 310. At block 7, activated die 310 are exposed to UV light and dicing sheet 306 is partially stretched. At block 8, activated die 310 is cleaned using a wet cleaning technique (e.g., deionized water, hot deionized water, water vapor, or high pH cleaning solutions, etc.) that may be enhanced with ultra high frequency sonic waves or a combination of the cleaning techniques described above, or the like.

at block 9, the die 310 is transferred from the dice 306 to a bonding surface 314 and bonded to a "face down" first surface using, for example, DBI hybrid bonding techniques, solder bumping, or the like. In various embodiments, die 310 is transferred from dicing sheet 306 using the "punch-through" technique described above (including perforating dicing sheet 306 and transferring die 310 using vacuum tool 408 or the like, while a portion of dicing sheet 306 remains over die 310 to protect die 310 from contamination by vacuum tool 408). At block 10, die 310 and substrate 314 are heat treated (e.g., to 50 to 150 ° F) to strengthen the bond of die 310 and substrate 314. At block 11, the exposed surface ("back surface" or "second surface") of the die 310 and the substrate 314 are cleaned using chemical and/or mechanical cleaning techniques (e.g., surfactants, non-PVA rotating brushes 312, ultra high frequency sonic waves, etc.). This removes any remaining adhesive 308 or other residue from the back surface of the die 310. At block 12, the back surfaces of the dies 310 are plasma activated in preparation for further bonding.

at block 13, additional dies 316 may be stamped from the perforated cut sheet 306 (as described above) and placed "face down" on the back (e.g., exposed) surface of the dies 310 previously placed on, for example, the substrate 314. The newly added grains 316 are heat treated (e.g., block 10) to strengthen the bond. For additional dies 310, 316 (e.g., a third or more dies) to be added to the stacked die arrangement, the process loops back to block 11 and continues until the desired number of dies 310, 316 has been added to each stack.

in various examples, a fabrication procedure as described may use approximately 10+2 (n-1); n >0 steps (where n is the desired number of die 310, 316 in the stack), resulting in further reductions in steps, complexity, and cost.

Fig. 7 is a flow diagram of another example die 310 process column 700 performed on dicing tape 306 according to the description of the third specific example. Fig. 8 is a graphical representation of the example die progress column 700 of fig. 7, implemented according to an example. In the example embodiment of fig. 7 and 8, the plasma ashing step (i.e., block 4 of fig. 6) is removed, thereby reducing the process steps.

As previously described, at blocks 1-3, wafer 302 is treated with protective coating 304, singulated into dies 310 on dice 306, and cleaned on dice 306. Optionally, the dicing sheet 306 may be somewhat stretched to accommodate cleaning between the dies 310, and/or the dies 310 may be exposed to UV light to break down the resist 304 and adhesive 308. At block 4, a first surface of die 310 is plasma activated (e.g., nitrogen plasma, etc.) to create or enhance a bond for stacking die 310. At block 5, activated die 310 is cleaned using a wet cleaning technique (e.g., deionized water, high ph cleaning solution, etc.), which may include ultra high frequency sonic scrubbing, agitation, or other suitable cleaning technique. At block 6, activated die 310 are exposed to UV light and dicing sheet 306 is partially stretched.

At block 7, the die 310 is transferred from the dice 306 to a bonding surface 314 and bonded to a "face down" first surface using DBI hybrid bonding techniques, solder bumping, or the like. In various embodiments, die 310 is transferred from dicing sheet 306 using the "punch-through" technique described above (including perforating dicing sheet 306 and transferring die 310 using vacuum tool 408 or the like, while a portion of dicing sheet 306 remains over die 310 to protect die 310 from contamination by vacuum tool 408). At block 8, die 310 and substrate 314 are heat treated (e.g., to 50 to 150 ° F) to strengthen the bond of die 310 and substrate 314. At block 9, the exposed surface ("back surface" or "second surface") of the die 310 and the substrate 314 are cleaned using chemical and/or mechanical cleaning techniques (e.g., surfactants, methanol, non-PVA rotating brushes 312, ultra high frequency sonic waves, etc.). This removes any remaining adhesive 308 or other residue from the back surface of the die 310. At block 10, the back surfaces of the dies 310 are plasma activated in preparation for further bonding.

At block 11, additional dies 316 may be stamped from the perforated cut sheet 306 and placed "face down" (e.g., prepared side down) on the back surfaces (e.g., exposed surfaces) of the dies 310 previously placed on, for example, the substrate 314. The newly added grains 316 are heat treated (e.g., block 8) to strengthen the bond. For additional dies 310, 316 (e.g., a third or more dies 310, 316) to be added to the stacked die arrangement, the process loops back to block 9 and continues until the desired number of dies 310, 316 has been added to each stack.

in various examples, a fabrication procedure as described may use approximately 8+2 (n-1); n >0 steps (where n is the desired number of die 310, 316 in the stack), resulting in further reductions in steps, complexity, and cost. After the device stacking step, stacked die 310 and receiving surface 314 may be further processed to a subsequent higher temperature. The treatment temperature may range from 80 to 370 ℃ for a period of from 15 minutes up to 5 hours or more. The lower the temperature, the longer the treatment time.

In one specific example of the procedure 700, the wafer 302 to be processed/diced may include interconnects on the exposed or first surface, such as solder bumps or other reflowable bonding material (not shown) or the like. In this embodiment, the reflowable interconnect bonding structure is often disposed face up on the dicing sheet 306 or handling sheet in such a way that the reflowable features do not directly contact the adhesive layer 308 of the dicing sheet 306. The wafer 302 may be treated with a protective coating 304 covering the reflowable interconnect structure. Wafer 302 is singulated into dies 310 while on dice 306 and cleaned while on dice 306, as previously described with respect to blocks 1-3 above. Optionally, the dicing sheet 306 may be somewhat stretched to accommodate cleaning between the die 310 and the edges of the die 310, and/or the die 310 may be exposed to UV light to break down the resist 304 and adhesive 308.

At block 4, a first surface (e.g., an exposed surface) of die 310 may be cleaned using a plasma cleaning method (e.g., oxygen ashing, etc.). At block 5, the dice 310 on the dice 306 may be further cleaned using wet cleaning techniques as described above (e.g., deionized water, high ph cleaning solution, etc.), which may include ultra-high frequency sonic waves, agitation, or the like, as desired. At block 6, the cleaned dice 310 and dicing sheet 306 may be exposed to UV light and the dicing sheet 306 may be further stretched.

at block 7, the dice 310 are transferred from the dice 306 to a receiving surface 314 and bonded with a "face down" first surface (e.g., a down prepared surface) using techniques described herein. For example, in some embodiments, the receiving substrate 314 may include portions of a polymeric layer, a non-filled primer, or an adhesive sheet. In various embodiments, die 310 is transferred from dice 306 using the "punch-through" technique described above (including perforating dice 306 and transferring die 310 using vacuum tool 408 or the like, while a portion of dice 306 remains on each of dice 310 to protect dice 310 from contamination by vacuum tool 408).

At block 8, die 310 and substrate 314 may be heat treated to electrically couple die 310 to receiving substrate 314. In some applications, a primer material may be formed around the bonded device 310 to further mechanically couple the device 310 to the substrate 314 receiving surface. At block 9, the exposed surfaces of the transferred dies 310 and the substrate 314 are cleaned using chemical and/or mechanical cleaning techniques (e.g., surfactants, methanol, non-PVA rotating brushes 312, ultra high frequency sonic waves, etc.). This removes any remaining adhesive 308 or other residue from the back surface of the die 310. At block 10, the exposed surfaces of the transferred die 310 are plasma activated in preparation for further bonding. In some applications, the bonded device 310 may be cleaned prior to the thermal process used to electrically couple the die 310 to the receiving substrate 314.

As discussed above, at various processing steps or stages, the dice 310, 316 and/or the substrate 314 are cleaned using chemical and/or mechanical cleaning techniques (e.g., surfactants, methanol, non-PVA rotating brushes 312, ultra high frequency sonic waves, etc.). Fig. 9A and 9B illustrate example die cleaning systems that may be used for this purpose, according to various embodiments. The cleaning processes and systems are described with reference to the receiving surfaces of die 310 or substrate 314, but it is understood that the processes and systems are applicable to dies 310, 316 and substrate 314 as well as to dielectric surfaces, polymeric layers, conductive layers, interposers, packages, panels, circuits, silicon or non-silicon wafers, and the like.

Referring to fig. 9A, in an example cleaning sequence, an object to be cleaned (e.g., die 310 or carrier, etc.) is loaded onto a processing apparatus 902, such as a turntable or rotating plate as shown, for cleaning and/or other processing. The cleaning process includes applying near ultra-high frequency sonic energy to the cleaning fluid via ultra-high frequency sonic transducer 904 as die 310 may be rotated on turntable 902. The transducer 904 may be scanned back and forth as the die 310 rotates to improve the uniform application of sonic energy to the die 310. The sonic energy helps to loosen the particles that might otherwise be difficult to remove from the surface of the grains 310.

referring to fig. 9B, the converter 904 is then removed and the surface of the die 310 may be brushed clean with a brush 906. For example, the brush 906 may be scanned back and forth as the turntable 902 rotates. If this cleaning procedure is not successful in removing enough particles, the procedure may be repeated as necessary. When the cleaning process is complete, the die 310 is rinsed and dried. However, in some cases, this may require multiple cycles, and may still be insufficient to clean all residues from the die 310.

Referring to fig. 10A and 10B, techniques and systems provide improved cleaning of die/wafer/substrate surfaces in a single procedure. Fig. 10A and 10B illustrate an example die 310 cleaning system 1000 according to various embodiments. An integrated uhf sonic brush system 1000 is disclosed that includes an uhf sonic converter 1002 and one or more brush heads 1004.

in a first embodiment, as shown at fig. 10A, an integrated uhf sonic brush system 1000 is placed proximate to a die 310 on a turntable 902 (or other processing surface). The integrated uhf sonic brush system 1000 is positioned such that the transducer 1002 is an optimal distance from the die 310 surface and such that the brush 1004 has a desired contact pressure on the die 310 surface. For example, a cleaning fluid is applied to the surface of the die 310. When transducer 1002 applies sonic energy to the surface of die 310 via the cleaning fluid, brush 1004 simultaneously brushes particles from the surface of die 310. In various implementations, die 310 is rotated on turntable 902 and/or integrated uhf sonic brush system 1000 is scanned back and forth for uniform cleaning.

In an implementation, for example, fluid level sensor 1006 assists in controlling the amount of cleaning fluid applied to the surface of die 310 if a signal is sent to the cleaning fluid reservoir. In an implementation, fluid level sensor 1006 is positioned above die 310 and is configured to detect the level of fluid above die 310. The fluid level sensor 1006 is configured to send at least a first signal to the fluid source when the level of the fluid is less than a first predetermined amount and a second signal to the fluid source when the level of the fluid is greater than a second predetermined amount. The combination of ultra-high frequency sound waves and brushing in a single system and procedure allows for more thorough cleaning in a single procedure, which can remove repeated cleaning iterations.

In a second embodiment, as shown at fig. 10B, one or more brushes 1004 may be rotated via a rotation unit 1008 while brushing the surface of the die 310. For example, the brush 1004 may be rotated (e.g., the rotation unit 1008 may rotate the brush 1004) using hydraulics delivered via a conduit 1010, a cable, or the like, or any other suitable means (pneumatic, electric, mechanical, etc.). Additional rotation of the brush 1004 may assist in removing stubborn particles from the surface of the wafer 310 in a single cleaning system and procedure.

The techniques and systems may provide cleaner bonding surfaces with fewer process steps to prepare the die 310 to be bonded in a stacked configuration. After processing and cleaning, the die 310 may be picked and placed on a die receiving surface 314 (another die, substrate, etc.) for bonding to the receiving surface 314, as described above. Die 310 to be stacked and bonded using and "direct bond interconnect" techniques may be particularly beneficial, as such die may be susceptible to particles and contaminants. The disclosed techniques may also be beneficial in other applications where a bonding region, such as die 310, may include a flowable bulk material, such as any form of solderable material for bonding. Minimizing or removing particles or smudges between bonded surfaces can significantly improve yield and reliability. Additional benefits include improved efficiency of cleaning procedures and cleaning equipment, simpler procedure steps and process equipment, significant reduction in cleaning cycle times, and the like.

Examples of cleaning cycles in which the disclosed techniques and systems may be employed include: cleaning the die 310 after a CMP process, after etching, and the like; cleaning away the organic (or inorganic) fabrication and processing layers from the grains 310; cleaning the die 310 with deionized water (DI), an alkaline or acidic solution, or a weakly alkaline or weakly acidic formulation, a solvent, or various combinations thereof after plasma ashing the surface of the die 310; the die 310 is re-cleaned after the plasma activates the surface of the die 310, and so on. For example, in various embodiments, the ashing step may be omitted and the die 310 may be cleaned in the apparatus described in fig. 10A and 10B. In one embodiment, for example, the protective layer 304 may be cleaned off using the apparatus described in fig. 10A and 10B using applied sonic energy and mechanical action of the brush 1004, removing the protective layer 304 with a suitable solvent. To prevent cross-contamination of tools and devices, in subsequent steps, the cleaned die 310 may be transferred to another cleaning station of the type described with reference to fig. 10A and 10B for additional cleaning, e.g., to remove an ashing step, or to the other cleaning station after activation of the die 310.

singulated dice 310 may be processed on carrier 306 as described in various previous paragraphs. In some embodiments, known good grains 310 are removed from carrier 306, wherein at least a portion of carrier 306 is attached to a second surface of known good grains 310. The first known good dies 310 are attached to the prepared surface of the substrate 314 at a first surface of the first known good dies 310. Similarly, a second surface of the first known good die 310 may be cleaned (including cleaning away portions of the carrier 306) and prepared for bonding another known good die 316. In practice, a backside (e.g., a second side) of any of the bonded dies 310, 316 may be prepared, and additional dies 310, 316 may be bonded thereon. Any additional dies 310, 316 may be bonded to previously bonded dies 310, 316 as desired. In various embodiments, the stacked bonded die (310, 316, etc.) may range from 1 to 200 die 310, 316, and preferably between 1 to 100 die 310, 316 and still preferably between 1 to 20 known good die 310, 316.

The described techniques may yield better device and package reliability, higher performance, and improved margin of profit for and for devices manufactured and the like. Other advantages of the disclosed techniques will also be apparent to those skilled in the art.

summary of the invention

although implementations of the invention have been described in language specific to structural features and/or methodological acts, it is to be understood that implementations are not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as representative forms of implementing example devices and techniques.

Each of the technical aspects herein constitutes a separate embodiment, and combinations of embodiments of different technical aspects and/or different embodiments are within the scope of the present invention and will be apparent to those of ordinary skill in the art upon review of the present disclosure.