阅读说明：本技术 一种半导体器件封装方法及封装系统、辅助压力夹具 (Semiconductor device packaging method and system and auxiliary pressure clamp ) 是由 李阳 袁国兵 姚耀 胡梅 于 2021-07-29 设计创作，主要内容包括：本发明提供一种半导体器件封装方法及封装系统、辅助压力夹具,方法包括：提供熔扩装片后的半导体器件,半导体器件包括载片台、设置在载片台上的芯片以及夹设在芯片的背面和载片台之间的合金粘结层；将半导体器件在高温真空回流条件下,通过辅助压力夹具对芯片的正面持续施加预设的辅助压力,直至回流结束,在温度下降至预设温度后解除辅助压力,以排出合金粘结层中的空洞。本发明在高温真空回流条件下,通过使用辅助压力夹具,能够在真空、高温、机械压力的综合作用下,有效排出合金粘结层中的空洞,从而降低空洞发生的风险,加强芯片与载片台的结合,提高半导体器件的导电性能和导热性能,提升熔扩产品的封装良率。(The invention provides a semiconductor device packaging method, a semiconductor device packaging system and an auxiliary pressure clamp, wherein the method comprises the following steps: providing a semiconductor device subjected to fusion-expansion mounting, wherein the semiconductor device comprises a wafer carrying table, a chip arranged on the wafer carrying table and an alloy bonding layer clamped between the back surface of the chip and the wafer carrying table; and continuously applying preset auxiliary pressure to the front surface of the chip by the auxiliary pressure clamp under the condition of high-temperature vacuum reflux of the semiconductor device until the reflux is finished, and releasing the auxiliary pressure after the temperature is reduced to the preset temperature so as to discharge the cavity in the alloy bonding layer. Under the high-temperature vacuum backflow condition, the auxiliary pressure clamp is used, and the cavities in the alloy bonding layer can be effectively discharged under the comprehensive action of vacuum, high temperature and mechanical pressure, so that the risk of cavity occurrence is reduced, the combination of the chip and the slide holder is enhanced, the electric conductivity and the heat conductivity of the semiconductor device are improved, and the packaging yield of the melt-expanded product is improved.)

1. A method of packaging a semiconductor device, the method comprising:

providing a semiconductor device subjected to fusion-expansion mounting, wherein the semiconductor device comprises a wafer carrying table, a chip arranged on the wafer carrying table and an alloy bonding layer clamped between the back surface of the chip and the wafer carrying table;

and continuously applying preset auxiliary pressure to the front surface of the chip through an auxiliary pressure clamp under the condition of high-temperature vacuum reflux of the semiconductor device until the reflux is finished, and releasing the auxiliary pressure after the temperature is reduced to the preset temperature so as to discharge a cavity in the alloy bonding layer.

2. The packaging method according to claim 1, wherein the auxiliary pressure fixture comprises a base and an upper cover disposed on the base, a side of the upper cover facing the base is provided with a pressing contact block, and the continuously applying a preset auxiliary pressure to the front surface of the chip comprises:

placing the semiconductor device on the mount;

and pressing the upper cover provided with the lower pressing contact block on the base, so that the lower pressing contact block is abutted against the front surface of the chip, and the auxiliary pressure is continuously applied to the front surface of the chip under the action of the weight of the upper cover.

3. The packaging method according to claim 2, wherein the auxiliary pressure fixture further comprises a limiting fixing seat, the limiting fixing seat is arranged between the base and the upper cover, the limiting fixing seat is provided with a limiting through hole, and the limiting through hole corresponds to the chip;

the upper cover that will be provided with push down contact piece is pressed on the base for push down contact piece with the front butt of chip includes:

and the lower pressing contact block penetrates through the limiting through hole to abut against the front surface of the chip.

4. The method of claim 2, wherein the continuously applying a preset auxiliary pressure to the front surface of the chip by the auxiliary pressure clamp further comprises:

the upper cover with different weights is designed according to different semiconductor devices so as to apply different auxiliary pressure to the front sides of the chips of different semiconductor devices.

5. The encapsulation method according to any one of claims 1 to 4, wherein the predetermined temperature is in a range of 75 ℃ to 85 ℃.

6. The utility model provides a semiconductor device encapsulates uses supplementary pressure anchor clamps, semiconductor device is the semiconductor device after the fuse-expansion dress piece, and this semiconductor device includes slide holder, sets up chip on the slide holder and press from both sides and establish the back of chip with the alloy tie coat between the slide holder, its characterized in that, supplementary pressure anchor clamps include:

a base for carrying the semiconductor device;

the upper cover is arranged on the base, and a pressing contact block is arranged on one side of the base and can be abutted to the front face of the chip.

7. The auxiliary pressure clamp of claim 6, further comprising a limit fixing seat;

the limiting fixing seat is arranged between the base and the upper cover, the limiting fixing seat is provided with a limiting through hole for the downward pressing contact block to pass through, and the limiting through hole corresponds to the chip.

8. An auxiliary pressure clamp as claimed in claim 6 or 7, wherein the push-down contact block is a resilient push-down contact block.

9. The auxiliary pressure clamp of claim 8, wherein the resilient press-down contact block is fabricated from a high temperature resistant thermally conductive material.

10. A semiconductor device packaging system comprising the auxiliary pressure jig of any one of claims 6 to 9, the packaging system further comprising a heating block on which the base is disposed.

Technical Field

The invention belongs to the technical field of semiconductor device packaging, and particularly relates to a semiconductor device packaging method, a semiconductor device packaging system and an auxiliary pressure clamp.

Background

In the semiconductor device packaging process, a mounting process is an important part, and includes solder mounting, solder paste mounting, solder-spread mounting, and the like. The melt-blown chip mounting is a novel chip mounting process, and has the advantages of high solder utilization rate, low cost, better stability in controlling the solder thickness and the chip inclination and the like. The back of the chip is covered with an alloy layer in advance, and a chip mounting welding head needs to apply large pressure to the surface of the chip at high temperature, so that a reliable alloy bonding layer is directly formed between the alloy layer on the back of the chip and the surface of a frame chip carrying table, and a high-temperature-resistant lead-free and green power device is really realized.

However, in the chip fusion-expansion mounting process, because the wire welding area on part of the chip surface has no protective layer, a certain height difference exists between the wire welding area and the non-welding area, and the surface of the arc-shaped suction nozzle can not be completely contacted with the surface of the chip, therefore, when welding at high temperature, the pressure applied by the welding head can not be effectively transmitted to the surface of the chip through the surface of the suction nozzle, so that cavities are easy to appear below the chip welding area and are not easy to discharge, especially large chips with the chip area larger than 10 square millimeters, and more cavities can exist below the chip after cooling.

Disclosure of Invention

The present invention is directed to at least one of the problems of the prior art, and provides a semiconductor device packaging method, a semiconductor device packaging system, and an auxiliary pressure clamp.

In one aspect of the present invention, there is provided a method of packaging a semiconductor device, the method

The packaging method comprises the following steps:

providing a semiconductor device subjected to fusion-expansion mounting, wherein the semiconductor device comprises a wafer carrying table, a chip arranged on the wafer carrying table and an alloy bonding layer clamped between the back surface of the chip and the wafer carrying table;

and continuously applying preset auxiliary pressure to the front surface of the chip through an auxiliary pressure clamp under the condition of high-temperature vacuum reflux of the semiconductor device until the reflux is finished, and releasing the auxiliary pressure after the temperature is reduced to the preset temperature so as to discharge a cavity in the alloy bonding layer.

In some embodiments, the auxiliary pressure fixture includes a base and an upper cover disposed on the base, a side of the upper cover facing the base is provided with a pressing contact block, and the applying of the preset auxiliary pressure to the front surface of the chip continuously includes:

placing the semiconductor device on the mount;

and pressing the upper cover provided with the lower pressing contact block on the base, so that the lower pressing contact block is abutted against the front surface of the chip, and the auxiliary pressure is continuously applied to the front surface of the chip under the action of the weight of the upper cover.

In some embodiments, the auxiliary pressure fixture further comprises a limiting fixing seat, the limiting fixing seat is arranged between the base and the upper cover, the limiting fixing seat is provided with a limiting through hole, and the limiting through hole corresponds to the chip;

the upper cover that will be provided with push down contact piece is pressed on the base for push down contact piece with the front butt of chip includes:

and the lower pressing contact block penetrates through the limiting through hole to abut against the front surface of the chip.

In some embodiments, the continuously applying a preset auxiliary pressure to the front surface of the chip by the auxiliary pressure fixture further includes:

the upper cover with different weights is designed according to different semiconductor devices so as to apply different auxiliary pressure to the front sides of the chips of different semiconductor devices.

In some embodiments, the predetermined temperature ranges from 75 ℃ to 85 ℃.

In another aspect of the present invention, an auxiliary pressure jig for semiconductor device packaging is provided, in which the semiconductor device is a fusion-expanded mounted semiconductor device, the semiconductor device includes a stage, a chip disposed on the stage, and an alloy adhesive layer interposed between a back surface of the chip and the stage, and the auxiliary pressure jig includes:

a base for carrying the semiconductor device;

the upper cover is arranged on the base, and a pressing contact block is arranged on one side of the base and can be abutted to the front face of the chip.

In some embodiments, the auxiliary pressure fixture further comprises a limit fixing seat;

the limiting fixing seat is arranged between the base and the upper cover, the limiting fixing seat is provided with a limiting through hole for the downward pressing contact block to pass through, and the limiting through hole corresponds to the chip.

In some embodiments, the press-down contact block is a resilient press-down contact block.

In some embodiments, the resilient press-down contact block is made of a high temperature resistant thermally conductive material.

In another aspect of the present invention, a semiconductor device packaging system is provided, wherein the packaging system comprises the auxiliary pressure clamp described above, and the packaging system further comprises a heating block, and the base is disposed on the heating block.

According to the semiconductor device packaging method, the semiconductor device packaging system and the auxiliary pressure clamp, under the high-temperature vacuum backflow condition, the auxiliary pressure clamp is used, and the cavities in the alloy bonding layer can be effectively discharged under the comprehensive action of vacuum, high temperature and mechanical pressure, so that the risk of cavity occurrence is reduced, the combination of a chip and a wafer carrying table is enhanced, the electric conductivity and the heat conductivity of the semiconductor device are improved, and the packaging yield of a melt-expanded product is improved.

Drawings

Fig. 1 is a flowchart of a method for packaging a semiconductor device according to an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of a semiconductor device after fuse-expansion of a wafer according to another embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a semiconductor device after fuse-expansion of a wafer according to another embodiment of the present invention;

FIG. 4 is a schematic structural diagram of an auxiliary pressure fixture according to another embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a base according to another embodiment of the present invention;

FIG. 6 is a schematic structural diagram of a base according to another embodiment of the present invention;

FIG. 7 is a schematic structural diagram of an auxiliary pressure fixture according to another embodiment of the present invention;

fig. 8 is a schematic structural diagram of a semiconductor device packaging system according to another embodiment of the present invention.

Detailed Description

In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

In one aspect of the present invention, as shown in fig. 1, there is provided a method S100 for packaging a semiconductor device, the method S100 comprising:

s110, providing a semiconductor device subjected to fusion-expansion mounting, wherein the semiconductor device comprises a wafer carrying table, a chip arranged on the wafer carrying table and an alloy bonding layer clamped between the back surface of the chip and the wafer carrying table.

Illustratively, in conjunction with fig. 2 and 3, a fusion-bonded semiconductor device 200 is provided, the semiconductor device 200 including a stage 210, a chip 220 disposed on the stage 210, and an alloy adhesive layer 230 interposed between a back surface of the chip 220 and the stage 210. The semiconductor device 200 may further include a pin 240 so that the semiconductor device 200 can be electrically connected to a peripheral circuit through the pin 240.

And S120, continuously applying preset auxiliary pressure to the front surface of the chip through an auxiliary pressure clamp under the condition of high-temperature vacuum reflux of the semiconductor device until the reflux is finished, and releasing the auxiliary pressure after the temperature is reduced to the preset temperature so as to discharge the cavity in the alloy bonding layer.

Illustratively, in conjunction with fig. 2 to 4, the semiconductor device 200 is subjected to a high-temperature vacuum reflow, and a predetermined auxiliary pressure is continuously applied to the front surface of the die 220 by the auxiliary pressure fixture 100 until the reflow is completed, and the auxiliary pressure is released after the temperature is decreased to the predetermined temperature, so as to discharge the voids 231 in the alloy bonding layer 230.

According to the packaging method of the semiconductor device, under the high-temperature vacuum backflow condition, the auxiliary pressure clamp is used, and the cavities in the alloy bonding layer can be effectively discharged under the comprehensive action of vacuum, high temperature and mechanical pressure, so that the risk of cavity occurrence is reduced, the combination of the chip and the wafer carrying table is enhanced, the electric conductivity and the heat conduction performance of the semiconductor device are improved, and the packaging yield of a melt-expanded product is improved.

For example, in combination with fig. 2 to 8, the auxiliary pressure fixture 100 includes a base 110 and an upper cover 120 disposed on the base 110, wherein a side of the upper cover 120 facing the base 110 is provided with a pressing contact block 130, and a preset auxiliary pressure is continuously applied to the front surface of the chip 220, and the auxiliary pressure fixture includes: the semiconductor device 200 is placed on the base 110. The upper cover 120 provided with the lower press contact block 130 is pressed on the base 110 so that the lower press contact block 130 abuts against the front surface of the chip 220 to continuously apply the auxiliary pressure to the front surface of the chip 220 by the weight of the upper cover 120.

According to the packaging method of the semiconductor device, the upper cover comprises the base and the upper cover provided with the downward pressing contact block, and the auxiliary pressure is continuously applied to the front face of the chip under the action of the weight of the upper cover, so that the cavity in the alloy bonding layer can be effectively discharged under the comprehensive action of vacuum, high temperature and mechanical pressure, the risk of cavity occurrence is further reduced, the combination of the chip and the wafer carrying table is enhanced, the electric conductivity and the heat conductivity of the semiconductor device are improved, and the packaging yield of a melt-expanded product is improved.

Illustratively, in conjunction with fig. 4 and 7, the auxiliary pressure fixture 100 further includes a limiting fixing seat 140, the limiting fixing seat 140 is disposed between the base 110 and the upper cover 120, and the limiting fixing seat 140 is provided with a limiting through hole (not shown), which corresponds to the chip 220. The upper cover 120 provided with the lower contact block 130 is pressed on the base 110, so that the lower contact block 130 abuts against the front surface of the chip 220, including: the lower contact block 130 is inserted through the through hole until it abuts the front surface of the chip 220.

According to the packaging method of the semiconductor device, the downward pressing contact block can be fixed and limited in the process of using the auxiliary pressure clamp through the limiting fixing seat in the auxiliary pressure clamp, the downward pressing contact block is prevented from being displaced, the efficiency of discharging alloy bonding layer cavities is further improved, the risk of cavities is reduced, the combination of a chip and a wafer carrying table is enhanced, the electric conductivity and the heat conductivity of the semiconductor device are improved, and the packaging yield of a melt-expanded product is improved.

Illustratively, in conjunction with fig. 2 and 4, the continuously applying a preset auxiliary pressure to the front surface of the die 220 by the auxiliary pressure fixture 100 further includes: the upper cover 120 is designed to have different weights according to different semiconductor devices 200 to apply different auxiliary pressures to the front surfaces of the chips 220 of the different semiconductor devices 200.

According to the packaging method of the semiconductor device, the upper covers with different weights are designed for different semiconductor devices, different auxiliary pressures can be applied to the front sides of the chips of the different semiconductor devices, the efficiency of discharging alloy bonding layer cavities is further improved, the risk of cavities is reduced, the combination of the chips and the wafer carrying table is enhanced, the electric conductivity and the heat conduction performance of the semiconductor devices are improved, and the packaging yield of fusion-expanded products is improved.

Illustratively, the predetermined temperature is in a range of 75 ℃ to 85 ℃. For example, the preset temperature may be 75 ℃, 76 ℃, 77 ℃, 78 ℃ or 79 ℃, or 80 ℃, or 81 ℃, 82 ℃, 83 ℃, 84 ℃ or 85 ℃, and the like, and those skilled in the art may select the preset temperature according to actual needs, which is not limited in this embodiment.

According to the packaging method of the semiconductor device, after the high-temperature vacuum reflux is finished, the auxiliary pressure is relieved when the temperature is reduced to 75-85 ℃, the efficiency of discharging the alloy bonding layer cavity can be further improved, the risk of cavity generation is reduced, the combination of the chip and the slide holder is enhanced, the electric conductivity and the heat conductivity of the semiconductor device are improved, and the packaging yield of the fusion-expanded product is improved.

The above process is explained in detail with reference to fig. 2 to 7.

The melt-mounted semiconductor device 200 is placed on the base 110. The upper cover 120 with the lower contact block 130 is pressed on the base 110, and the lower contact block 130 continuously applies a predetermined auxiliary mechanical pressure to the front surface of the chip 220 under the weight of the upper cover 120. Placing the auxiliary pressure clamp 100 and the semiconductor device 200 on a feeding frame of a vacuum reflow device, so that the auxiliary pressure clamp 100 and the semiconductor device 200 are automatically fed into a vacuum reflow furnace, under the condition of high-temperature vacuum reflow, the alloy bonding layer 230 between the chip 220 and the wafer stage 210 is gradually melted under the action of high temperature, under the combined action of mechanical pressure and vacuum, the hollow 231 in the alloy bonding layer 230 is gradually and effectively discharged, after the reflow is finished, the auxiliary pressure clamp 100 and the semiconductor device 200 are slowly sent out to a discharging frame of the vacuum reflow device, after the temperature is reduced to about 80 ℃, the auxiliary mechanical pressure is released, the semiconductor device 200 is taken out from the auxiliary pressure clamp 100, and the discharge work of the hollow in the alloy bonding layer is finished.

In another aspect of the present invention, as shown in fig. 4, an auxiliary pressure jig 100 for semiconductor device packaging is provided. Referring to fig. 2 and 3 together, the semiconductor device is a fusion-bonded semiconductor device 200, and the semiconductor device 200 includes a stage 210, a chip 220 disposed on the stage 210, and an alloy adhesive layer 230 interposed between a back surface of the chip 220 and the stage 210. The auxiliary pressure clamp 100 may be manufactured by the manufacturing method described above, and reference may be made to the related description, which is not described herein again. The auxiliary pressure jig 100 includes a base 110 and an upper cover 120.

Illustratively, in conjunction with fig. 2 and 4, the base 110 is used to carry a semiconductor device 200. The upper cover 120 is disposed on the base 110, and the upper cover 120 may be made of a metal material to improve its heat-conducting property. The upper cover 120 is provided with a lower contact block 130 on a side facing the base 110, and the lower contact block 130 can abut against the front surface of the chip 220.

The semiconductor device of this embodiment encapsulates uses auxiliary pressure anchor clamps, base and the upper cover that sets up at the base upside and be provided with the contact piece of pushing down through bearing semiconductor device, can provide supplementary mechanical pressure for semiconductor device, thereby under the high temperature vacuum backward flow condition, through the auxiliary pressure anchor clamps that use this embodiment, can utilize the vacuum, high temperature, mechanical pressure's combined action, effectively discharge the cavity in the alloy tie coat, reduce the risk that the cavity takes place, strengthen the combination of chip and slide holder, improve semiconductor device's electric conductive property and heat conductivility, promote the encapsulation yield of melt-expanded product.

It should be noted that, with reference to fig. 4 to 6, when the leads 240 in the semiconductor device 200 are higher than the stage 210, the base 110 may be provided with bumps with a predetermined height at corresponding positions of the leads 240, so that the leads 240 and the stage 210 can be attached to the base 110.

Illustratively, as shown in fig. 4, the auxiliary pressure fixture 100 further includes a limit fixing seat 140. The fixing stopper 140 may be made of a metal material to improve its heat conductivity. The limiting fixing base 140 is disposed between the base 110 and the upper cover 120, and the limiting fixing base 140 is provided with a limiting through hole (not shown) for the downward pressing contact block 130 to pass through, and the limiting through hole corresponds to the chip 220.

The semiconductor device of this embodiment encapsulates uses auxiliary pressure anchor clamps, through set up spacing fixing base between base and upper cover, can utilize this spacing fixing base to fix and spacing the contact piece that pushes down at the in-process that uses auxiliary pressure anchor clamps, prevent that the contact piece that pushes down from taking place the displacement, thereby further improve the hollow efficiency of discharge alloy tie coat, reduce the risk that the cavity takes place, strengthen the combination of chip and carrier platform, improve semiconductor device's electric conductive property and heat conductivility, promote the encapsulation yield of melt-expanding product.

Illustratively, and in conjunction with fig. 4, the push-down contact block 140 may be a resilient push-down contact block. Through pressing down the contact piece and setting up to elasticity and pressing down the contact piece, can provide certain protection to the chip when pressing down the positive butt of contact piece and chip to prevent to cause unnecessary harm to the chip.

In another aspect of the present invention, a semiconductor device packaging system is provided. Referring to fig. 4, the package system includes the auxiliary pressure clamp 100 described above, and the detailed structure of the auxiliary pressure clamp 100 can refer to the related description, which is not repeated herein. As shown in fig. 8, the packaging system further includes a heating block 310, and the base 110 is disposed on the heating block 310.

The semiconductor device packaging system of the embodiment can effectively discharge the cavity in the alloy bonding layer under the high-temperature vacuum backflow condition through the comprehensive action of vacuum, high temperature and mechanical pressure, reduce the risk of cavity occurrence, strengthen the combination of the chip and the wafer carrying table, improve the conductivity and the heat conductivity of the semiconductor device, and improve the packaging yield of the melt-expanded product.

It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.