阅读说明：本技术 一种跟随式pfc电路及开关电源 (Following type PFC circuit and switching power supply ) 是由 梅仁波 于 2021-09-03 设计创作，主要内容包括：本申请公开了一种跟随式PFC电路,属于开关电源领域,跟随式PFC电路包括：第一采样电路,与升压模块的输入端及误差放大器的反相输入脚连接,用于采集升压模块的输入电压并输出采样电压；第二采样电路,与升压模块的输出端及参考乘法器的输入脚连接,用于采集升压模块的输出电压并输出反馈电压；调节电路,分别与第一采样电路、第二采样电路以及误差放大器的反相输入脚连接,用于根据采样电压调节反馈电压；升压模块,用于接收反馈电压,并根据反馈电压调节输出电压；其中,随着输入电压的增加,输出电压跟随输入电压按一定的比例同步增加。本申请具有提高PFC电路转化效率的效果。(The application discloses following formula PFC circuit belongs to switching power supply field, and following formula PFC circuit includes: the first sampling circuit is connected with the input end of the boosting module and the inverting input pin of the error amplifier and used for collecting the input voltage of the boosting module and outputting a sampling voltage; the second sampling circuit is connected with the output end of the boosting module and the input pin of the reference multiplier and used for collecting the output voltage of the boosting module and outputting the feedback voltage; the adjusting circuit is respectively connected with the first sampling circuit, the second sampling circuit and the inverting input pin of the error amplifier and is used for adjusting the feedback voltage according to the sampling voltage; the boost module is used for receiving the feedback voltage and regulating the output voltage according to the feedback voltage; the output voltage is synchronously increased according to a certain proportion along with the increase of the input voltage. The method and the device have the effect of improving the conversion efficiency of the PFC circuit.)

1. A follower PFC circuit, comprising:

the first sampling circuit (1) is connected with the input end of the boosting module (4) and the inverting input pin of the error amplifier and is used for collecting the input voltage of the boosting module (4) and outputting a sampling voltage;

the second sampling circuit (2) is connected with the output end of the boosting module (4) and an input pin of the reference multiplier and is used for collecting the output voltage of the boosting module (4) and outputting a feedback voltage;

the adjusting circuit (3) is respectively connected with the first sampling circuit (1), the second sampling circuit (2) and the inverting input pin of the error amplifier and is used for adjusting the feedback voltage according to the sampling voltage;

the boost module (4) is used for receiving the feedback voltage and regulating the output voltage according to the feedback voltage; the output voltage is synchronously increased according to a certain proportion along with the increase of the input voltage.

2. The follower PFC circuit according to claim 1, wherein the regulation circuit (3) comprises a linear regulation block and a voltage dividing resistor R11, the linear regulation block has a first terminal, a second terminal and a third terminal, the first terminal of the linear regulation block is connected to the first sampling circuit (1), the second terminal of the linear regulation block is connected to the second sampling circuit (2) and the inverting input pin of the error amplifier, the third terminal of the linear regulation block is connected to one terminal of the voltage dividing resistor R11, and the other terminal of the voltage dividing resistor R11 is grounded.

3. The follower PFC circuit of claim 2, wherein the linearity adjustment module comprises a transistor Q2, a base of the transistor Q2 is a first terminal of the linearity adjustment module, a collector of the transistor Q2 is a second terminal of the linearity adjustment module, and an emitter of the transistor Q2 is a third terminal of the linearity adjustment module.

4. The follower PFC circuit of claim 3, wherein the regulation circuit (3) further comprises an isolation diode D2, a decoupling capacitor C9 and a current-limiting bias resistor R10, wherein an anode of the isolation diode D2 is connected with the first sampling circuit (1), a cathode of the isolation diode D2 is connected with one end of a current-limiting bias resistor R10, the other end of the current-limiting bias resistor R10 is connected with a base of a transistor Q2, a primary side of the decoupling capacitor C9 is connected with a cathode of an isolation diode D2 and the current-limiting bias resistor R10, and a secondary side of the decoupling capacitor C9 is grounded.

5. A follower PFC circuit according to claim 3, characterized in that the regulation circuit (3) further comprises a filter capacitor C11, the primary side of the filter capacitor C11 being connected to the base of the transistor Q2, and the secondary side of the filter capacitor C11 being connected to the emitter of the transistor Q2.

6. The follower PFC circuit according to claim 1, characterized in that the first sampling circuit (1) comprises a fifth resistor R5, a seventh resistor R7, a fifteenth resistor R15 and a sixteenth resistor R16 connected in series in sequence between the input terminal of the boost module (4) and the ground, and the connection point between the regulating circuit (3) and the fifteenth resistor R15 and the sixteenth resistor R16 is connected.

7. The follower PFC circuit according to claim 1, characterized in that the second sampling circuit (2) comprises a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19 and a twentieth resistor R20 connected in series in sequence between the output of the boost module (4) and ground, and the regulating circuit (3) is connected to a connection point between the nineteenth resistor R19 and the twentieth resistor R20.

8. A switching power supply comprising a follower PFC circuit according to any one of claims 1 to 7.

Technical Field

The application relates to the field of switching power supplies, in particular to a follow-up PFC circuit and a switching power supply.

Background

At the power stage of 72W-250W, most of the current PFC (power factor correction) circuits adopt a critical mode (TM mode) PFC circuit, which aims to perform phase correction by generating a phase difference between the phases of a voltage and a current after an input voltage passes through a rectifier bridge, so that the voltage and the current are in the same phase.

The critical mode PFC circuit has the advantages of low cost and simple circuit implementation, and is suitable for the field with low conventional requirements. If the current PFC circuit has limitation in a high-end field, particularly in an input voltage range of 90V-264V, the output voltage is 400V through the PFC circuit, a large inductance inductor is needed, the loss of the PFC circuit is increased, and the conversion efficiency of the PFC circuit is influenced.

Disclosure of Invention

In order to improve the conversion efficiency of the PFC circuit, the application provides a follow-up PFC circuit and a switching power supply.

In a first aspect, the following technical scheme is adopted in the following follower PFC circuit provided in the present application:

a follower PFC circuit comprising:

the first sampling circuit is connected with the input end of the boosting module and the inverting input pin of the error amplifier and used for collecting the input voltage of the boosting module and outputting a sampling voltage;

the second sampling circuit is connected with the output end of the boosting module and the input pin of the reference multiplier and used for collecting the output voltage of the boosting module and outputting the feedback voltage;

the adjusting circuit is respectively connected with the first sampling circuit, the second sampling circuit and the inverting input pin of the error amplifier and is used for adjusting the feedback voltage according to the sampling voltage;

the boost module is used for receiving the feedback voltage and regulating the output voltage according to the feedback voltage; the output voltage is synchronously increased according to a certain proportion along with the increase of the input voltage.

By adopting the technical scheme, the first sampling circuit collects input voltage, the second sampling circuit collects output voltage, and conveys feedback voltage to the regulating circuit, the regulating circuit regulates the feedback voltage according to the sampling voltage, the regulated feedback voltage is conveyed to the inverting input pin of the error amplifier, the boosting module regulates a proportional signal of the reference multiplier according to the feedback voltage, so that the output voltage is synchronously increased according to a certain proportion along with the input voltage, wherein the output voltage is gradually increased to 400V, the inductance with smaller inductance can be used, the induced current is reduced, the temperature of a boosting inductance magnetic core and a coil can be reduced, the loss of a PFC circuit is reduced, the boosting inductance mainly works in a CCM mode and a TM mode, and the conversion efficiency of the PFC circuit is improved.

Optionally, the adjusting circuit includes a linear adjusting module and a voltage dividing resistor R11, the linear adjusting module has a first end, a second end and a third end, the first end of the linear adjusting module is connected to the first sampling circuit, the second end of the linear adjusting module is connected to the second sampling circuit and the inverting input pin of the error amplifier, the third end of the linear adjusting module is connected to one end of the voltage dividing resistor R11, and the other end of the voltage dividing resistor R11 is grounded.

Through adopting above-mentioned technical scheme, the linear adjustment module switches on, the linear adjustment module is established ties with divider resistance R11, and the linear adjustment module, divider resistance R11 is parallelly connected with the second sampling circuit, when input voltage risees, the collection voltage of first sampling circuit risees, the resistance that linear adjustment module and divider resistance R11 are established ties reduces, the collection voltage of second sampling circuit follows the resistance change that linear adjustment module and divider resistance R11 are established ties, thereby make output voltage risees, and output voltage follows input voltage.

Optionally, the linear adjustment module employs a transistor Q2, a base of the transistor Q2 is a first end of the linear adjustment module, a collector of the transistor Q2 is a second end of the linear adjustment module, and an emitter of the transistor Q2 is a third end of the linear adjustment module.

By adopting the technical scheme, the triode Q2 is conducted, the triode Q2 works in a linear region, when the input voltage rises, the collection voltage of the first sampling circuit rises, the conduction internal resistance of the triode Q2 is reduced, the resistance value of the series connection of the triode Q2 and the divider resistor R11 is reduced, the collection voltage of the second sampling circuit changes along with the change of the resistance value of the series connection of the triode Q2 and the divider resistor R11, and therefore the output voltage rises and follows the input voltage.

Optionally, the adjusting circuit further includes an isolation diode D2, a decoupling capacitor C9, and a current-limiting bias resistor R10, an anode of the isolation diode D2 is connected to the first sampling circuit, a cathode of the isolation diode D2 is connected to one end of the current-limiting bias resistor R10, the other end of the current-limiting bias resistor R10 is connected to a base of the transistor Q2, a primary side of the decoupling capacitor C9 is connected to a cathode of the isolation diode D2 and the current-limiting bias resistor R10, and a secondary side of the decoupling capacitor C9 is grounded.

By adopting the technical scheme, the isolation diode D2 plays an isolation role, so that the conduction of the triode Q2 does not influence the acquisition signal of the input pin of the reference multiplier; the decoupling capacitor C9 performs a filtering function, and the current-limiting bias resistor R10 provides a dc bias to the transistor Q2.

Optionally, the adjusting circuit further includes a filter capacitor C11, a primary side of the filter capacitor C11 is connected to a base of the transistor Q2, and a secondary side of the filter capacitor C11 is connected to an emitter of the transistor Q2.

By adopting the technical scheme, the filter capacitor C11 is arranged, so that the phenomenon that the triode Q2 is conducted by mistake due to peak interference voltage provided between the base electrode and the emitting electrode of the triode Q2 at the moment of starting up can be effectively avoided.

Optionally, the first sampling circuit includes a fifth resistor R5, a seventh resistor R7, a fifteenth resistor R15 and a sixteenth resistor R16 which are connected in series between the input end of the boost module and the ground in sequence, and the adjusting circuit is connected to a connection point between the fifteenth resistor R15 and the sixteenth resistor R16.

By adopting the technical scheme, the sampling of the input voltage is completed by the fifth resistor R5, the seventh resistor R7, the fifteenth resistor R15 and the sixteenth resistor R16, and the sampling circuit of the original circuit is utilized, so that the circuit is simple and the cost is low.

Optionally, the second sampling circuit includes a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, and a twentieth resistor R20 connected in series between the output terminal of the boost module and ground in sequence, and the adjusting circuit is connected to a connection point between the nineteenth resistor R19 and the twentieth resistor R20.

By adopting the technical scheme, the seventeenth resistor R17, the eighteenth resistor R18, the nineteenth resistor R19 and the twentieth resistor R20 are used for sampling the output voltage, and the sampling circuit of the original circuit is utilized, so that the circuit is simple and the cost is low.

In a second aspect, the present application provides a switching power supply, which adopts the following technical scheme:

a switching power supply comprises the following PFC circuit.

In summary, the present application includes at least one of the following beneficial technical effects:

1. the requirement on the inductance of the boost inductor is reduced, the size of the boost inductor of the PFC circuit can be reduced, and the temperature of a magnetic core and a coil of the boost inductor can be reduced;

2. the loss of the power switch tube is reduced;

3. the conversion efficiency of the PFC circuit in the whole input voltage range is improved;

4. the cost of the PFC circuit is reduced.

The technical difficulty of the application is that the output voltage is synchronously increased along with the input voltage according to a certain proportion by the methodology provided by the applicant, and the circuit is built according to the methodology.

Drawings

Fig. 1 is a circuit schematic diagram of a PFC circuit in the related art;

fig. 2 is a schematic circuit diagram of a follower PFC circuit according to an embodiment of the present disclosure.

Description of reference numerals:

1. a first sampling circuit; 2. a second sampling circuit; 3. a regulating circuit; 4. and a boost module.

Detailed Description

The present application is described in further detail below with reference to figures 1-2.

Referring to fig. 1, a PFC circuit in the related art: the error amplifier with low frequency pole in the chip provides an error reference signal to the reference multiplier, the other input signal of the reference multiplier is the proportional signal of the rectified input voltage, the output of the reference multiplier is the product of the error reference signal and the proportional signal of the input voltage, namely, the sine signal after full bridge rectification after gain coefficient transformation, and is used as the reference of the input voltage at the same time, the amplitude of the sine signal can keep stable average power after being adjusted, and the output voltage can keep stable.

The proportional signal of the input voltage is continuously changed along with the change of the input voltage, the error reference signal provided by the error amplifier with the low-frequency pole to the reference multiplier is correspondingly changed, and the working mode of the boost inductor is correspondingly changed. In the operating range of 90V-264V, the boost inductor respectively operates in a DCM (discontinuous mode), a TM (critical mode) and a CCM (continuous mode), and in the three operating modes, the conversion efficiency of the PFC circuit shows different effects, wherein the efficiency of the CCM is the highest, the TM is the second, and the DCM is the worst.

Wherein the content of the first and second substances,in the formula: k is the duty cycle, V_inFor input voltage, V_outIs the output voltage.

When the input voltage is 90V and the output voltage is 400V, the duty ratio is small, but a boosting inductor with large inductance is needed to store energy to boost the voltage to 400V, and if the inductance of the boosting inductor is too large, the boosting inductor is easy to saturate. In the range of 90V-264V, the inductance of the required boost inductor decreases as the input voltage increases. If the inductance decreases, the boost inductor enters CCM mode at 90V input, and as the input voltage increases, the boost inductor has exited CCM mode and enters DCM mode. If the input voltage is 264V and the output voltage is 400V, the inductance required by the boost inductor is small but the duty ratio is large. Therefore, the output voltage is directly increased to 400V, the boost inductor of the PFC circuit mainly works in a DCM mode and a TM mode, the working area of the CCM mode is small, and the conversion efficiency of the PFC circuit is influenced.

The embodiment of the application discloses a follow-up PFC circuit. Referring to fig. 2, the follower PFC circuit includes a first sampling circuit 1, a second sampling circuit 2, a regulating circuit 3, and a boost module 4, where the first sampling circuit 1 is connected to an input terminal of the boost module 4 and an inverting input pin of the error amplifier, and is configured to collect an input voltage of the boost module 4 and output the sampled voltage. The second sampling circuit 2 is connected to the output terminal of the boost module 4 and the input pin of the reference multiplier, and is configured to collect the output voltage of the boost module 4 and output a feedback voltage. The adjusting circuit 3 is respectively connected with the first sampling circuit 1, the second sampling circuit 2 and the inverting input pin of the error amplifier, and is used for adjusting the feedback voltage according to the sampling voltage. The boost module 4 is used for receiving the feedback voltage and regulating the output voltage according to the feedback voltage, wherein the output voltage is synchronously increased along with the input voltage according to a certain proportion along with the increase of the input voltage.

In the present embodiment, the inverting input pin of the error amplifier is the INV pin of the chip U4 of the boost module 4, and the input pin of the reference multiplier is the MUL pin of the chip U4 of the boost module 4. The first sampling circuit 1 comprises a fifth resistor R5, a seventh resistor R7, a fifteenth resistor R15 and a sixteenth resistor R16 which are sequentially connected in series between the input end of the boost module 4 and the ground, and the MUL pin of the chip U4 is connected with the fifteenth resistor R15 and the sixteenth resistor R16. The second sampling circuit 2 comprises a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19 and a twentieth resistor R20 which are sequentially connected in series between the output end of the boost module 4 and the ground, and the INV pin of the chip U4 is connected with the nineteenth resistor R19 and the twentieth resistor R20.

In this embodiment, the adjusting circuit 3 includes a linear adjusting module and a voltage dividing resistor R11, the linear adjusting module has a first end, a second end and a third end, the first end of the linear adjusting module is connected to the first sampling circuit 1, the second end of the linear adjusting module is connected to the second sampling circuit 2 and the INV pin of the chip U4, the third end of the linear adjusting module is connected to one end of the voltage dividing resistor R11, and the other end of the voltage dividing resistor R11 is grounded.

In this embodiment, the linear adjustment module employs a transistor Q2, the transistor Q2 is an NPN-type transistor, a base of the transistor Q2 is a first end of the linear adjustment module, a collector of the transistor Q2 is a second end of the linear adjustment module, and an emitter of the transistor Q2 is a third end of the linear adjustment module.

The regulating circuit 3 further comprises an isolating diode D2, a decoupling capacitor C9, a current-limiting bias resistor R10 and a filter capacitor C11, wherein the anode of the isolating diode D2 is connected with a fifteenth resistor R15 and a sixteenth resistor R16, the cathode of the isolating diode D2 is connected with one end of the current-limiting bias resistor R10, and the other end of the current-limiting bias resistor R10 is connected with the base of the triode Q2. The primary side of the decoupling capacitor C9 is connected to the cathode of the isolation diode D2 and the current limiting bias resistor R10, and the secondary side of the decoupling capacitor C9 is grounded.

The input voltage of the PFC circuit is divided by a fifth resistor R5, a seventh resistor R7, a fifteenth resistor R15 and a sixteenth resistor R16, sampled and transmitted to an MUL pin of a chip U4, in order to not influence the sampling signal of the MUL pin of the chip U4, the sampling signal is isolated by an isolation diode D2, decoupled by a decoupling capacitor C9 and then biased to the base of a triode Q2 by a current-limiting bias resistor R10.

The output voltage of the PFC circuit is subjected to voltage division and sampling through a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19 and a twentieth resistor R20 to obtain a feedback voltage, and the feedback voltage is supplied to an INV pin of the chip U4, wherein the INV pin is a feedback pin of the output voltage, and the output voltage of the PFC circuit can be changed by changing the feedback voltage of the INV pin.

The working state of the triode Q2 is a linear region (amplification region), the divider resistor R11 is connected between the emitter of the triode Q2 and the ground, and the filter capacitor C11 is connected between the base and the emitter, so that the situation that the triode Q2 is turned on by mistake due to the increase of the instantaneous voltage during startup can be effectively avoided, the 2.5V reference voltage of the INV pin provides a forward bias voltage for the collector of the triode Q2, and then:

V_R16＝0.6+I_b·R_1o+0.6+V_R11；

I_C＝β·I_b；

in the formula I_bIs the current at the base of the transistor Q2; beta is the amplification factor of the triode Q2; v_R11Is the voltage across divider resistor R11; v_R16Is the voltage across the sixteenth resistor R16;

from the three formulas above, one can derive:

in addition, the triode Q2 is connected in series with the voltage dividing resistor R11 and then connected in parallel with the twentieth resistor R20, and then: v_R11＝V_R20-V_CEWherein V is_CEIs the voltage between the collector and emitter of transistor Q2, V_R20Is the voltage across the twentieth resistor R20;

it is possible to obtain:i.e. V_R16And V_CECan cause V_R20And the variation relationship is a primary direct proportional function relationship. V_R16For collecting the input voltage, and V_R20The output voltage is the feedback voltage of the output voltage, so the output voltage is synchronously increased along with the input voltage according to a certain proportion along with the increase of the input voltage.

The implementation principle of the following PFC circuit in the embodiment of the application is as follows: in the operating range of 90V-264V, transistor Q2 is conducting, and transistor Q2 operates in the linear region, then:and V_R16For collecting the input voltage, and V_R20The output voltage is feedback voltage of the output voltage, so as to increase along with the increase of the input voltage, the output voltage is increased along with the input voltage according to the proportion of the primary direct proportion function, and the output voltage follow-up type rising is realized until the input voltage reaches 264V and the output voltage stops increasing when the output voltage reaches 400V.

The output voltage is increased in a following mode, the amplitude of the output voltage is stable, the proportional signal of the input voltage is almost unchanged, the error reference signal provided by the error amplifier at the low-frequency pole to the reference multiplier is also almost unchanged, and the boost inductor mainly works in a CCM mode and a TM mode, so that the conversion efficiency of the PFC circuit in the whole input voltage range is improved.

The output voltage rises in a following mode, the inductance of the boost inductor and the duty ratio of the power switch tube are considered, the temperature of a magnetic core and a coil of the boost inductor can be reduced, the induced current is reduced, and the loss of the power switch tube can be reduced.

The embodiment of the application also discloses a switching power supply which comprises the following PFC circuit.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.