阅读说明：本技术 基于分数倍额定容量功率器件的交错并联逆变器控制方法 (Staggered parallel inverter control method based on fractional rated capacity power device ) 是由 刘侃 吴家明 丁荣军 张定华 段辉高 周剑 陈泳丹 栾皓喆 李凯卿 周世超 于 2021-07-20 设计创作，主要内容包括：本发明属于逆变器技术领域,提供基于分数倍额定容量功率器件的交错并联逆变器控制方法,包括：获取交错并联逆变器当前的工作模式,交错并联逆变器基于分数倍额定容量功率器件；根据工作模式判断功率器件的开关模式,开关模式包括顺序开关与同步开关；基于已知的参考交轴电压与参考直轴电压,结合顺序开关或同步开关,通过预设的空间矢量脉宽调制单元输出脉冲驱动信号,并根据脉冲驱动信号控制交错并联逆变器。本发明能够根据不同的工作模式输出不同的开关模式(顺序开关与同步开关),能有效提高各相中功率器件的容量利用率,且选用分数倍额定容量的功率器件在提高系统功率密度的同时减小了系统体积、重量,降低了系统成本。(The invention belongs to the technical field of inverters, and provides a control method of a staggered parallel inverter based on a fractional rated capacity power device, which comprises the following steps: acquiring a current working mode of a staggered parallel inverter, wherein the staggered parallel inverter is based on a fractional-multiple rated capacity power device; judging a switching mode of the power device according to the working mode, wherein the switching mode comprises a sequential switch and a synchronous switch; based on the known reference quadrature axis voltage and the reference direct axis voltage, in combination with sequential switching or synchronous switching, a pulse driving signal is output through a preset space vector pulse width modulation unit, and the interleaved parallel inverter is controlled according to the pulse driving signal. The invention can output different switch modes (sequential switch and synchronous switch) according to different working modes, can effectively improve the capacity utilization rate of the power devices in each phase, and reduces the volume and the weight of the system and the cost of the system by selecting the power devices with fractional rated capacity while improving the power density of the system.)

1. The control method of the staggered parallel inverter based on the fractional rated capacity power device is characterized by comprising the following steps of:

acquiring a current working mode of the staggered parallel inverter, wherein the staggered parallel inverter is based on a fractional-multiple rated capacity power device;

Judging a switching mode of the power device according to the working mode, wherein the switching mode comprises a sequential switch and a synchronous switch;

based on the known reference quadrature axis voltage and the reference direct axis voltage, in combination with the sequential switch or the synchronous switch, a pulse driving signal is output through a preset space vector pulse width modulation unit, and the interleaved parallel inverter is controlled according to the pulse driving signal.

2. The method of claim 1, wherein the fractional multiple comprises 1/2 times, when the interleaved parallel inverter is based on the 1/2 times rated capacity power device, the operation mode comprises 0-1/2 times system output power and 1/2 times full system output power, and the step of determining the switching mode of the power device according to the operation mode comprises:

if the working mode is in the range of 0-1/2 times of system output power, conducting one power device for each phase, and judging that the switching mode of the power device is sequential switching, wherein the interleaved parallel inverter comprises a plurality of phases, and each phase comprises a plurality of power devices;

And if the working mode is 1/2 times to full system output power, conducting two power devices each time the working mode is the same, and judging that the switching mode of the power devices is a synchronous switch.

3. The method of claim 2, wherein the fractional multiple comprises 1/3 times, when the interleaved parallel inverter is based on the 1/3 times rated capacity power device, the operation mode comprises 0-1/3 times system output power, 1/3-2/3 times system output power and 2/3 times full system output power, and the step of determining the switching mode of the power device according to the operation mode comprises:

if the working mode is in the range of 0-1/3 times of system output power, conducting one power device for each phase, and judging that the switching mode of the power device is the sequential switch;

if the working mode is 1/3 times to 2/3 times of system output power, conducting two power devices each time the working mode is the same, and judging that the switching mode of the power devices is the synchronous switch;

if the working mode is 2/3 times to full system output power, three power devices are conducted every same time, and the power devices are judged to be the synchronous switches.

4. A staggered parallel inverter based on fractional rated capacity power devices is characterized by comprising a capacitor, a motor, an A-phase bridge inverter unit, a B-phase bridge inverter unit, a C-phase bridge inverter unit, an A-phase coupling inductor, a B-phase coupling inductor and a C-phase coupling inductor;

the capacitors are connected in parallel at two ends of the direct current bus, and the input end of the A-phase bridge inverter unit, the input end of the B-phase bridge inverter unit and the input end of the C-phase bridge inverter unit are connected in parallel at two ends of the direct current bus;

the output end of the A-phase bridge inverter unit is connected with the input end of the A-phase coupling inductor, the output end of the B-phase bridge inverter unit is connected with the input end of the B-phase coupling inductor, and the output end of the C-phase bridge inverter unit is connected with the input end of the C-phase coupling inductor;

the output end of the phase A coupling inductor, the output end of the phase B coupling inductor and the output end of the phase C coupling inductor are connected with the motor.

5. The interleaved parallel inverter based on fractional rated capacity power devices according to claim 4, wherein the A-phase bridge inverter unit, the B-phase bridge inverter unit and the C-phase bridge inverter unit have the same structure and respectively comprise n bridge arms, and n is an integer greater than or equal to 3.

6. The interleaved parallel inverter based on fractional capacity rated power devices of claim 4 wherein said phase A coupling inductance, said phase B coupling inductance and said phase C coupling inductance are identical in structure.

7. A motor control system based on an interleaved parallel inverter, the interleaved parallel inverter based on fractional rated capacity power devices, comprising:

the system comprises a preprocessing unit, a working mode judging unit, a space vector pulse width modulation unit, the staggered parallel inverter and a motor, wherein the preprocessing unit and the working mode judging unit are connected with the space vector pulse width modulation unit, the space vector pulse width modulation unit is connected with the staggered parallel inverter, the staggered parallel inverter is connected with the motor, and the working mode judging unit is also connected with the motor;

the space vector pulse width modulation unit outputs a pulse driving signal to control the interleaved parallel inverter according to the reference quadrature axis voltage, the reference direct axis voltage and a switching mode output pulse driving signal of the power device, and the interleaved parallel inverter supplies power to the motor.

8. The interleaved parallel inverter based motor control system of claim 7 wherein the pre-processing unit comprises a first controller, a second controller and a third controller, the first controller connected to the second controller, the second controller and the third controller each connected to the space vector pulse width modulation unit.

9. The interleaved parallel inverter based motor control system of claim 7 further comprising a signal conversion unit having one end connected between the interleaved parallel inverter and the motor and the other end connected to the pre-processing unit for converting the current of the motor.

10. An electronic device, comprising: memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps in the fractional rated capacity power device based interleaved parallel inverter control method according to any of claims 1 to 3 when executing the computer program.

Technical Field

The invention belongs to the technical field of inverters, and particularly relates to a control method of a staggered parallel inverter based on a fractional rated capacity power device.

Background

With the continuous increase of the power grade of an electric drive system, the switching loss of a power device becomes high, the switching frequency of the power device is limited, and when the switching frequency is low, voltage and current are easy to generate harmonic waves, and the output torque of a motor fluctuates.

At present, circuit topological structures such as a midpoint clamp type three-level inverter, an H-bridge cascade multi-level inverter, staggered parallel connection and the like are provided to reduce harmonic waves, so that motor noise and output torque fluctuation are reduced. However, the midpoint clamping type three-level inverter has the problem of unbalanced capacitance and voltage on the direct current side, the neutral point potential fluctuates, and when the back voltage born by the power device is not uniform, the power device may be damaged. The H-bridge cascaded multi-level inverter usually uses a transformer to isolate the bus voltage in different full bridges, which increases the cost and complexity of the system. The interleaving parallel topology structure can multiply increase the equivalent switching frequency of a high-power electric drive system, inhibit harmonic waves in voltage and current, and further reduce torque fluctuation and motor noise, but the traditional interleaving parallel topology structure has high cost, low capacity utilization rate of a power device and low power density of the system. Therefore, in the prior art, the interleaved parallel inverter system has the problems of low capacity utilization rate, low system power density and high cost.

Disclosure of Invention

The invention provides a control method of a staggered parallel inverter based on a fractional rated capacity power device, aiming at improving the capacity utilization rate of a staggered parallel inverter system, reducing the volume and weight of the system and lowering the cost of the system while improving the power density of the system.

The invention provides a control method of a staggered parallel inverter based on a fractional rated capacity power device, wherein the staggered parallel inverter based on the fractional rated capacity power device comprises the following steps:

acquiring a current working mode of the staggered parallel inverter, wherein the staggered parallel inverter is based on a fractional-multiple rated capacity power device;

judging a switching mode of the power device according to the working mode, wherein the switching mode comprises a sequential switch and a synchronous switch;

based on the known reference quadrature axis voltage and the reference direct axis voltage, in combination with the sequential switch or the synchronous switch, a pulse driving signal is output through a preset space vector pulse width modulation unit, and the interleaved parallel inverter is controlled according to the pulse driving signal.

Further, the fractional multiple includes 1/2 times, when the interleaved parallel inverter is based on the power device with 1/2 times rated capacity, the operation mode includes 0-1/2 times system output power and 1/2 times full system output power, and the step of determining the switching mode of the power device according to the operation mode includes:

If the working mode is in the range of 0-1/2 times of system output power, conducting one power device for each phase, and judging that the switching mode of the power device is sequential switching, wherein the interleaved parallel inverter comprises a plurality of phases, and each phase comprises a plurality of power devices;

and if the working mode is 1/2 times to full system output power, conducting two power devices each time the working mode is the same, and judging that the switching mode of the power devices is a synchronous switch.

Further, the fractional multiple includes 1/3 times, when the interleaved parallel inverter is based on the power device with 1/3 times rated capacity, the operation mode includes 0-1/3 times of system output power, 1/3-2/3 times of system output power and 2/3 times of full system output power, and the step of determining the switching mode of the power device according to the operation mode includes:

if the working mode is in the range of 0-1/3 times of system output power, conducting one power device for each phase, and judging that the switching mode of the power device is the sequential switch;

if the working mode is 1/3 times to 2/3 times of system output power, conducting two power devices each time the working mode is the same, and judging that the switching mode of the power devices is the synchronous switch;

If the working mode is 2/3 times to full system output power, conducting the three power devices every time the working mode is the same, and judging that the switching mode of the power devices is the synchronous switch.

The embodiment of the invention also provides a staggered parallel inverter based on the fractional rated capacity power device, which comprises a capacitor, a motor, an A-phase bridge inverter unit, a B-phase bridge inverter unit, a C-phase bridge inverter unit, an A-phase coupling inductor, a B-phase coupling inductor and a C-phase coupling inductor;

the capacitors are connected in parallel at two ends of the direct current bus, and the input end of the A-phase bridge inverter unit, the input end of the B-phase bridge inverter unit and the input end of the C-phase bridge inverter unit are connected in parallel at two ends of the direct current bus;

the output end of the A-phase bridge inverter unit is connected with the input end of the A-phase coupling inductor, the output end of the B-phase bridge inverter unit is connected with the input end of the B-phase coupling inductor, and the output end of the C-phase bridge inverter unit is connected with the input end of the C-phase coupling inductor;

the output end of the phase A coupling inductor, the output end of the phase B coupling inductor and the output end of the phase C coupling inductor are connected with the motor.

Furthermore, the phase-A bridge inverter unit, the phase-B bridge inverter unit and the phase-C bridge inverter unit have the same structure and respectively comprise n bridge arms, and n is an integer greater than or equal to 3.

Furthermore, the phase a coupling inductor, the phase B coupling inductor and the phase C coupling inductor have the same structure.

The embodiment of the present invention further provides a motor control system based on a staggered parallel inverter, where the staggered parallel inverter is based on a fractional-multiple rated capacity power device, and the motor control system includes:

the system comprises a preprocessing unit, a working mode judging unit, a space vector pulse width modulation unit, the staggered parallel inverter and a motor, wherein the preprocessing unit and the working mode judging unit are connected with the space vector pulse width modulation unit, the space vector pulse width modulation unit is connected with the staggered parallel inverter, the staggered parallel inverter is connected with the motor, and the working mode judging unit is also connected with the motor;

the space vector pulse width modulation unit outputs a pulse driving signal to control the interleaved parallel inverter according to the reference quadrature axis voltage, the reference direct axis voltage and a switching mode output pulse driving signal of the power device, and the interleaved parallel inverter supplies power to the motor.

Furthermore, the preprocessing unit comprises a first controller, a second controller and a third controller, wherein the first controller is connected with the second controller, and the second controller and the third controller are connected with the space vector pulse width modulation unit.

Furthermore, the motor control system further comprises a signal conversion unit, wherein one end of the signal conversion unit is connected between the staggered parallel inverter and the motor, and the other end of the signal conversion unit is connected with the preprocessing unit and used for converting the current of the motor.

An embodiment of the present invention further provides an electronic device, including: the control method comprises the steps of a memory, a processor and a computer program stored on the memory and capable of running on the processor, wherein the processor executes the computer program to realize the steps of the control method for the interleaved parallel inverters based on the fractional rated capacity power device according to any one of the above embodiments.

The invention achieves the following beneficial effects: the invention provides the staggered parallel inverter based on the power device with fractional-multiple rated capacity, which can change working modes according to different working states, the switching modes are different under different working modes, then the switching modes of the power device in the inverter are judged according to the working modes, the equivalent driving signals of each phase of the inverter corresponding to different switching modes are different, the switching frequency of each phase is different, and the switching frequency of each phase is increased by one time or more, compared with the single switching mode in the traditional staggered parallel topology, the capacity utilization rate of the power device in each phase is effectively increased; in addition, the power device with fractional rated capacity is selected, so that the system power density is improved, the system volume and weight are reduced, and the system cost is reduced.

Drawings

Fig. 1 is a flowchart of an interleaved parallel inverter control method based on a fractional rated capacity power device according to an embodiment of the present invention;

fig. 2 is a circuit diagram of an interleaved parallel inverter based on a fractional rated capacity power device according to an embodiment of the present invention;

FIG. 3 is a timing diagram of the switch mode provided by the embodiment of the present invention as a sequential switch;

FIG. 4 is a timing diagram of the embodiment of the present invention in which the switching pattern is a synchronous switch;

FIG. 5 is another timing diagram of the embodiment of the present invention in which the switching pattern is a synchronous switch;

FIG. 6 is a block diagram of a motor control system based on interleaved inverters according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a motor control system based on interleaved inverters according to an embodiment of the present invention;

fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;

the system comprises an A-phase bridge inverter unit, a 2-phase bridge inverter unit, a B-phase bridge inverter unit, a 3-phase bridge inverter unit, a C-phase bridge inverter unit, a 4-phase motor, a 5-phase preprocessing unit, a 6-phase first controller, a 7-phase second controller, a 8-phase third controller, a 9-phase working mode judging unit, a 10-phase space vector pulse width modulation unit, 11-phase interleaved parallel inverters, 12-phase signal conversion units.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terms "comprising" and "having," and any variations thereof, in the description and claims of this application and the description of the figures are intended to cover non-exclusive inclusions. The terms "first," "second," and the like in the description and claims of this application or the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

As shown in fig. 1, fig. 1 is a flowchart of an interleaved parallel inverter control method based on a fractional rated capacity power device according to an embodiment of the present invention, where the interleaved parallel inverter control method based on the fractional rated capacity power device includes the following steps:

101. and acquiring the current working mode of the interleaved parallel inverter, wherein the interleaved parallel inverter is based on a fraction-time rated capacity power device.

In the embodiment, the proposed staggered parallel inverter control method based on the fractional rated capacity power device can be used in equipment such as marine carrying equipment. The electronic equipment on which the staggered parallel inverter control method based on the fractional rated capacity power device operates can be in network connection in a wired connection mode or a wireless connection mode, and signal transmission is achieved. The Wireless connection may include, but is not limited to, a 3G/4G connection, a WiFi (Wireless-Fidelity) connection, a bluetooth connection, a wimax (worldwide Interoperability for Microwave access) connection, a Zigbee (low power local area network protocol), a uwb (ultra wideband) connection, and other Wireless connection methods now known or developed in the future.

Referring to fig. 2, fig. 2 is a circuit diagram of an interleaved parallel inverter according to the present invention. The inverter comprises three phases, namely an A phase, a B phase and a C phase, each phase comprises 3 bridge inverter units consisting of 2 power devices, and each phase is connected to a Permanent Magnet Synchronous Motor (PMSM) through a coupling inductor. In the power device of the interleaved parallel inverter based on fractional rated capacity, the power device may include an Insulated Gate Bipolar Transistor (IGBT), and the rated capacity may refer to a rated capacity of a full system output to be applied. The above-mentioned fractional multiple may include 1/2 times and 1/3 times in this embodiment, and may be other fractional multiples.

Specifically, the obtaining of the current operating mode of the interleaved parallel inverter may be obtained through a preset device, for example, a display directly reads data. When the interleaved parallel inverter is based on 1/2 times rated capacity of power devices, the working modes can include two modes of 0-1/2 times of system output power and 1/2 times of full system output power. When the interleaved parallel inverter is based on 1/3 times rated capacity of power devices, the working modes can include three modes of 0-1/3 times of system output power, 1/3-2/3 times of system output power and 2/3 times of full system output power.

102. And judging the switching mode of the power device according to the working mode, wherein the switching mode comprises sequential switching and synchronous switching.

As a possible embodiment, when the interleaved parallel inverter is based on 1/2 times rated capacity of power devices and the operation mode is 0-1/2 times system output power, because the rated capacity of the selected power device is 1/2 times of full system output power, each phase turns on one power device, and the switching mode of the power device is determined to be sequential switching. Referring to fig. 3, fig. 3 is a timing diagram of the switching mode being sequential switching. Taking phase A as an example, wherein: as can be seen from fig. 3, the frequency of the equivalent driving signal of a phase is equal to 3 times of the frequency of the driving signal of each power device of a phase, that is, in one period, the equivalent driving signal outputs three high levels, and the high level of the driving signal of each power device of a phase is one, which indicates that the equivalent switching frequency of a phase also becomes 3 times of the switching frequency of the power device. Similarly, B and C have the same principle.

In addition, when the interleaved parallel inverter is based on 1/2 times of power devices with rated capacity and the working mode is 1/2 times to full system output power, because the rated capacity of the selected power device is 1/2 times of the full system output power, each phase needs to simultaneously turn on two power devices, and the switching mode of the power devices is determined to be synchronous switching. As shown in fig. 4, fig. 4 is a timing chart in which the switching pattern is a synchronous switch. Also taking phase a as an example, it can be known from fig. 4 that the frequency of the equivalent driving signal of phase a is equal to 1.5 times of the frequency of the driving signal of each power device of phase a, i.e. in one period, the equivalent driving signal appears three high level outputs, but the driving signal of each power device in phase a is two, which indicates that the equivalent switching frequency of phase a also becomes 1.5 times of the switching frequency of the power device. Similarly, B and C have the same principle.

As another possible embodiment mode, when the interleaved parallel inverter is based on 1/3 times rated capacity of power devices and the operation mode is 0-1/3 times system output power, because the rated capacity of the selected power device is 1/3 times of full system output power, each phase conducts one power device, and the switching mode of the power device is determined to be sequential switching. Taking phase a as an example, the timing diagram of the switching pattern is shown with reference to fig. 3. It is also concluded that: the equivalent driving signal frequency of phase a is equal to 3 times the driving signal frequency of each power device of phase a, which indicates that the equivalent switching frequency of phase a also becomes 3 times the switching frequency of the power device. Similarly, B and C have the same principle.

When the interleaved parallel inverter is based on 1/3 times of power devices with rated capacity and the working mode is 1/3 times-2/3 times of system output power, two power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching. The principle is the same as that when the operating mode is 1/2 times to full system output power, taking phase a as an example, referring to fig. 4, the result that the frequency of the equivalent driving signal of phase a is equal to 1.5 times of the frequency of the driving signal of each power device of phase a, which indicates that the equivalent switching frequency of phase a is also 1.5 times of the switching frequency of the power device, can be obtained. Also, phase B and C are the same in principle.

When the interleaved parallel inverter is based on 1/3 times of power devices with rated capacity and the working mode is 2/3 times-full system output power, because the rated capacity of the selected power device is 1/3 times of the full system output power, three power devices are conducted when the rated capacity of the selected power device is equal to the full system output power, and the switching mode of the power device is judged to be synchronous switching. Taking phase a as an example, the timing diagram of the switching pattern is shown in fig. 5, and it can be seen from fig. 5 that: in one period, the A phase is equal to how many high-level signals appear in the effective driving signal, and how many driving signals of all the power devices of the A phase appear. Namely, the equivalent driving signal frequency of the phase A is equal to the driving signal frequency of each power device of the phase A, which shows that the equivalent switching frequency of the phase A is also equal to the switching frequency of the power device. The same applies to B and C. The condition is usually used for full-force driving when the marine carrying equipment meets an emergency, and the requirement on noise is not high.

103. Based on the known reference quadrature axis voltage and the reference direct axis voltage, in combination with sequential switching or synchronous switching, a pulse driving signal is output through a preset space vector pulse width modulation unit, and the interleaved parallel inverter is controlled according to the pulse driving signal.

The reference quadrature axis voltage and the reference direct axis voltage can be obtained by converting various parameters of the permanent magnet synchronous motor through a plurality of controllers and outputting the converted parameters to a preset space vector pulse width modulation unit (SVPWM), and after the switching mode is judged, the pulse driving signal can be output by combining the reference quadrature axis voltage, the reference direct axis voltage and the switching mode and is output to the interleaved parallel inverter for control. And the interleaved parallel inverter receives the pulse driving signal and then supplies power to the permanent magnet synchronous motor.

It should be understood that, the space vector pulse width modulation unit refers to a unit that, by controlling the switching sequence and the conducting time of the power device in the inverter, the flux linkage of the permanent magnet synchronous motor becomes a circular rotating magnetic field, and further the permanent magnet synchronous motor generates a constant electromagnetic torque.

In the embodiment of the invention, the inverter in the control method of the staggered parallel inverter based on the fractional rated capacity power device is the staggered parallel inverter based on the fractional rated capacity power device, the switching mode of the power device in the inverter can be judged according to the working mode under the condition of determining different working modes, the equivalent driving signals of each phase of the staggered parallel inverter corresponding to different switching modes are different, the switching frequency of each phase is also different, the switching frequency of each phase is improved, and the capacity utilization rate of the power device in each phase is effectively improved compared with the single switching mode in the traditional staggered parallel topology. In addition, power devices with 1/2 times and 1/3 times rated capacity are selected, so that the system power density is improved, the volume and the weight of the system can be reduced, and the cost of the system is reduced.

The embodiment of the invention further provides an interleaved parallel inverter based on the fractional rated capacity power device, and with continuing reference to fig. 2, fig. 2 is a circuit diagram of the interleaved parallel inverter based on the fractional rated capacity power device according to the embodiment of the invention. The staggered parallel inverter based on the fractional rated capacity power device specifically comprises: the device comprises a capacitor, an A-phase bridge inverter unit 1, a B-phase bridge inverter unit 2, a C-phase bridge inverter unit 3, an A-phase coupling inductor, a B-phase coupling inductor, a C-phase coupling inductor and a motor 4.

The capacitors are connected in parallel at two ends of the direct current bus, and the input end of the A-phase bridge inverter unit 1, the input end of the B-phase bridge inverter unit 2 and the input end of the C-phase bridge inverter unit 3 are connected in parallel at two ends of the direct current bus.

The output end of the A-phase bridge inverter unit 1 is connected with the input end of the A-phase coupling inductor, the output end of the B-phase bridge inverter unit 2 is connected with the input end of the B-phase coupling inductor, and the output end of the C-phase bridge inverter unit 3 is connected with the input end of the C-phase coupling inductor.

The output end of the phase A coupling inductor, the output end of the phase B coupling inductor and the output end of the phase C coupling inductor are connected with the motor 4.

Specifically, referring to fig. 2, the capacitor is C1, the motor 4 is a permanent magnet synchronous motor, and the phase-a bridge inverter unit 1, the phase-B bridge inverter unit 2, and the phase-C bridge inverter unit 3 are all composed of 6 power devices. The phase A bridge inverter unit 1, the phase B bridge inverter unit 2 and the phase C bridge inverter unit 3 are respectively and correspondingly connected with the phase A coupling inductor, the phase B coupling inductor and the phase C coupling inductor and output to the permanent magnet synchronous motor.

More specifically, the phase-a bridge inverter unit 1, the phase-B bridge inverter unit 2, and the phase-C bridge inverter unit 3 have the same structure, and each of the phase-a bridge inverter unit, the phase-B bridge inverter unit, and the phase-C bridge inverter unit includes n bridge arms, where n is an integer greater than or equal to 3.

In the embodiment, three-phase staggered parallel inverters are adopted, n can be 3, that is, a bridge inverter unit with 3 bridge arms is provided in the embodiment, and the bridge inverter units with 3 bridge arms are connected in parallel between buses, so that the equivalent switching frequency of each phase can be maximally increased to 3 times of the switching frequency of a power device.

More specifically, the phase a coupling inductor, the phase B coupling inductor and the phase C coupling inductor have the same structure. The phase A coupling inductor is connected between the phase A bridge inverter unit 1 and the permanent magnet synchronous motor, the phase B coupling inductor is connected between the phase B bridge inverter unit 2 and the permanent magnet synchronous motor, and the phase C coupling inductor is connected between the phase C bridge inverter unit 3 and the synchronous inductor of the permanent magnet synchronous motor. And the structure of each coupling inductor is the same.

Specifically, the provided staggered parallel inverter is a power device based on fraction times rated capacity, the staggered parallel inverter can be based on 1/2 times rated capacity, and the corresponding working modes comprise 0-1/2 times of system output power and 1/2 times to full system output power. When the working mode is 0-1/2 times of system output power, each phase conducts one power device, and the switching mode of the power devices is judged to be sequential switching, wherein the staggered parallel inverter comprises a plurality of phases, and each phase comprises a plurality of power devices. When the working mode is 1/2 times to full system output power, two power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching.

In addition, the provided staggered parallel inverter can be based on power devices with 1/3 times rated capacity, and the corresponding working modes comprise 0-1/3 times of system output power, 1/3-2/3 times of system output power and 2/3 times-full system output power. When the working mode is 0-1/3 times of system output power, each phase is conducted with one power device, and the switching mode of the power device is judged to be sequential switching. When the working mode is 1/3-2/3 times of system output power, two power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching. When the working mode is 2/3 times to full system output power, three power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching.

In the embodiment of the invention, by providing the staggered parallel inverter based on the power device with fractional rated capacity, the switching mode of the power device in the inverter can be judged according to the working mode under different working modes, the equivalent driving signals of each phase of the staggered parallel inverter corresponding to different switching modes are different, the equivalent switching frequency can be equal to the switching frequency of the power device, and the effect that the equivalent switching frequency of each phase is maximally increased to 3 times of the switching frequency of the power device can be achieved. Compared with a single switch mode in the traditional staggered parallel topology, the capacity utilization rate of the power device in each phase is effectively improved. In addition, power devices with 1/2 times and 1/3 times rated capacity are selected, so that the system power density is improved, the volume and the weight of the system are reduced, and the cost of the system is reduced.

Referring to fig. 6, an embodiment of the present invention further provides a block diagram of a motor control system based on interleaved parallel inverters. The power device of the staggered parallel inverter based on fractional-time rated capacity in the system specifically comprises:

the system comprises a preprocessing unit 5, a working mode judging unit 9, a space vector pulse width modulation unit 10, an interleaving parallel inverter 11 and a motor 4, wherein the preprocessing unit 5 and the working mode judging unit 9 are connected with the space vector pulse width modulation unit 10, the space vector pulse width modulation unit 10 is connected with the interleaving parallel inverter 11, the interleaving parallel inverter 11 is connected with the motor 4, and the working mode judging unit 9 is also connected with the motor 4.

The preprocessing unit 5 may be configured to output a reference quadrature axis voltage and a reference direct axis voltage, the space vector pulse width modulation unit 10 may output a pulse driving signal according to the reference quadrature axis voltage, the reference direct axis voltage, and a switching pattern of the power device to control the interleaved parallel inverter 11, and the interleaved parallel inverter 11 supplies power to the motor 4.

Specifically, the preprocessing unit 5 includes a first controller 6, a second controller 7, and a third controller 8, where the first controller 6 is connected to the second controller 7, and both the second controller 7 and the third controller 8 are connected to the space vector pulse width modulation unit 10.

More specifically, the control system further comprises a signal conversion unit 12, wherein one end of the signal conversion unit 12 is connected between the interleaved parallel inverter 11 and the motor 4, and the other end of the signal conversion unit 12 is connected with the preprocessing unit 5 and used for converting the current of the motor 4.

Referring to fig. 7, fig. 7 is a schematic diagram of a motor control system based on interleaved parallel inverters according to an embodiment of the present invention. In fig. 7, the preprocessing unit 5 includes a first controller 6 PI1, a second controller 7 PI2, and a third controller 8 PI 3. ω is the reference angular velocity, ω is the rotor angular velocity, i_a、i_b、i_cIs A, B, C three-phase current i _qReference quadrature axis current, i_qIs reversedFeeding of quadrature axis current, i_dReference direct axis current, i_dFor feeding back the direct-axis current u_qIs a reference quadrature axis voltage, u_dReference direct axis voltage, theta is position angle, omega_ePermanent magnet synchronous machine electrical angular velocity, P, for a rotor_nPole pair number of the motor, psi is permanent magnet flux linkage of the permanent magnet synchronous motor, L_d、L_qThe direct-axis inductance and the quadrature-axis inductance of the motor are respectively.

More specifically, the control system of the permanent magnet synchronous motor selects i in vector control_dUnder 0 control, the interleaved parallel inverter is divided into: interleaved parallel inverters based on power devices of 1/2 and 1/3 times rated capacity. The control principle is as follows:

the control system is a double-loop control: the outer ring is a rotating speed ring, and the inner ring is a current ring. The rotating speed loop is used for achieving the reference rotating speed, and the current loop is used for achieving the reference current. The three-phase current of the motor is converted by a signal conversion unit (Clark and Park conversion, abc/dq) to obtain feedback direct-axis current i_dAnd feedback quadrature axis current i_q。

First, an angular velocity deviation is calculated based on a reference angular velocity ω and a rotor angular velocity ω, and the angular velocity deviation outputs a reference quadrature axis current i through a PI1_qReference direct axis current i_dGiven as 0, and then according to the feedback quadrature axis current i _qCross-axis current i with reference_qObtaining quadrature axis current deviation according to reference direct axis current i_dAnd feedback direct axis current i_dAnd obtaining the direct-axis current deviation. Inputting the quadrature axis current deviation into PI2 to be added with the first back electromotive force to obtain a reference quadrature axis voltage u_qA first step of; and adding the direct-axis current deviation to the PI3 to obtain a reference direct-axis voltage u_d*。

Wherein, the first back electromotive force is A, B, C three-phase current, and the feedback quadrature axis current i is output after Clark and Park conversion_qThen feeding back quadrature axis current i_qPermanent magnet synchronous motor electrical angular velocity omega combined with rotor_eMotor quadrature axis inductance L_qThe calculation is carried out, and the specific calculation is as follows: - ω_e×L_q×i_q。

The second back electromotive force is A, B, C three-phase current, and the feedback quadrature axis current i is output after Clark and Park conversion_dThen feeding back the quadrature axis current i_dPermanent magnet synchronous motor electrical angular velocity omega combined with rotor_ePermanent magnet flux linkage psi of permanent magnet synchronous motor and motor direct-axis inductor L_dThe calculation is carried out, and the specific calculation is as follows: omega_e×(ψ+L_d×i_d)。

The electrical angular velocity omega of the permanent magnet synchronous motor_eObtaining the angular velocity omega of the rotor after differentiating according to the position angle theta, and then obtaining the angular velocity omega of the rotor and the pole pair number P of the permanent magnet synchronous motor_nThe product of (a) and (b).

More specifically, after determining the operation mode of the motor, the operation mode determining unit 9 outputs the current operation mode to the space vector pulse width modulation unit 10 through a signal, and determines the corresponding switching mode (sequential switching and synchronous switching) according to the operation mode. While incorporating a reference quadrature voltage u_qReference direct axis voltage u_dThe interleaved parallel inverters are further controlled by the pulse driving signal generated by the space vector pulse width modulation unit 10. When the interleaved parallel inverter receives the pulse driving signal, the power is supplied to the permanent magnet synchronous motor.

It should be noted that the interleaved parallel inverter may be based on power devices 1/2 times and 1/3 times of rated capacity, and based on 1/2 times of working modes respectively corresponding to the power devices, the working modes may include two modes of 0-1/2 times of system output power and 1/2 times-full system output power; the 1/3-time based working mode can comprise three modes of 0-1/3 times of system output power, 1/3-2/3 times of system output power and 2/3 times of full system output power. The switch modes corresponding to each of the above embodiments are not limited to an example, and specific reference may be made to the above embodiments.

In the embodiment of the invention, a motor control system of a novel staggered parallel inverter based on 1/2 and 1/3 times rated capacity power devices is provided, and for different working modes, switching modes of the power devices in different working modes are respectively provided, so that the capacity utilization rate of the power devices is improved compared with a single switching mode in a traditional staggered parallel topology. In addition, power devices with 1/2 times rated capacity and power devices with 1/3 times rated capacity are selected respectively, so that compared with the power devices with rated capacity in a traditional staggered parallel inverter system, the cost is reduced, and meanwhile, the size and the weight of the whole system can be reduced by selecting the power devices with fractional times, the power density of the system is increased, and the cost is reduced.

An embodiment of the present invention further provides an electronic device, including: the control method comprises the steps of the control method for the staggered parallel inverters based on the fraction-times rated capacity power device, wherein the control method comprises the steps of the control method for the staggered parallel inverters based on the fraction-times rated capacity power device, and the steps are implemented when the computer program is executed by the processor.

As shown in fig. 8, fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, where the electronic device 800 includes: a processor 801, a memory 802, a network interface 803, and a computer program stored on the memory 802 and executable on the processor 801, the processor 801 implementing the steps in the fractional rated capacity power device based interleaved parallel inverter control method provided by the embodiments when executing the computer program.

Specifically, the processor 801 is configured to execute the following steps based on a fractional rated capacity power device:

acquiring a current working mode of a staggered parallel inverter, wherein the staggered parallel inverter is based on a fractional-multiple rated capacity power device;

judging a switching mode of the power device according to the working mode, wherein the switching mode comprises a sequential switch and a synchronous switch;

Based on the known reference quadrature axis voltage and the reference direct axis voltage, in combination with sequential switching or synchronous switching, a pulse driving signal is output through a preset space vector pulse width modulation unit, and the interleaved parallel inverter is controlled according to the pulse driving signal.

Optionally, the fractional multiple includes 1/2 times, when the interleaved parallel inverter is based on a power device 1/2 times of rated capacity, the working mode includes 0-1/2 times of system output power and 1/2 times-full system output power, and the step of determining the switching mode of the power device according to the working mode, executed by the processor 801, includes:

if the working mode is 0-1/2 times of system output power, conducting one power device for each phase, and judging the switching mode of the power device to be sequential switching, wherein the staggered parallel inverter comprises a plurality of phases, and each phase comprises a plurality of power devices;

if the working mode is 1/2 times to full system output power, two power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching.

Optionally, the fractional multiple includes 1/3 times, when the interleaved parallel inverter is based on a power device 1/3 times of rated capacity, the working mode includes 0 to 1/3 times of system output power, 1/3 to 2/3 times of system output power, and 2/3 times to full system output power, and the step of determining the switching mode of the power device according to the working mode, executed by the processor 801, includes:

If the working mode is 0-1/3 times of system output power, conducting one power device for each phase, and judging that the switching mode of the power devices is sequential switching;

if the working mode is 1/3-2/3 times of system output power, two power devices are conducted at the same time, and the switching mode of the power devices is judged to be a synchronous switch;

if the working mode is 2/3 times to full system output power, three power devices are conducted at the same time, and the switching mode of the power devices is judged to be synchronous switching.

The electronic device 800 provided by the embodiment of the present invention can implement each implementation manner in the embodiment of the interleaved parallel inverter control method based on the fractional rated capacity power device, and has corresponding beneficial effects, and for avoiding repetition, details are not repeated here.

It is noted that 801 and 803 with components are shown, but it is understood that not all of the shown components are required and that more or fewer components may be implemented instead. As will be understood by those skilled in the art, the electronic device 800 is a device capable of automatically performing numerical calculation and/or information processing according to a preset or stored instruction, and the hardware includes, but is not limited to, a microprocessor, an Application Specific Integrated Circuit (ASIC), a Programmable gate array (FPGA), a Digital Signal Processor (DSP), an embedded device, and the like.

The memory 802 includes at least one type of readable storage medium including a flash memory, a hard disk, a multimedia card, a card-type memory (e.g., SD or DX memory, etc.), a Random Access Memory (RAM), a Static Random Access Memory (SRAM), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, an optical disk, etc. In some embodiments, the storage 802 may be an internal storage unit of the electronic device 800, such as a hard disk or a memory of the electronic device 800. In other embodiments, the memory 802 may also be an external storage device of the electronic device 800, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), or the like, provided on the electronic device 800. Of course, the memory 802 may also include both internal and external memory units of the electronic device 800. In this embodiment, the memory 802 is generally used to store an operating system installed in the electronic device 800 and various types of application software, such as program codes of the interleaved parallel inverter control method based on fractional rated capacity power devices. In addition, the memory 802 may also be used to temporarily store various types of data that have been output or are to be output.

Processor 801 may be a Central Processing Unit (CPU), controller, microcontroller, microprocessor, or other data Processing chip in some embodiments. The processor 801 is generally configured to control the overall operation of the electronic device 800. In this embodiment, the processor 801 is configured to run program code stored in the memory 802 or process data, such as program code for a method of interleaved parallel inverter control based on fractional rated capacity power devices.

The network interface 803 may include a wireless network interface or a wired network interface, and the network interface 803 is generally used to establish a communication connection between the electronic device 800 and other electronic devices.

The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.