阅读说明：本技术 电平转换电路与电子设备 (Level conversion circuit and electronic equipment ) 是由 罗勇进 于 2021-07-01 设计创作，主要内容包括：本发明提供了一种电平转换电路与电子设备,包括第一引脚、第二引脚、目标引脚、核心模块与开关；所述开关的第一端连接所述第一引脚,所述开关的第二端连接所述第二引脚,所述核心模块分别连接所述目标引脚、所述第二引脚与所述开关的控制端；所述核心模块用于：在所述目标引脚的接入电压为第一参考高电平时,控制所述开关导通,以传输指定电压幅度的信号,并基于所述第一参考高电平,将所述第一引脚拉至第一参考高电平,将所述第二引脚拉至第二参考高电平；其中,所述第一参考高电平高于所述第二参考高电平；所述指定电压幅度下,经所述开关所传输的信号的电压不高于所述第一参考高电平与所述第二参考高电平。(The invention provides a level conversion circuit and electronic equipment, which comprise a first pin, a second pin, a target pin, a core module and a switch, wherein the first pin is connected with the second pin; the first end of the switch is connected with the first pin, the second end of the switch is connected with the second pin, and the core module is respectively connected with the target pin, the second pin and the control end of the switch; the core module is used for: when the access voltage of the target pin is a first reference high level, controlling the switch to be conducted so as to transmit a signal of a specified voltage amplitude, pulling the first pin to the first reference high level based on the first reference high level, and pulling the second pin to a second reference high level; wherein the first reference high level is higher than the second reference high level; the voltage of the signal transmitted through the switch is not higher than the first reference high level and the second reference high level at the specified voltage amplitude.)

1. A level switching circuit is characterized by comprising a first pin, a second pin, a target pin, a core module and a switch;

the first end of the switch is connected with the first pin, the second end of the switch is connected with the second pin, and the core module is respectively connected with the target pin, the second pin and the control end of the switch;

the core module is used for:

when the access voltage of the target pin is a first reference high level, controlling the switch to be conducted so as to transmit a signal of a specified voltage amplitude, pulling the first pin to the first reference high level based on the first reference high level, and pulling the second pin to a second reference high level;

when the target pin access voltage is the ground level, controlling the switch to be switched off;

wherein the first reference high level is higher than the second reference high level;

the voltage of the signal transmitted through the switch is not higher than the first reference high level and the second reference high level at the specified voltage amplitude.

2. The level shift circuit of claim 1, wherein the core module is further configured to:

and when the access voltage of the target pin is the ground level, controlling the first pin and the second pin to be at the ground level.

3. The level shift circuit of claim 1, wherein the core module comprises: the first voltage regulating unit and the enabling control unit;

the first side of the first voltage regulating unit is connected with the target pin, the second side of the first voltage regulating unit is connected with the first side of the enabling control unit, the second side of the enabling control unit is connected with the control end of the switch, and the target pin is also directly or indirectly connected with the first pin and the second pin;

when the access voltage of the target pin is the first reference high level, the first side voltage of the first voltage regulating unit is the first reference high level, and the second side voltage of the first voltage regulating unit is not lower than the second reference high level and not higher than the sum of the second reference high level and the threshold voltage of the switch;

the enable control unit is to: when the access voltage of the target pin is the first reference high level, the switch is controlled to be turned on in response to the second side voltage of the first voltage regulating unit, and a signal of the specified voltage amplitude is transmitted;

and when the voltage connected to the target pin is the ground level, controlling the switch to be switched off.

4. The circuit of claim 3, wherein the first adjusting unit is a low dropout linear regulator.

5. The circuit of claim 3, wherein the core module further comprises a second voltage regulating unit, a first side of the second voltage regulating unit is connected to the target pin, and a second side of the second voltage regulating unit is directly or indirectly connected to the second pin;

when the access voltage of the target pin is the first reference high level, the first side voltage of the second voltage regulating unit is the first reference high level, and the second side voltage of the second voltage regulating unit is the second reference high level.

6. The circuit of claim 5, wherein the core module further comprises a first shorting pull-up unit disposed between the target pin and the first pin, and a second shorting pull-up unit disposed between a second side of the second voltage regulating unit and the second pin.

7. The circuit of claim 5, wherein the second voltage regulating unit is a low dropout regulator.

8. The circuit according to any of claims 1 to 7, wherein the level shifter circuit is provided on the same chip.

9. The circuit of claim 8, wherein the chip is further provided with a ground pin.

10. An electronic device comprising the level conversion circuit according to any one of claims 1 to 9.

Technical Field

The present invention relates to the field of circuits, and in particular, to a level shifter and an electronic device.

Background

When digital signal communication is performed between the transceiver devices, the problem that the logic high levels on both sides are not matched often occurs between the receiver device and the transmitter device, and further, a conversion circuit (namely, a level conversion circuit) of the logic levels needs to be used, and a large number of devices using the level conversion circuit often are mobile phones or wearable devices which have the requirement on the area of the circuit board as small as possible.

In the related art, a level shift circuit needs to be connected to a plurality of pins, including an enable pin, a ground pin, two input/output pins (i.e., IO pins), and two reference high-level pins, and when the input/output pins need to be pulled to a high level, the two input/output pins can be pulled to a corresponding high level by using voltages of the two reference high-level pins.

Therefore, in the scheme, the 6 pins are needed, so that the problems of large chip area, high cost and the like are caused.

Disclosure of Invention

The invention provides a level conversion circuit and electronic equipment, which are used for solving the problems of large chip area, high cost and the like.

According to a first aspect of the present invention, a level shift circuit is provided, which includes a first pin, a second pin, a target pin, a core module, and a switch;

the first end of the switch is connected with the first pin, the second end of the switch is connected with the second pin, and the core module is respectively connected with the target pin, the second pin and the control end of the switch;

the core module is used for:

when the access voltage of the target pin is a first reference high level, controlling the switch to be conducted to transmit a signal of a specified voltage amplitude, pulling the first pin to the first reference high level based on the first reference high level, and pulling the second pin to a second reference high level;

and when the target pin access voltage is the ground level, controlling the switch to be switched off.

Wherein the first reference high level is higher than the second reference high level, and the voltage of the signal transmitted through the switch is not higher than the first reference high level and the second reference high level at the specified voltage amplitude.

Optionally, the core module is further configured to:

and when the access voltage of the target pin is the ground level, controlling the first pin and the second pin to be at the ground level.

Optionally, the core module includes: the first voltage regulating unit and the enabling control unit;

the first side of the first voltage regulating unit is connected with the target pin, the second side of the first voltage regulating unit is connected with the first side of the enabling control unit, the second side of the enabling control unit is connected with the control end of the switch, and the target pin is also directly or indirectly connected with the first pin and the second pin;

when the access voltage of the target pin is the first reference high level, the first side voltage of the first voltage regulating unit is the first reference high level, and the second side voltage of the first voltage regulating unit is not lower than the second reference high level and is not higher than the sum of the second reference high level and the threshold voltage of the switch;

the enable control unit is to: when the access voltage of the target pin is the first reference high level, the switch is controlled to be turned on in response to the second side voltage of the first voltage regulating unit so as to transmit the signal of the specified voltage amplitude;

and when the voltage connected to the target pin is the ground level, controlling the switch to be switched off.

Optionally, the first regulating unit adopts a low dropout regulator LDO.

Optionally, the core module further includes a second voltage regulating unit, a first side of the second voltage regulating unit is connected to the target pin, and a second side of the second voltage regulating unit is directly or indirectly connected to the second pin;

when the access voltage of the target pin is the first reference high level, the first side voltage of the second voltage regulating unit is the first reference high level, and the second side voltage of the second voltage regulating unit is the second reference high level.

Optionally, the core module further includes a first short-circuit pull-up unit disposed between the target pin and the first pin, and a second short-circuit pull-up unit disposed between a second side of the second voltage regulating unit and the second pin.

Optionally, the second voltage regulating unit adopts a low dropout regulator LDO.

Optionally, the level shift circuit is disposed on the same chip.

Optionally, the chip is further provided with a ground pin.

According to a second aspect of the present invention, there is provided an electronic device comprising the level shift circuit according to the first aspect and alternatives thereof.

In the level shift circuit and the electronic device provided by the invention, the core module can pull the first pin to the first reference high level and pull the second pin to the second reference high level based on the first reference high level when the access voltage of the target pin is the first reference high level, and the first reference high level and the second reference high level are high levels of different voltages. Furthermore, based on the access of the target pin to the first reference high level and the matching of the core module, the target pin can realize the functions of the enabling pin and the reference high level pin in the prior art, namely, the switch is enabled and two reference high levels are provided.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a first schematic circuit diagram of a level shifter circuit according to an embodiment of the present invention;

FIG. 2 is a second schematic circuit diagram of a level shifter circuit according to an embodiment of the present invention;

FIG. 3 is a third schematic diagram of a circuit configuration of a level shifter circuit according to an embodiment of the present invention;

FIG. 4 is a diagram illustrating a fourth exemplary circuit configuration of a level shifter according to an embodiment of the present invention;

fig. 5 is a fifth circuit configuration diagram of the level shift circuit according to an embodiment of the invention.

Description of reference numerals:

1-a first pin;

2-a second pin;

3-a core module;

31-a first voltage regulating unit;

32-enable control unit;

33-a second voltage regulating unit;

34-a first short pull-up unit;

35-a second short pull-up unit;

4-target pin.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Moreover, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The technical solution of the present invention will be described in detail below with specific examples. These particular embodiments may be combined with each other below, and details of the same or similar concepts or processes may not be repeated in some embodiments.

Referring to fig. 1 to 5, an embodiment of the invention provides a level shifter circuit, which can be disposed on a same chip, and the chip can have a ground pin.

In the embodiment of the present invention, the level shift circuit includes a first pin 1, a second pin 2, a target pin 4, a core module 3, and a switch 5.

A first end of the switch 5 is connected to the first pin 1, a second end of the switch 5 is connected to the second pin 2, and the core module 3 is respectively connected to the target pin 4, the second pin 2, and a control end of the switch 5.

The switch 5 may be any device that can be controlled to be turned on or off, for example, a transistor, specifically, a triode, a field effect transistor, or the like may be used. Further, the control terminal of the switch 5 may be, for example, a base or a gate. In the solution shown in fig. 5, the switch 5 employs an NMOS transistor.

By way of further example, the switch 5 may be configured with a threshold voltage Vth that is turned on, which may be specifically understood as a gate-source threshold voltage that may turn on the switch.

The first pin 1 and the second pin 2 may be any pins for implementing digital signal transmission, and in the level shift circuit, the high level voltage transmitted by the second pin is lower than the high level voltage transmitted by the first pin. In the example shown in fig. 5, the first pin 1 is a high-voltage side pin (i.e., IOVH pin), and the second pin 2 is a low-voltage side pin (i.e., IOVL pin).

The target pin 4 may be any pin capable of transmitting an electrical signal. In the example shown in fig. 5, the target pin 4 can be characterized as a VCCEN pin because it can function as an enable and provide a reference high level.

In the embodiment of the present invention, the core module 3 is configured to:

when the access voltage of the target pin 4 is a first reference high level, controlling the switch 5 to be turned on to transmit a signal of a specified voltage amplitude, and based on the first reference high level, pulling the first pin to the first reference high level, and pulling the second pin to a second reference high level;

wherein the first reference high level is higher than the second reference high level, and the voltage of the signal transmitted through the switch is not higher than the first reference high level and the second reference high level at the specified voltage amplitude.

The core module 3 provides two voltages (i.e., a first reference high level and a second reference high level) based on the same voltage (i.e., the first reference high level), respectively, and thus, the pin level is pulled to the reference high level regardless of the embodiment of the present invention. Since the first reference high level is higher than the second reference high level, the voltage drop adjustment in the core module 3 will be implemented.

In the above scheme, based on the access of the target pin to the first reference high level and the cooperation of the core module, the target pin can realize the functions of the enable pin and the reference high level pin in the prior art, that is, the enable of the switch is realized and two reference high levels are provided.

Furthermore, the core module 3 may be further configured to:

and when the voltage of the target pin is the ground level, controlling the first pin and the second pin to be at the ground level.

The ground level may be a ground voltage, specifically, a potential of a ground of a chip of the logic conversion circuit (for example, 0V), or may be not limited thereto.

In one embodiment, to implement the step-down adjustment, the core module 3 may include: a first voltage regulating unit 31 and an enable control unit 32.

A first side of the first voltage regulating unit 31 is connected to the target pin 4, a second side of the first voltage regulating unit 31 is connected to a first side of the enabling control unit 32, a second side of the enabling control unit 32 is connected to a control end of the switch 5, and the target pin 4 is further directly or indirectly connected to the first pin 1 and the second pin 2; in the example shown in fig. 2, the target pin 4 is directly connected to the first pin 1 and the second pin 2, and in the examples shown in fig. 3 to 5, the target pin 4 is indirectly connected (for example, connected via a corresponding voltage regulating unit and/or a short-circuited pull-up unit) to the corresponding pin (i.e., the first pin 1 and/or the second pin 2).

When the access voltage of the target pin is the first reference high level, the first side voltage of the first voltage regulating unit is the first reference high level, and the second side voltage of the first voltage regulating unit is not lower than the second reference high level and not higher than the sum of the second reference high level and the threshold voltage of the switch.

The enable control unit 32 is configured to:

when the access voltage of the target pin is the first reference high level, the switch 5 is controlled to be turned on in response to the second side voltage of the first voltage regulating unit so as to transmit the signal of the specified voltage amplitude;

and when the voltage connected to the target pin is the ground level, controlling the switch to be switched off.

For example, when the access voltage of the target pin is the first reference high level, then:

if the voltage on the second side of the first voltage regulating unit is the second reference high level, the first pin is pulled to the second reference high level, at this time, the switch is turned on (namely, turned on), and pins (namely, the first pin and the second pin) on two sides of the switch are respectively pulled to the corresponding first reference high level and the second reference high level;

if the second side voltage of the first voltage regulating unit is the sum of the second reference high level and the threshold voltage, the first pin is pulled to the second reference high level, and at this time, the switch is turned on so that: signals transmitted less than the second reference high level may all pass through the switch.

The enabling control unit 32 may be understood as a circuit unit capable of controlling on/off of the switch based on the received external signal, and further, the enabling control unit 32 may be configured with a function of automatically turning off the switch when the temperature is over-temperature.

The first voltage regulating unit can have voltage regulating capacity, can be realized in a linear voltage regulating mode, can also be realized in a switch power supply-based mode, and can also be realized by combining a divider resistor. In a specific embodiment, the first voltage regulating unit 31 may employ a Low Dropout linear Regulator (i.e., LDO). The first side voltage, the second side voltage, the voltage difference between the first side voltage and the second side voltage, and the like can be configured in advance according to requirements. In addition, matching the circuits of fig. 2 to 5, the second side voltage of the first voltage regulating unit 31 can be configured in advance.

Specifically, in the circuit shown in fig. 2 (i.e., in the case where the second voltage regulating unit 33, the first short pull-up unit 34, and the second short pull-up unit 35, which will be mentioned later, are not used), then:

taking the first voltage regulating unit adopting LDO as an example, the first reference high level of the first side of the first voltage regulating unit 31 can be described as VH _ Ref, the second side voltage of the first voltage regulating unit 31 can be described as VLDO1, the second reference high level can be described as VL _ Ref, and the threshold voltage can be described as Vth, then:

in one example, suitable for use in fig. 2, VLDO ═ VL _ Ref + Vth;

in another example shown in FIG. 2, VLDO is slightly less than VL _ Ref + Vth, for example: VLDO ═ 0.9 × VL _ Ref + Vth. It can also be understood as: and the value of VL _ Ref + Vth-VLDO is smaller than a preset difference threshold value.

The above numerical selection is also applicable to the circuits of fig. 3 to 5.

In the circuits shown in fig. 3 to 5, the core module 3 further includes a second voltage regulating unit 33, a first side of the second voltage regulating unit 33 is connected to the target pin 4, and a second side of the second voltage regulating unit 33 is directly or indirectly connected to the second pin 2; specifically, the second voltage regulating unit 33 may be directly connected to the second pin 2 as shown in fig. 3, or may be connected to the second pin 2 via a second short pull-up unit mentioned later.

When the access voltage of the target pin is the first reference high level, the first side voltage of the second voltage regulating unit is the first reference high level, and the second side voltage of the second voltage regulating unit is the second reference high level.

The second voltage regulating unit 33 may have a voltage regulating capability, and may be implemented in a linear voltage regulating manner, a switching power supply-based manner, or a combination of a voltage dividing resistor. In a specific embodiment, the second voltage regulating unit 33 may employ a Low Dropout linear Regulator (i.e., LDO). The first side voltage, the second side voltage, the voltage difference between the first side voltage and the second side voltage, and the like can be configured in advance according to requirements.

Specifically, in the circuits shown in fig. 3 to 5, taking the LDO as an example of the second voltage regulating unit, the second reference high level of the first side of the second voltage regulating unit 33 can be described as VH _ Ref, the second side voltage of the second voltage regulating unit 32 can be described as VLDO2, the second reference high level can be described as VL _ Ref, and the threshold voltage can be described as Vth, then:

in one example suitable for use in fig. 3-5, VLDO ═ VL Ref;

in one example suitable for use in fig. 3-5, VLDO ═ VL _ Ref + Vth; at this time, signals can be directly transmitted when the transmitted signals range from GND to VL _ Ref, and the establishment speed of higher logic high level is accelerated.

In one embodiment, referring to fig. 4 and fig. 5, the core module 3 further includes a first short-circuit pull-up unit 34 disposed between the target pin 4 and the first pin 1, and a second short-circuit pull-up unit 35 disposed between the second side of the second voltage regulating unit 33 and the second pin 2.

The short pull-up unit can be understood as any circuit unit capable of pulling a pin to a corresponding potential by shorting a corresponding circuit position, for example: the first short pull-up unit may pull up the first pin to a voltage of a target pin (e.g., a first reference high level), and the second short pull-up unit may pull up the second pin to an output side voltage of the second voltage regulating unit.

In a further aspect, the short-circuited pull-up unit may implement an instantaneous short circuit, and further, the short-circuited pull-up unit may also be understood as an instantaneous short-circuited pull-up unit, and when pulling up, the pull-up may be implemented based on a pull-up resistor, for example, the pull-up may be implemented by a pull-up resistor of 10K ohms.

The instantaneous short pull-up unit may include: the circuit comprises an instant short-circuit part (which can be understood as a One-shot circuit part) and a Pull-up part (which can be understood as a Pull-up circuit part), wherein the instant short-circuit part can be understood as a circuit part for realizing instant short-circuit, and the Pull-up part can realize the Pull-up circuit part which can be connected in parallel and then connected to a corresponding pin; for example: the instantaneous short-circuit part and the pull-up part in the first short-circuit pull-up unit can be connected in parallel, and then two ends of the instantaneous short-circuit part and the pull-up part are respectively connected between the target pin and the first pin; the short-time connection part and the pull-up part in the second short-circuit pull-up unit can be connected in parallel and then respectively connected between the second side of the second voltage regulating unit 33 and the second pin.

Furthermore, the instantaneous short circuit of the target pin and the first pin and the instantaneous short circuit of the second voltage regulating unit and the second pin can be realized by instantaneously shorting the pull-up unit, when logic high level transmission is found on one side in the circuit, the level is quickly pulled up by an instantaneous short circuit part in the instantaneous short pull-up unit on the other side so as to support higher-speed signal transmission, and meanwhile, the logic high level state after the instantaneous short circuit can be kept by a pull-up part connected with the instantaneous short pull-up unit in parallel (unless a logic low level transmission stage is entered). The pull-up part can be a pull-up resistance circuit which is fixedly or controllably switched on and off in the circuit, and if the pull-up resistance circuit is controllable, the pull-up resistance circuit can be controlled by an enabling control unit or other circuits.

Referring to fig. 5, the first pin mentioned above is an IOVH pin, the second pin is an IOVL pin, the target pin is a VCCEN pin, and the ground pin is a GND pin, where the switch 5 may be a switch SW, and a threshold voltage of the switch SW is represented as VTH; the first voltage regulating unit adopts LDO1, and the second voltage regulating unit adopts LDO 2.

And further:

when the voltage of the VCCEN pin is a normal operating voltage value of the first reference high level VH _ Ref, the level conversion circuit chip therein is powered, meanwhile, the first reference high level VH _ Ref of the VCCEN pin is input to the LDO1, the output of the LDO1 is a normal operating voltage value of the second reference high level VL _ Ref, that is, the second reference high level VL _ Ref voltage generated by the LDO1 inside the chip at this time assumes the responsibility of the externally connected second reference high level VL _ Ref in the prior art;

the VCCEN pin also generates an output voltage through the LDO2, and controls the on/off of the switch SW through the enable control module 32, at this time, the output of the LDO2 may be a second reference high level VL _ Ref, or VL _ Ref + VTH;

if VLDO2 (i.e., the second side voltage of LDO 2) is VL _ Ref + VTH, the signal transmitted by the level shifter circuit can be passed through when the signal range is between GND and the second reference high level VL _ Ref, thereby speeding up the establishment of the higher logic high level.

Finally, when VCCEN is equal to GND, VH _ Ref is equal to GND, LDO1 is equal to VL _ Ref is equal to GND, and LDO2 is equal to GND, that is, the gate control voltage of SW is GND, thereby achieving complete turn-off of the entire level shift circuit.

Therefore, in the scheme, the function of level conversion is well realized, and two pins are reduced, so that the area of crystal grains is reduced, proper smaller packages are more conveniently selected, and the area of finished chips is reduced. Therefore, the space is saved and the cost is reduced in the application of electronic equipment with restricted space, such as mobile phones and wireless Bluetooth headsets.

In practical applications, considering that the logic high levels of the signals of the receiving device and the transmitting device are fixed in the circuit system adopting level conversion, the second reference high level VL _ Ref voltage can be solidified in the level conversion circuit through the LDO1 and the control voltage of the SW can be solidified through the LDO2 in advance. Furthermore, the voltage which originally needs to be externally connected is generated inside, and the pins of the chip are simplified.

The embodiment of the invention also provides electronic equipment which comprises the level conversion circuit.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.