阅读说明：本技术 一种框架与铜片器件封装设计方法 (Frame and copper sheet device packaging design method ) 是由 艾育林 盛天金 于 2021-06-21 设计创作，主要内容包括：本发明公开了一种框架与铜片器件封装设计方法,方法步骤为：(1)制作上leadfram框架：在铜片上设置若干呈矩阵排列、形状为方形的上框架单元；(2)制作下leadfram框架：在另一铜片上设置若干呈矩阵排列、形状为方形的下框架单元,下框架单元中心区域为下框架芯片贴合区,下框架芯片贴合区中部设有下框架半蚀刻区；下leadfram框架的边框上设有若干下框架定位孔；(3)将芯片贴在上leadfram框架的上框架芯片贴合区,芯片的另一侧用粘合材料贴合在下leadfram框架的下框架芯片贴合区内；(4)整体放进DFN/QFN模具进行塑封。本发明方法可以简化加工工序,提高加工效率,并降低加工成本。(The invention discloses a packaging design method of a frame and a copper sheet device, which comprises the following steps: (1) manufacturing an upper leader framework: arranging a plurality of upper frame units which are arranged in a matrix and are square on a copper sheet; (2) making a lower leader framework: arranging a plurality of lower frame units which are arranged in a matrix and are square on the other copper sheet, wherein the central area of each lower frame unit is a lower frame chip bonding area, and a lower frame semi-etching area is arranged in the middle of each lower frame chip bonding area; a plurality of lower frame positioning holes are formed in the frame of the lower lead fram frame; (3) attaching the chip to an upper frame chip attaching area of an upper lead fram frame, and attaching the other side of the chip to a lower frame chip attaching area of a lower lead fram frame by using an adhesive material; (4) and putting the whole into a DFN/QFN die for plastic package. The method can simplify the processing procedure, improve the processing efficiency and reduce the processing cost.)

1. A frame and copper sheet device packaging design method is characterized by comprising the following steps:

(1) manufacturing an upper leader framework: arranging a plurality of upper frame units which are arranged in a matrix and are square in shape on a copper sheet, arranging an upper frame reserved cutting channel between every two adjacent upper frame units, respectively arranging 4 trapezoidal upper frame etching areas on four sides of each upper frame unit, and arranging an upper frame chip bonding area in the central area of each upper frame unit;

(2) making a lower leader framework: arranging a plurality of lower frame units which are arranged in a matrix and are square in shape on the other copper sheet, arranging a lower frame reserved cutting channel between every two adjacent lower frame units, respectively arranging 4 trapezoidal lower frame etching areas on four sides of each lower frame unit, wherein the central area of each lower frame unit is a lower frame chip bonding area, and the middle part of each lower frame chip bonding area is provided with a lower frame semi-etching area; a plurality of lower frame positioning holes are formed in the frame of the lower lead fram frame;

(3) attaching the chip to an upper frame chip attachment area of an upper lead fram frame, attaching the other side of the chip to a lower frame chip attachment area of a lower lead fram frame by using an adhesive material, and controlling the offset, the rotation angle and the inclination of the patch within a certain range in the attaching process;

(4) and putting the whole into a DFN/QFN die for plastic package.

2. The frame and copper sheet device package design method of claim 1, wherein: the sizes of the frame units, the reserved cutting path, the trapezoidal upper frame etching area and the chip attaching area of the upper lead fram frame and the lower lead fram frame are respectively equal.

3. The frame and copper sheet device package design method of claim 1, wherein: the outer dimension of the upper leadfram frame is 230mm 60mm, the thickness is 0.1mm, the outer dimension of the lower leadfram frame is 258mm 78mm, and the thickness is 0.5 mm.

4. The frame and copper sheet device package design method of claim 1, wherein: the size of the frame unit is 8mm, and the width of the reserved cutting channel is 0.3 mm.

5. The frame and copper sheet device package design method of claim 1, wherein: the size of the chip attaching area is 6mm by 6 mm.

6. The frame and copper sheet device package design method of claim 1, wherein: the semi-etched area is rectangular, the size is 5mm x 3mm, and the etching depth is 300 mu m.

7. The frame and copper sheet device package design method of claim 1, wherein: the adhesive material is conductive silver adhesive, and the thickness of the conductive silver adhesive is 40-50 mu m.

Technical Field

The invention belongs to the technical field of semiconductor packaging, and particularly relates to a packaging design method for a frame and a copper sheet device.

Background

The existing packaging design of the frame and the copper sheet device has the problems of complex process, more process steps and the like, so that the improvement space exists. Therefore, more advanced frame and copper device package designs are necessary for mass production.

Disclosure of Invention

The invention aims to solve the problems and provides a packaging design method for a frame and a copper sheet device, which can simplify the processing procedure, improve the processing efficiency and reduce the processing cost.

The technical scheme of the invention is realized in such a way.

A frame and copper sheet device packaging design method is characterized by comprising the following steps:

(1) manufacturing an upper leader framework: arranging a plurality of upper frame units which are arranged in a matrix and are square in shape on a copper sheet, arranging an upper frame reserved cutting channel between every two adjacent upper frame units, respectively arranging 4 trapezoidal upper frame etching areas on four sides of each upper frame unit, and arranging an upper frame chip bonding area in the central area of each upper frame unit;

(2) making a lower leader framework: arranging a plurality of lower frame units which are arranged in a matrix and are square in shape on the other copper sheet, arranging a lower frame reserved cutting channel between every two adjacent lower frame units, respectively arranging 4 trapezoidal lower frame etching areas on four sides of each lower frame unit, wherein the central area of each lower frame unit is a lower frame chip bonding area, and the middle part of each lower frame chip bonding area is provided with a lower frame semi-etching area; a plurality of lower frame positioning holes are formed in the frame of the lower lead fram frame;

(3) the chip is attached to an upper frame chip attachment area of an upper lead fram frame, the other side of the chip is attached to a lower frame chip attachment area of a lower lead fram frame through an adhesive material, and the offset, the rotation angle and the inclination of the chip are controlled within a certain range in the attachment process.

(4) And putting the whole into a DFN/QFN die for plastic package.

Further, the sizes of the frame units, the reserved cutting path, the trapezoidal upper frame etching area and the chip attaching area of the upper lead frame and the lower lead frame are respectively equal.

Further, the outer dimension of the upper leadfram frame is 230mm 60mm and the thickness is 0.1mm, and the outer dimension of the lower leadfram frame is 258mm 78mm and the thickness is 0.5 mm.

Further, the size of the frame unit is 8mm by 8mm, and the width of the reserved cutting track is 0.3 mm.

Further, the size of the chip bonding area is 6mm by 6 mm.

Furthermore, the half-etched area is rectangular, the size is 5mm x 3mm, and the etching depth is 300 μm.

Furthermore, the adhesive material is conductive silver adhesive, and the thickness of the conductive silver adhesive is 40-50 μm.

The invention has the beneficial effects that: 1. the method can simplify the processing procedure when the chip is attached by improving the design of the copper sheet device before the chip is attached, and the design of the copper sheet device is batch production, thereby being beneficial to improving the processing efficiency and reducing the processing cost; 2. because the process is simplified, the processing quality of the product is favorably controlled, and the yield of the product is improved.

Drawings

FIG. 1 is a schematic diagram of the product structure of the upper leader framework used in the method of the present invention.

FIG. 2 is a schematic diagram of the product structure of the lower LEADFram framework used in the method of the present invention.

Fig. 3 is a schematic diagram of the first half of the prior art packaging method.

Fig. 4 is a process diagram of the second half of the prior art packaging method.

In the figure, 1, an upper lead fram frame, 11, an upper frame reserved cutting path, 12, an upper frame etching area, 13, an upper frame chip bonding area, 2, a lower lead fram frame, 21, a lower frame reserved cutting path, 22, a lower frame full etching area, 23, a lower frame chip bonding area, 24, a lower frame half etching area, 25, a lower frame positioning hole, 3, a chip, 4, an adhesive material, 5 and an adhesive material.

Detailed Description

The technical solution of the present invention will be further described in detail by the following examples and the drawings attached to the specification.

As shown in fig. 1-2, the method for designing the package of the frame and the copper sheet device of the present invention comprises the following steps:

(1) manufacturing an upper leader framework 1: arranging a plurality of upper frame units which are arranged in a matrix and are square on a copper sheet, arranging an upper frame reserved cutting channel 11 between every two adjacent upper frame units, respectively arranging 4 trapezoidal upper frame etching areas 12 on four sides of each upper frame unit, and arranging an upper frame chip bonding area 13 in the central area of each upper frame unit;

(2) making a lower leader framework 2: arranging a plurality of lower frame units which are arranged in a matrix and are square on the other copper sheet, arranging a lower frame reserved cutting channel 21 between every two adjacent lower frame units, respectively arranging 4 trapezoidal lower frame etching areas 22 on four sides of each lower frame unit, arranging a lower frame chip bonding area 23 in the central area of each lower frame unit, and arranging a lower frame half etching area 24 in the middle of each lower frame chip bonding area; a plurality of lower frame positioning holes 25 are formed in the frame of the lower leadfram frame;

(3) the chip is attached to the upper frame chip attachment area 13 of the upper lead fram frame 1, the other side of the chip is attached to the lower frame chip attachment area 23 of the lower lead fram frame 2 through the adhesive material 4, and the offset, the rotation angle and the inclination of the chip are controlled within a certain range in the attaching process.

(4) And putting the whole into a DFN/QFN die for plastic package.

The sizes of the frame units, the reserved cutting path, the trapezoidal upper frame etching area and the chip attaching area of the upper lead fram frame 1 and the lower lead fram frame 2 are respectively equal.

The outer dimension of the upper leadfram frame 1 is 230mm 60mm, the thickness is 0.1mm, the outer dimension of the lower leadfram frame 2 is 258mm 78mm, and the thickness is 0.5 mm.

The size of the frame unit is 8mm, and the width of the reserved cutting channel is 0.3 mm.

The size of the chip attaching area is 6mm by 6 mm.

The semi-etched area is rectangular, the size is 5mm x 3mm, and the etching depth is 300 mu m.

The adhesive material 4 is conductive silver adhesive, and the thickness of the conductive silver adhesive is 40-50 mu m.

As shown in fig. 3 and 4, the conventional packaging design method for the frame and copper sheet device includes the following steps:

the first half procedure:

(1) the thickness of the copper base plate 5 is 0.203mm, and only the lower frame positioning hole 25 corresponding to the 0.75mm DFN mould is processed on the copper base plate 5;

(2) attaching one side of the upper lead fram frame 1 with the chip 3 attached to the copper backing plate 5 by using an adhesive material 4;

(3) and putting the whole body into a die for plastic package.

The second half process:

(1) the thickness of the lower leader fram frame 2 is 0.5mm, and lower frame positioning holes 25 corresponding to 0.75mm DFN die are processed.

(2) After etching the lower leadfram frame 2, the die 3 is attached to the lower leadframe half etch 24 on the lower leadfram frame 2 with an adhesive material 4 (conductive silver paste).

While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.