阅读说明：本技术 半导体受光元件以及半导体受光元件制造方法 (Semiconductor light receiving element and method for manufacturing semiconductor light receiving element ) 是由 竹村亮太 菊地真人武 于 2019-04-05 设计创作，主要内容包括：半导体受光元件(50)是在半导体基板(1)依次形成有倍增层(2)、电场控制层(3)、光吸收层(4)以及窗层(5),并且在窗层(5)形成有p型区域(6)的半导体受光元件。p型区域(6)具有第一p型部(14)和基于光入射的电流的倍增率比第一p型部(14)大的第二p型部(15)。第一p型部(14)形成于p型区域(6)中的包含与半导体基板(1)垂直的中心轴(21c)在内的中央部,第二p型部(15)形成于中央部的在相对于中心轴(21c)而言的径向上的外周。(The semiconductor light receiving element (50) is formed by sequentially forming a multiplication layer (2), an electric field control layer (3), a light absorbing layer (4), and a window layer (5) on a semiconductor substrate (1), and forming a p-type region (6) on the window layer (5). The p-type region (6) has a first p-type section (14) and a second p-type section (15) having a larger multiplication factor of current based on incidence of light than the first p-type section (14). A first p-type section (14) is formed in a central section of the p-type region (6) that includes a central axis (21c) perpendicular to the semiconductor substrate (1), and a second p-type section (15) is formed on the outer periphery of the central section in the radial direction with respect to the central axis (21 c).)

1. A semiconductor light receiving element includes a semiconductor substrate, a multiplication layer, an electric field control layer, a light absorption layer, and a window layer formed in this order, the window layer having a p-type region,

it is characterized in that the preparation method is characterized in that,

the p-type region has a first p-type section and a second p-type section having a larger multiplication factor of a current based on incidence of light than the first p-type section,

the first p-type portion is formed in a central portion of the p-type region including a central axis perpendicular to the semiconductor substrate,

the second p-type portion is formed on an outer periphery of the central portion in a radial direction with respect to the central axis.

2. The semiconductor light receiving element according to claim 1,

the second p-type section extends toward the semiconductor substrate side than the first p-type section.

3. The semiconductor light receiving element according to claim 1 or 2,

the second p-type portion is formed to extend into the light absorbing layer.

4. A semiconductor light receiving element according to any one of claims 1 to 3,

the second p-type portion is formed at an outermost peripheral portion in the radial direction of the p-type region.

5. A semiconductor light receiving element according to any one of claims 1 to 3,

the first p-type portion is also formed at the outer periphery of the second p-type portion in the radial direction.

6. A semiconductor light receiving element according to any one of claims 1 to 3,

the second p-type section is formed on the side of the central axis with respect to the radially outermost peripheral section of the p-type region, and extends toward the semiconductor substrate side with respect to the outermost peripheral section.

7. A semiconductor light receiving element according to any one of claims 1 to 6,

the multiplication layer contains aluminum.

8. A semiconductor light receiving element according to any one of claims 1 to 7,

the p-type region contains zinc.

9. A semiconductor light receiving element according to any one of claims 1 to 7,

the p-type region is a region in which zinc is diffused.

10. The semiconductor light receiving element according to any one of claims 1 to 9,

a differential distance between a terminal portion of the first p-type portion closest to the semiconductor substrate and a terminal portion of the second p-type portion closest to the semiconductor substrate in the central axis direction is 100nm or more.

11. The semiconductor light receiving element according to any one of claims 1 to 10,

the impurity concentration of the p-type region is 1 × 10¹⁸cm^-3The above.

12. A method for manufacturing a semiconductor light receiving element according to any one of claims 1 to 11,

characterized in that it comprises:

forming the multiplication layer, the electric field control layer, the light absorption layer, and the window layer in this order on the semiconductor substrate;

a first p-type portion forming step of forming the first p-type portion of the p-type region; and

a second p-type portion forming step of forming the second p-type portion of the p-type region after the first p-type portion forming step.

13. A method for manufacturing a semiconductor light receiving element having a semiconductor substrate, a multiplication layer, an electric field control layer, a light absorbing layer, and a window layer, wherein a p-type region having a first p-type portion and a second p-type portion having a larger multiplication factor of a current based on incidence of light than the first p-type portion is formed in the window layer,

characterized in that it comprises:

a step of forming a laminate by sequentially laminating the multiplication layer, the electric field control layer, the light absorption layer, and the window layer on the semiconductor substrate;

a first p-type portion forming step of forming the first p-type portion of the p-type region; and

a second p-type portion forming step of forming the second p-type portion of the p-type region after the first p-type portion forming step.

14. The method of manufacturing a semiconductor light receiving element according to claim 13, wherein the semiconductor light receiving element is a semiconductor light receiving element,

the first p-type portion forming step and the second p-type portion forming step diffuse zinc into the laminate.

15. The method of manufacturing a semiconductor light receiving element according to claim 13 or 14,

the second p-type portion is formed to extend into the light absorbing layer.

Technical Field

The present application relates to a semiconductor light receiving element and a method for manufacturing the semiconductor light receiving element.

Background

As a semiconductor light receiving element used for optical communication and the like, an Avalanche Photodiode (APD), which is one kind of Photodiodes (PDs), is often used. Photodiodes, avalanche photodiodes are suitably labeled as PD, APD, respectively. In the APD, an electric field intensity in the multiplication layer is increased by applying a voltage to generate avalanche multiplication, and carriers can be amplified. In other words, carriers reaching the internal multiplication layer among carriers generated in the light absorption layer by incident light can be amplified, and thus the S/N ratio as a receiver can be improved. As a result, APDs are often used for long-distance communication applications in particular.

APDs for optical communication applications can be broadly divided into two types depending on the materials used for the multiplication layer. Fig. 3 of patent document 1 discloses an APD (first APD) using InP for the multiplication layer, and fig. 1 of patent document 1 discloses an APD (second APD) using a material containing Al (aluminum) such as InAlAs for the multiplication layer. Among them, InAlAs is also described as AlInAs. A first APD disclosed in fig. 3 of patent document 1 is a structure in which an n-type InP layer, an n-type light absorption layer, an n-type multiplication layer, and an n-type InP layer are stacked in this order on an n-type InP substrate, a p + region is formed in the InP layer on the front surface side (the side opposite to the InP substrate), and a protective ring portion (guard ring) as a p-region is formed on the outer periphery of the p + region. In an APD in which the multiplication layer is InP, holes reaching the multiplication layer from the light absorption layer can be multiplied when the electric field intensity of the multiplication layer is increased. That is, an APD in which the multiplication layer is InP is a hole multiplication type. The guard ring functions as a current path to prevent edge breakdown such as rapid multiplication at the end portion, which is the outer periphery of the p + region, or to prevent breakdown due to concentration of current in the p + region when penetration (reach-through) occurs at the end portion of the p + region before the center of the p + region when input light increases instantaneously.

In the second APD disclosed in fig. 1 of patent document 1, an n-type InP layer, an n-type multiplication layer, an n-type light absorption layer, and an n-type InP layer are stacked in this order on an n-type InP substrate, a p + region is formed in the InP layer on the front surface side, and a protective ring portion (guard ring) as a p-region is formed on the outer periphery of the p + region. APDs having an Al-based multiplication layer are electron-multiplying. Since electrons have a small effective mass and a high moving speed as compared with holes, an electron-multiplying APD can be expected to operate at a high speed and with low noise as compared with a hole-multiplying APD. Therefore, with an increase in bit rate (bit rate) required for semiconductor light receiving elements for optical communication, electron multiplication APDs are widely used.

Patent document 1: japanese patent laid-open publication No. 02-010780 (FIGS. 1 and 3)

In the electron multiplication APD (second APD) disclosed in fig. 1 of patent document 1, the multiplication layer is located at a lower portion (semiconductor substrate side) of the light absorption layer, and the structure is different from that of the hole multiplication APD (first APD) in which the multiplication layer is located at an upper portion (opposite side to the semiconductor substrate) of the light absorption layer. In the electron-multiplying APD disclosed in fig. 1 of patent document 1, the multiplication layer is located between the semiconductor substrate and the light absorbing layer, the depth of the protective ring portion as a p-region is the same as the depth of the p + region (p-type region) formed in the light receiving region through which incident light passes, and the protective ring portion does not reach the multiplication layer. In addition, in patent document 1, there is no mention about the function of the protective ring portion in the electron-multiplying APD (second APD). The protective ring portion in the electron-multiplying APD (second APD) cannot exhibit the same function as the protective ring portion in the hole-multiplying APD (first APD) having a different structure.

In the electron-multiplying APD disclosed in fig. 1 of patent document 1, a p + region (p-type region) is surrounded by a p-region, and the multiplication factor by light incidence in the vicinity of the central portion of the p + region (p-type region) increases. In general, the positions of an optical fiber that propagates light and an APD are adjusted so that the light incident into a light receiving region of the APD has the highest density at the center of the light receiving region. Therefore, in the electron-multiplying APD disclosed in fig. 1 of patent document 1, when strong light suddenly enters the p-type region of the light-receiving region, carriers generated in the central portion of the p-type region are greatly multiplied by a synergistic effect of a point that the multiplication layer is located between the semiconductor substrate and the light-absorbing layer and a point that the multiplication factor of the central portion of the p-type region is high, and a photocurrent flowing in the central portion of the p-type region excessively increases. In the electron-multiplying APD disclosed in fig. 1 of patent document 1, when strong light enters the p-type region of the light-receiving region, the photocurrent excessively increases in the central portion of the p-type region, and the APD generates heat, which is a problem that the characteristics are easily deteriorated.

Disclosure of Invention

An object of the technology disclosed in the present specification is to provide a semiconductor light receiving element capable of suppressing deterioration of characteristics even when excessive light enters a p-type region formed in a light receiving region of the incident light.

In the semiconductor light receiving element of one example disclosed in the present specification, a multiplication layer, an electric field control layer, a light absorbing layer, and a window layer are formed in this order on a semiconductor substrate, and a p-type region is formed on the window layer. The p-type region has a first p-type section and a second p-type section having a larger multiplication factor of current based on incidence of light than the first p-type section. The first p-type portion is formed in a central portion of the p-type region including a central axis perpendicular to the semiconductor substrate, and the second p-type portion is formed on an outer periphery of the central portion in a radial direction with respect to the central axis.

In the semiconductor light receiving element of the example disclosed in the present specification, since the p-type region includes the first p-type portion formed in the central portion and the second p-type portion formed in the outer periphery of the central portion and having a larger multiplication factor of the current due to light incidence than the first p-type portion, even if excessive light is incident on the p-type region formed in the light receiving region of the incident light, the characteristic degradation can be suppressed.

Drawings

Fig. 1 is a cross-sectional view showing a schematic structure of a first semiconductor light receiving element according to embodiment 1.

Fig. 2 is a graph showing the calculation results of the breakdown voltage and the penetration voltage of the semiconductor light receiving element of fig. 1.

Fig. 3 is a diagram showing current characteristics of the semiconductor light receiving element of fig. 1.

Fig. 4 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element of a comparative example.

Fig. 5 is a graph showing current characteristics of the semiconductor light receiving element of fig. 4.

Fig. 6 is a diagram illustrating a diffusion process for forming the p-type region of fig. 1.

Fig. 7 is a diagram illustrating a diffusion process for forming the p-type region of fig. 1.

Fig. 8 is a cross-sectional view showing a schematic structure of a second semiconductor light receiving element according to embodiment 1.

Fig. 9 is a cross-sectional view showing a schematic structure of a third semiconductor light receiving element according to embodiment 1.

Fig. 10 is a cross-sectional view showing a schematic structure of a fourth semiconductor light receiving element according to embodiment 1.

Fig. 11 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 2.

Fig. 12 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 2.

Fig. 13 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 3.

Fig. 14 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 3.

Fig. 15 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 4.

Fig. 16 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 4.

Fig. 17 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 5.

Fig. 18 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 5.

Detailed Description

Embodiment mode 1

A semiconductor light receiving element 50 according to embodiment 1 will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repeated description thereof may be omitted. Fig. 1 is a cross-sectional view showing a schematic structure of a first semiconductor light receiving element according to embodiment 1. Fig. 2 is a graph showing the calculation results of the breakdown voltage (breakdown voltage) and the penetration voltage (reach-through voltage) of the semiconductor light receiving element of fig. 1, and fig. 3 is a graph showing the current characteristics of the semiconductor light receiving element of fig. 1. Fig. 4 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element of a comparative example, and fig. 5 is a graph showing current characteristics of the semiconductor light receiving element of fig. 4. Fig. 6 and 7 are views for explaining a diffusion process for forming the p-type region of fig. 1. Fig. 8 is a cross-sectional view showing a schematic structure of a second semiconductor light receiving element according to embodiment 1, and fig. 9 is a cross-sectional view showing a schematic structure of a third semiconductor light receiving element according to embodiment 1. Fig. 10 is a cross-sectional view showing a schematic structure of a fourth semiconductor light receiving element according to embodiment 1. An n-type InP substrate, that is, a semiconductor substrate 1, has a multiplication layer 2 of n-type AlInAs containing Al (aluminum), an electric field control layer 3 of p-type InP, a light absorption layer 4 of n-type InGaAs, and a window layer 5 of n-type InP stacked in this order on the surface thereof. A p-type region 6 is formed in a part of the window layer 5, and a vertical structure region including the p-type region 6 is defined as a light receiving region 22. In fig. 1, the light-receiving region 22 is a region from a broken line 21a to a broken line 21e, and the surface shape of the p-type region 6 is, for example, a circle.

SiN and SiO are formed on the surface (the surface opposite to the semiconductor substrate 1) of the window layer 5₂The passivation film 8 is formed, and an anode electrode 7 is formed on the surface of the p-type region 6. The p-type region 6 is electrically connected to the anode electrode 7. A cathode electrode 9 and an antireflection film 10 are formed on the back surface of the semiconductor substrate 1. The back surface of the semiconductor substrate 1 is electrically connected to the cathode electrode 9. The cathode electrode 9 has, for example, a rectangular shape (rear surface shape) when viewed from the rear surface of the semiconductor light receiving element 50, and a circular opening 20 is formed, and an antireflection film 10 is formed on the rear surface of the semiconductor substrate 1 inside the opening 20. The back surface of the antireflection film 10 is circular. Fig. 1 shows an example in which the outer periphery of p-type region 6 in the radial direction with respect to central axis 21c coincides with the outer periphery of antireflection film 10 in the radial direction. The semiconductor light receiving element 50 shown in fig. 1 is a back-surface-incident avalanche photodiode in which light is incident from the back surface of the semiconductor substrate 1.

The multiplication layer 2, the electric field control layer 3, the light absorbing layer 4, and the window layer 5 are epitaxial layers formed by an mocvd (metal Organic Chemical Vapor deposition) apparatus, an mbe (molecular Beam epitaxy) apparatus, or the like. The passivation film 8 is formed by a deposition apparatus, a sputtering apparatus, a cvd (chemical Vapor deposition) apparatus, or the like, and is formed by a photolithography technique or an etching technique. The anode electrode 7 and the cathode electrode 9 are formed by a deposition apparatus, a sputtering apparatus, or the like, and are formed by a photolithography technique or an etching technique. The antireflection film 10 is formed by a sputtering apparatus, a vapor deposition apparatus, a CVD apparatus, an MBE apparatus, or the like.

The p-type region 6 is formed in a portion above the interface between the light absorbing layer 4 and the window layer 5, i.e., in the window layer 5 separated from the interface. The p-type region 6 has a first p-type section 14 having a shallow depth in the epitaxial layer stacking direction and a second p-type section 15 having a deeper depth in the epitaxial layer stacking direction than the first p-type section 14. The second p-type section 15 extends further toward the semiconductor substrate 1 than the first p-type section 14. Second p-type region 15 is formed in the outermost circumferential portion in the radial direction of p-type region 6. The diffusion front edges of the first p-type section 14 and the second p-type section 15 are both located above the interface between the light absorbing layer 4 and the window layer 5, and are formed inside the window layer 5 separated from the interface between the light absorbing layer 4 and the window layer 5. Wherein the diffusion front represents: the boundary in the depth direction between a portion where the dopant is diffused and a portion where the dopant is not diffused when the dopant is diffused from the surface of the epitaxial layer (the surface into which the diffusion source containing the dopant enters).

The surface shape of the first p-type portion 14 is circular, and the surface shape of the second p-type portion 15 is ring-shaped surrounding the outer periphery of the first p-type portion 14. The second p-type section 15 has the deepest diffusion front at the positions indicated by the broken lines 21b and 21 d. The broken line 21c is the central axis of the p-type region 6 and indicates the central axis of the light-receiving region 22. The central axis 21c is perpendicular to the semiconductor substrate 1, and light enters the semiconductor light receiving element 50, for example, in parallel with the central axis 21 c. The diffusion front difference d1, which is the distance between the diffusion front of the first p-type section 14 and the diffusion front of the second p-type section 15, may be a difference, for example, 1nm or more and less than 100 nm. The carrier concentration (impurity concentration) of p-type region 6 is, for example, about 5 × 10¹⁷cm^-3. Further, the diffusion front difference d1 can also be referred to as a differential distance in the direction of the central axis 21c between the end portion closest to the semiconductor substrate 1 in the first p-type section 14 and the end portion closest to the semiconductor substrate 1 in the second p-type section 15.

By making the diffusion front edge of second p-type section 15 deeper than the diffusion front edge of first p-type section 14, which is the central portion of p-type region 6 including central axis 21c, a difference can be given between breakdown voltage (Vbr) and penetration voltage (Vre) of APDs in the central portion and the outer peripheral portion of p-type region 6, that is, the central portion and the outer peripheral portion of light-receiving region 22. The characteristics of the first p-type section 14 and the second p-type section 15 will be described with reference to fig. 2 and 3. Fig. 2 shows the calculation results of the breakdown voltage (Vbr), the penetration voltage (Vre), and the multiplication factor. Fig. 3 schematically shows the current characteristics of the semiconductor light receiving element 50. In fig. 3, the horizontal axis and the vertical axis represent voltage and current, respectively. As shown in fig. 2, breakdown voltage (Vbr), penetration voltage (Vre), and multiplication factor of first p-type section 14 are 35.16V, 15.78V, and 6.7, respectively. Breakdown voltage (Vbr), penetration voltage (Vre), and multiplication factor of second p-type section 15 are 33.46V, 14.60V, and 9.6, respectively. The multiplication factor based on the incidence of light is a ratio of the current I0 before the occurrence of avalanche multiplication to the current I1 in the state where avalanche multiplication has occurred, and is represented by I1/I0. The value of the multiplication factor shown in fig. 2 is a value obtained when a reverse bias of 30V is applied between the anode electrode 7 and the cathode electrode 9. V1 shown in fig. 3 is an operating voltage of the semiconductor light receiving element 50, and is, for example, 30V.

Current characteristic 25 of fig. 3 is a current characteristic of the central portion of first p-type portion 14, and current characteristic 26 of fig. 3 is a current characteristic of second p-type portion 15. As shown in fig. 3, the current-voltage characteristics are different between the central portion of the light-receiving region 22 and the outer peripheral portion of the light-receiving region 22, and the multiplication factor changes when the same voltage is applied. Therefore, in the semiconductor light receiving element 50 according to embodiment 1, even if the applied voltage between the anode electrode 7 and the cathode electrode 9 is the same, the multiplication factor can be changed between the center of the light receiving region 22 and the outer periphery of the light receiving region 22. Specifically, when a constant applied voltage is applied between the anode electrode 7 and the cathode electrode 9, the first p-type section 14, which is the central portion of the light-receiving region 22, is in a state of a low multiplication factor compared to the second p-type section 15, which is the outer peripheral portion of the light-receiving region 22. The multiplication factor represents an increase rate of the current generated by the input of light, that is, the carrier is multiplied by several times and output. A large multiplication factor means that the flowing photocurrent is large even if the light input is the same.

As described above, the positions of the optical fiber that propagates light and the APD are usually adjusted so that the density of light incident on the light receiving region 22 of the APD becomes the highest at the central portion of the light receiving region 22. Therefore, when light is input, the optical density at the center of the light-receiving region 22, particularly at the center indicated by the broken line 21c, is high, and therefore a large number of carriers are generated at the center of the light-receiving region 22, and as a result, a large amount of current flows at the center of the light-receiving region 22. This phenomenon is particularly noticeable at the center indicated by the broken line 21 c. Therefore, when light is excessively input, the photocurrent flowing in the central portion of the light-receiving region 22 increases, and heat is generated with the increase in the photocurrent, which may deteriorate the characteristics. However, in the semiconductor light receiving element 50 according to embodiment 1, since the multiplication factor of the first p-type section 14, which is the central portion of the light receiving region 22, is lower than that of the second p-type section 15, which is the outer peripheral portion of the light receiving region 22, the photocurrent flowing in the second p-type section 15 of the light receiving region 22 increases, and the photocurrent flowing in the first p-type section 14 of the light receiving region 22 decreases, and even if an overcurrent occurs, the photocurrent is less likely to be concentrated in the first p-type section 14 of the light receiving region 22, and thus characteristic degradation due to heat generation can be suppressed.

The current characteristics of the semiconductor light-receiving element 60 of the comparative example in which the guard ring 64 is formed will be described. The semiconductor light receiving element 60 shown in fig. 4 is different from the semiconductor light receiving element 50 shown in fig. 1 in that an electric field control layer 3 is formed on the surface of a light absorbing layer 4, a multiplication layer 62 and a window layer 5 are formed on the surface of the electric field control layer 3, and a guard ring 64 is formed on the outer periphery of a first p-type section 14. The back surface side (semiconductor substrate 1 side) of first p-type section 14 is in contact with n-type multiplication layer 62. The diffusion front edge of the guard ring 64 is deepest at the positions indicated by the broken lines 21b, 21 d. Multiplication layer 62 of semiconductor light-receiving element 60 of the comparative example is InP, and guard ring 64 has a low impurity concentration in first p-type section 14. Immediately below guard ring 64 of semiconductor light receiving element 60 of the comparative example, avalanche multiplication does not occur even when light enters, and therefore, immediately below guard ring 64, the operation is performed as a PD without avalanche multiplication.

Fig. 5 schematically shows the current characteristics of the semiconductor light receiving element 60 of the comparative example. In fig. 5, the horizontal axis and the vertical axis represent voltage and current, respectively. Current characteristic 27 in fig. 5 is a current characteristic of the central portion of first p-type portion 14, and current characteristic 28 in fig. 3 is a current characteristic of guard ring 64. As shown in fig. 5, the semiconductor light receiving element 60 of the comparative example has the following structure: the photocurrent of the guard ring 64 that is the outer periphery of the light receiving region 22 is smaller than the photocurrent of the center portion of the light receiving region 22, and the multiplication factor of the guard ring 64 that is the outer periphery of the light receiving region 22 is lower than the multiplication factor of the center portion of the light receiving region 22. Since avalanche multiplication does not occur immediately below the protective ring 64, the multiplication factor of the outer peripheral portion of the light-receiving region 22 is 1. Therefore, the current characteristics at the center and the outer periphery of the light-receiving region 22 in the semiconductor light-receiving element 60 of the comparative example have a distribution opposite to the current characteristics at the center and the outer periphery of the light-receiving region 22 in the semiconductor light-receiving element 50 of embodiment 1. As described above, guard ring 64 in semiconductor light receiving element 60 of the comparative example in which multiplication layer 62 is InP functions differently from second p-type section 15, which is the outer periphery of light receiving region 22 in semiconductor light receiving element 50 of embodiment 1.

Therefore, the semiconductor light receiving element 60 of the comparative example cannot achieve the following effects of the semiconductor light receiving element 50 of embodiment 1: even if strong light enters the light-receiving region 22 and overcurrent occurs, the photocurrent flowing through the second p-type portion 15 of the light-receiving region 22 is increased as compared to the photocurrent flowing through the first p-type portion 14 of the light-receiving region 22, and therefore, it is difficult to concentrate on the first p-type portion 14 of the light-receiving region 22, and deterioration in characteristics due to heat generation can be suppressed. In the semiconductor light receiving element 60 of the comparative example, when strong light enters the light receiving region 22 and an overcurrent occurs, unlike the semiconductor light receiving element 50 of embodiment 1, the photocurrent concentrates on the first p-type portion 14 of the light receiving region 22, and therefore heat is generated with an increase in the photocurrent, which may deteriorate characteristics. The semiconductor light receiving element 60 of the comparative example needs to have a lower driving voltage or a lower incident light intensity than the semiconductor light receiving element 50 of embodiment 1.

The semiconductor light receiving element 50 according to embodiment 1 can make the multiplication factor of the central portion (first p-type section 14) of the light receiving region 22 having a high optical density lower than that of the outer peripheral portion (second p-type section 15) of the light receiving region 22, and can suppress excessive multiplication at the central portion (first p-type section 14) of the light receiving region 22 when light is excessively input, and can suppress characteristic degradation due to heat generation. The semiconductor light receiving element 50 of embodiment 1 has a longer life than the semiconductor light receiving element 60 of the comparative example because its characteristics do not deteriorate, i.e., its overcurrent resistance or light excessive input resistance is high, even when strong light enters the light receiving region 22 and an overcurrent occurs. Further, since the semiconductor light receiving element 50 of embodiment 1 has high resistance to overcurrent or light input, it can operate with high sensitivity by increasing the operating voltage V1 as compared with the semiconductor light receiving element 60 of the comparative example.

Further, even if the operating voltage V1 is lowered to lower the entire multiplication factor, the deterioration of the characteristics due to heat generation can be suppressed. However, in this case, there is a problem that the photocurrent of the entire light-receiving region 22 decreases, and the reception sensitivity deteriorates. In contrast, since the semiconductor light receiving element 50 according to embodiment 1 has a high multiplication factor in the outer periphery of the light receiving region 22, the total amount of photocurrent flowing through the entire light receiving region 22 is not substantially reduced even when the operating voltage V1 is lowered, and thus the characteristic degradation due to the reduction in photocurrent is less likely to occur. That is, even if the operating voltage V1 is lowered, the semiconductor light receiving element 50 of embodiment 1 can suppress the deterioration of the characteristics due to the reduction in the photocurrent, as compared with the semiconductor light receiving element 60 of the comparative example.

An example of a method for forming p-type region 6 will be described with reference to fig. 6 and 7. The p-type region 6 is formed by, for example, two diffusion processes. p-type region 6 is a region in which a p-type dopant such as Zn (zinc) or Be (beryllium) is diffused. The p-type dopant for p-type region 6 may Be a dopant other than Zn and Be. However, the p-type dopant for p-type region 6 is preferably Zn. When the p-type dopant is Zn, the carrier concentration (impurity concentration) of p-type region 6 is easily increased, and the controllability of the diffusion front is good, so that the structure of p-type region 6 in embodiment 1, that is, the structure in which the diffusion front of second p-type region 15 is deeper than the diffusion front of first p-type region 14 is suitable. When the p-type dopant is Zn (zinc), p-type region 6 is a region in which Zn (zinc) is diffused.

Fig. 6 shows a state in which after the multiplication layer 2, the electric field control layer 3, the light absorbing layer 4, and the InP window layer 5 are sequentially stacked on the surface of the semiconductor substrate 1 to form a stacked body (after the stacked body forming step), the diffusion preventing mask 24 is formed, and the p-type dopant is diffused from the opening 29 of the diffusion preventing mask 24 to form the second p-type portion 15. The opening 29 of the diffusion preventing mask 24 is formed in a ring shape. After the second p-type portion 15 is formed in the window layer 5, the diffusion preventing mask 24 shown in fig. 6 is removed, and the diffusion preventing mask 24 is newly formed as shown in fig. 7. The diffusion preventing mask 24 shown in fig. 7 is formed so that the opening 29 coincides with the outer periphery of the second p-type portion 15. The first p-type portion 14 is formed by diffusing p-type dopants from the opening 29 of the diffusion preventing mask 24. Fig. 6 shows a first p-type portion forming process for forming first p-type portion 14 of p-type region, and fig. 7 shows a second p-type portion forming process for forming second p-type portion 15 of p-type region 6 after the first p-type portion forming process. The concentration of the p-type dopant on the surface side of second p-type portion 15 is high. In each of the drawings showing the cross section, the spread caused by the diffusion in the horizontal direction (direction parallel to the semiconductor substrate 1) of the second p-type section 15 is omitted. The guard ring 64 of fig. 4 also omits extension by diffusion in the horizontal direction (direction parallel to the semiconductor substrate 1).

As shown in fig. 8, a contact layer 18 of AlGaInAs, InGaAsP, InGaAs, or the like, or a combination thereof may be interposed between the p-type region 6 and the anode electrode 7 to reduce contact resistance. In order to alleviate the band discontinuity, band discontinuity alleviating layers 17a, 17b, 17c, and 17d using InGaAsP, AlGaInAs, or the like may be interposed at the interface portions of the epitaxial layers. The band discontinuity reducing layer 17a is formed between the semiconductor substrate 1 and the multiplication layer 2, and the band discontinuity reducing layer 17b is formed between the multiplication layer 2 and the electric field control layer 3. The band discontinuity reducing layer 17c is formed between the electric field control layer 3 and the light absorbing layer 4, and the band discontinuity reducing layer 17d is formed between the light absorbing layer 4 and the window layer 5.

As shown in fig. 9, the cathode electrode 9 may be disposed on the front surface side of the window layer 5, not on the back surface side of the semiconductor substrate 1, as in the case of the anode electrode 7. The third semiconductor light receiving element 50 of embodiment 1 shown in fig. 9 includes: a groove 13 that penetrates the window layer 5, the light absorbing layer 4, the electric field control layer 3, and the multiplication layer 2, and reaches the semiconductor substrate 1; a cathode electrode 9 connected to the semiconductor substrate 1; and an insulating film 12 for insulating the cathode electrode 9 from each of the window layer 5, the light absorbing layer 4, the electric field control layer 3, and the multiplication layer 2. Fig. 9 shows an example in which the anti-reflection film 10 is not formed on the back surface of the semiconductor substrate 1 in the light-receiving region 22, and the passivation film 8 is not formed outside the light-receiving region 22 in the window layer 5 in the region where the cathode electrode 9 is not formed. The semiconductor light receiving element 50 of fig. 1 and 8 may be free of the passivation film 8 and the antireflection film 10. In addition, the semiconductor light receiving element 50 may have the passivation film 8 formed on the side surface of the epitaxial layer.

The semiconductor light receiving element 50 is not limited to the back-surface incident type, and may be a surface-incident type avalanche photodiode as shown in fig. 10. The fourth semiconductor light receiving element 50 of embodiment 1 shown in fig. 10 is different from the first semiconductor light receiving element 50 of embodiment 1 of fig. 1 in the following points. In the fourth semiconductor light receiving element 50, the cathode electrode 9 is formed on the back surface of the semiconductor substrate 1, the anode electrode 7 is formed in a ring shape, and the antireflection film 16 is formed on the window layer 5 in the surface region where the anode electrode 7 is not formed. In the fourth semiconductor light receiving element 50, the light receiving region 22 is an opening region which is a region of the opening 30 of the anode electrode 7. In fig. 10, the light-receiving region 22 is a range of broken lines 23a to 23 b. The fourth semiconductor light receiving element 50 has the same structure as the first semiconductor light receiving element 50 in the p-type region 6, and therefore has the same effect as the first semiconductor light receiving element 50.

Further, it is shown that the carrier concentration (impurity concentration) of p-type region 6 is about 5 × 10¹⁷cm^-3However, it is preferable that the carrier concentration (impurity concentration) of p-type region 6 is 1 × 10¹⁸cm^-3The above. The carrier concentration of the light absorbing layer 4 is usually 1 × 10¹⁶cm^-3Hereinafter, when the carrier concentration of p-type region 6 is low, the Depletion layer (Depletion region) width becomes unstable, and therefore, the difference between the multiplication factor of second p-type section 15 and the multiplication factor of first p-type section 14 cannot be realized with high accuracy. However, the carrier concentration (impurity concentration) in p-type region 6 is about 5 × 10¹⁷cm^-3In this case, the difference between the multiplication factor of second p-type section 15 and the multiplication factor of first p-type section 14 can be realized with high accuracy. In addition, if the carrier concentration (impurity concentration) of p-type region 6 is 1 × 10¹⁸cm^-3As described above, the difference between the multiplication factor of second p-type section 15 and the multiplication factor of first p-type section 14 can be realized with higher accuracy.

In the semiconductor light receiving element 50 of embodiment 1, the carrier concentration (impurity concentration) of the p-type region 6 is about 5 × 10¹⁷cm^-3Therefore, the depletion layer width at the time of bias application can be determined with high accuracy, and the effect of the first semiconductor light receiving element 50 can be stably obtained. In addition, in the semiconductor light receiving element 50 of embodiment 1, the carrier concentration (impurity concentration) in the p-type region 6 is 1 × 10¹⁸cm^-3In the above case, the depletion layer width at the time of bias application can be determined with higher accuracy, and the effect of the first semiconductor light receiving element 50 can be obtained more stably.

An example of forming p-type region 6 by two diffusion steps has been described, but a single diffusion step may be used. For example, the first p-type part 14 may be formed simultaneously with the second p-type part 15 by changing the central portion of the diffusion preventing mask 24 of fig. 6, that is, the portion for preventing the formation of the first p-type part 14, to a diffusion control mask in which the diffusion rate of the p-type dopant is slow.

The light absorbing layer 4 is not limited to InGaAs, and may be InGaAsP, InGaAsSb, or the like, or a combination thereof, as long as it is a material that generates carriers when light is incident, that is, a material having a small bandgap with respect to incident light. As long as the window layer 5 is a material that does not generate carriers when light is incident, in other words, a material having a large bandgap with respect to incident light, AlInAs, AlGaInAs, InGaAsP, or the like, or a combination thereof may be used. The electric field control layer 3 is not limited to InP, and may be formed using AlInAs. In addition, any material may be used for each epitaxial layer as long as the characteristics necessary for the APD operation can be obtained, and the material of each epitaxial layer is not limited to the material used for the description.

As described above, the semiconductor light receiving element 50 according to embodiment 1 is a semiconductor light receiving element in which the multiplication layer 2, the electric field control layer 3, the light absorbing layer 4, and the window layer 5 are formed in this order on the semiconductor substrate 1, and the p-type region 6 is formed on the window layer 5. p-type region 6 includes first p-type section 14 and second p-type section 15 having a larger multiplication factor of current based on incidence of light than first p-type section 14. The first p-type portion 14 is formed in the center portion of the p-type region 6 including a central axis 21c perpendicular to the semiconductor substrate 1, and the second p-type portion 15 is formed on the outer periphery of the center portion in the radial direction with respect to the central axis 21 c. In the semiconductor light receiving element 50 according to embodiment 1, since the p-type region 6 includes the first p-type portion 14 formed in the central portion and the second p-type portion 15 having a larger multiplication factor of the current based on the incidence of light than the first p-type portion 14 in the outer periphery of the central portion, even if excessive light is incident on the p-type region 6 formed in the incident light receiving region 22, it is possible to suppress the deterioration of the characteristics.

The semiconductor light receiving element manufacturing method according to embodiment 1 is a semiconductor light receiving element manufacturing method for manufacturing a semiconductor light receiving element 50, the semiconductor light receiving element 50 includes a semiconductor substrate 1, a multiplication layer 2, an electric field control layer 3, a light absorbing layer 4, and a window layer 5, and a p-type region 6 having a first p-type portion 14 and a second p-type portion 15 having a larger multiplication factor of a current based on light incidence than the first p-type portion 14 is formed in the window layer 5. The method for manufacturing a semiconductor light receiving element according to embodiment 1 includes the steps of: a step of forming a multiplication layer 2, an electric field control layer 3, a light absorption layer 4, and a window layer 5 in this order on a semiconductor substrate 1; a first p-type portion forming step of forming first p-type portion 14 of p-type region 6; and a second p-type portion forming step of forming second p-type portion 15 of p-type region 6 after the first p-type portion forming step. In the method of manufacturing a semiconductor light receiving element according to embodiment 1, since the semiconductor light receiving element 50 in which the p-type region 6 includes the first p-type portion 14 formed in the central portion and the second p-type portion 15 having a larger multiplication factor of the current incident on the outer periphery of the central portion than the first p-type portion 14 can be manufactured, the semiconductor light receiving element 50 in which the characteristic deterioration can be suppressed even if excessive light enters the p-type region 6 formed in the incident light receiving region 22 can be manufactured.

The method for manufacturing a semiconductor light receiving element according to embodiment 1 includes the steps of: a step of forming a laminate by sequentially laminating a multiplication layer 2, an electric field control layer 3, a light absorption layer 4, and a window layer 5 on a semiconductor substrate 1; a first p-type portion forming step of forming first p-type portion 14 of p-type region 6; and a second p-type portion forming step of forming second p-type portion 15 of p-type region 6 after the first p-type portion forming step. In the method of manufacturing a semiconductor light receiving element according to embodiment 1, since the semiconductor light receiving element 50 in which the p-type region 6 includes the first p-type portion 14 formed in the central portion and the second p-type portion 15 having a larger multiplication factor of the current incident on the outer periphery of the central portion than the first p-type portion 14 can be manufactured, the semiconductor light receiving element 50 in which the characteristic deterioration can be suppressed even if excessive light enters the p-type region 6 formed in the incident light receiving region 22 can be manufactured.

Embodiment mode 2

Fig. 11 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 2, and fig. 12 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 2. The semiconductor light receiving element 50 according to embodiment 2 is different from the semiconductor light receiving element 50 according to embodiment 1 in that the diffusion front edge of the second p-type section 15 in the p-type region 6 is formed inside the light absorbing layer 4, that is, the second p-type section 15 extends into the light absorbing layer 4. The other structure is the same as that of the semiconductor light receiving element 50 of embodiment 1. In the semiconductor light receiving element 50 according to embodiment 2, the diffusion front edge of the first p-type section 14 of the p-type region 6 is formed inside the window layer 5 separated from the interface between the light absorbing layer 4 and the window layer 5, similarly to the semiconductor light receiving element 50 according to embodiment 1. The semiconductor light receiving element 50 shown in fig. 11 is a back-surface incident avalanche photodiode, and the semiconductor light receiving element 50 shown in fig. 12 is a front-surface incident avalanche photodiode.

In the semiconductor light receiving element 50 according to embodiment 2, since there is a band gap difference between the light absorbing layer 4 and the window layer 5, as in the semiconductor light receiving element 50 according to embodiment 1, when a reverse bias is applied between the anode electrode 7 and the cathode electrode 9, the band gap difference acts as a barrier to holes generated in the light absorbing layer 4. That is, holes generated in the light absorbing layer 4 are less likely to flow to the first p-type section 14 due to the difference in band gap between the light absorbing layer 4 and the window layer 5. When the second p-type region 15 is formed to a position inside the light absorbing layer 4 with respect to the interface between the light absorbing layer 4 and the window layer 5, the portion where the second p-type region 15 and the light absorbing layer 4 are connected does not have a connection portion between the light absorbing layer 4 and the window layer 5, and the band gap between the second p-type region 15 and the light absorbing layer 4 is lower than the band gap between the light absorbing layer 4 and the window layer 5 below the first p-type region 14. In this case, holes generated in the light absorbing layer 4 move in the light absorbing layer 4 and move as holes to the second p-type regions 15, which are large carriers, and the potential barrier is smaller and easier than when moving from the light absorbing layer 4 to the window layer 5. Therefore, holes generated in the light absorbing layer 4 easily flow to the second p-type region 15 having a small barrier formed inside the light absorbing layer 4. In other words, holes generated in the light absorbing layer 4 flow through the second p-type portion 15 of the p-type region 6. This indicates that the photocurrent flowing through the first p-type portion 14 of the light-receiving region 22 decreases, that is, the photocurrent flowing through the central portion of the light-receiving region 22 decreases.

In the semiconductor light receiving element 50 according to embodiment 2, since the second p-type portion 15 of the p-type region 6 is formed to the inner side of the light absorbing layer 4 with respect to the interface between the light absorbing layer 4 and the window layer 5, even if excessive light enters the p-type region 6 formed in the light receiving region 22, deterioration in characteristics can be suppressed as compared with the semiconductor light receiving element 50 according to embodiment 1. As described in more detail. In the semiconductor light receiving element 50 according to embodiment 2, when light enters the p-type region 6 formed in the light receiving region 22, the photocurrent flowing through the second p-type portion 15 is always larger than the photocurrent flowing through the first p-type portion 14, and even when excessive light enters the p-type region 6, the photocurrent flowing through the second p-type portion 15 in the light receiving region 22 increases, so that even if an overcurrent occurs, the photocurrent is less likely to concentrate on the first p-type portion 14 in the light receiving region 22, and deterioration in characteristics due to heat generation can be suppressed as compared with the semiconductor light receiving element 50 according to embodiment 1.

As described above, the semiconductor light receiving element 50 according to embodiment 2 has the same effects as the semiconductor light receiving element 50 according to embodiment 1, since the p-type region 6 has the first p-type section 14 and the second p-type section 15 having the diffusion front deeper than the first p-type section 14. In the semiconductor light receiving element 50 according to embodiment 2, since the second p-type section 15 of the p-type region 6 is formed to a position inside the light absorbing layer 4 from the interface between the light absorbing layer 4 and the window layer 5, even if an overcurrent occurs, the photocurrent is less likely to be concentrated in the first p-type section 14 of the light receiving region 22 than in the semiconductor light receiving element 50 according to embodiment 1, and thus characteristic degradation due to heat generation can be suppressed.

Embodiment 3

Fig. 13 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 3, and fig. 14 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 3. The semiconductor light receiving element 50 according to embodiment 3 is different from the semiconductor light receiving element 50 according to embodiment 1 in that the second p-type section 15 of the p-type region 6 is formed in a ring shape between the outer periphery and the center (central axis 21c) of the p-type region 6 in the radial direction. In addition, in semiconductor light receiving element 50 according to embodiment 3, first p-type section 14 may be formed on the outer periphery of second p-type section 15 in the radial direction, or second p-type section 15 may be formed on the side closer to central axis 21c than the outermost periphery of p-type region 6 in the radial direction. The other structure is the same as that of the semiconductor light receiving element 50 of embodiment 1. The outer periphery of p-type region 6 is a portion through which broken line 21a passes and a portion through which broken line 21e passes, and the center of p-type region 6 is a portion through which broken line 21c passes. The semiconductor light receiving element 50 shown in fig. 13 is a back-surface incident avalanche photodiode, and the semiconductor light receiving element 50 shown in fig. 14 is a front-surface incident avalanche photodiode.

In the semiconductor light receiving element 50 according to embodiment 3, the p-type region 6 has the first p-type section 14 and the second p-type section 15 having a diffusion front deeper than the first p-type section 14, similarly to the semiconductor light receiving element 50 according to embodiment 1, and therefore, the same effect as that of the semiconductor light receiving element 50 according to embodiment 1 is obtained.

In addition, in semiconductor light receiving element 50 according to embodiment 3, the outer periphery of p-type region 6, that is, the outer periphery of first p-type section 14 is separated from the outer periphery of second p-type section 15, and deepest section distance l1, which is the distance between dashed line 21a passing through the outer periphery of p-type region 6 and dashed line 21b passing through the deepest diffusion front edge of second p-type section 15, is longer than semiconductor light receiving element 50 according to embodiment 1. Similarly, in semiconductor light receiving element 50 according to embodiment 3, deepest portion distance l1, which is the distance between dashed line 21e passing through the outer periphery of p-type region 6 and dashed line 21d passing through the deepest diffusion front edge of second p-type portion 15, is longer than that in semiconductor light receiving element 50 according to embodiment 1. Since the deepest part distance l1 of the semiconductor light receiving element 50 according to embodiment 3 is longer than that of the semiconductor light receiving element 50 according to embodiment 1, the shapes of the outer peripheral part of the p-type region 6, that is, the region of the broken lines 21a to 21b and the region of the broken lines 21d to 21e can be made gentler than that of the semiconductor light receiving element 50 according to embodiment 1, and the electric field concentration in the outer peripheral part of the p-type region 6 can be reduced compared to that of the semiconductor light receiving element 50 according to embodiment 1. Considering the shape of the outer peripheral portion of p-type region 6 with a curvature, semiconductor light receiving element 50 according to embodiment 3 can make the curvature of the outer peripheral portion of p-type region 6 smaller than that of semiconductor light receiving element 50 according to embodiment 1.

In the semiconductor light receiving element 50 according to embodiment 3, the shape of the outer peripheral portion of the p-type region 6 is gentler than that of the semiconductor light receiving element 50 according to embodiment 1, and therefore edge breakdown (edge breakdown down) at the end of the light receiving region 22 can be suppressed as compared with the semiconductor light receiving element 50 according to embodiment 1.

Embodiment 4

Fig. 15 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 4, and fig. 16 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 4. The semiconductor light receiving element 50 according to embodiment 4 is different from the semiconductor light receiving element 50 according to embodiment 3 in that the diffusion front edge of the second p-type section 15 of the p-type region 6 is formed inside the light absorbing layer 4. The other structure is the same as that of the semiconductor light receiving element 50 of embodiment 3. The semiconductor light receiving element 50 shown in fig. 15 is a back-surface incident avalanche photodiode, and the semiconductor light receiving element 50 shown in fig. 16 is a front-surface incident avalanche photodiode. The semiconductor light receiving element 50 according to embodiment 4 is a combination of the structure of the semiconductor light receiving element 50 according to embodiment 3 and the structure of the semiconductor light receiving element 50 according to embodiment 2.

Similar to the semiconductor light receiving element 50 of embodiment 1, the semiconductor light receiving element 50 of embodiment 4 has the same effect as the semiconductor light receiving element 50 of embodiment 1 because the p-type region 6 has the first p-type section 14 and the second p-type section 15 having the diffusion front deeper than the first p-type section 14. In the semiconductor light receiving element 50 according to embodiment 4, similarly to the semiconductor light receiving element 50 according to embodiment 3, the outer periphery of the p-type region 6, that is, the outer periphery of the first p-type section 14 is separated from the outer periphery of the second p-type section 15, and the deepest section distance l1 is longer than the semiconductor light receiving element 50 according to embodiment 1, so that the shape of the outer periphery of the p-type region 6 can be made gentler than the semiconductor light receiving element 50 according to embodiment 1, and the electric field concentration in the outer periphery of the p-type region 6 can be reduced compared to the semiconductor light receiving element 50 according to embodiment 1.

Further, in the semiconductor light receiving element 50 according to embodiment 4, similarly to the semiconductor light receiving element 50 according to embodiment 2, since the diffusion front edge of the second p-type section 15 of the p-type region 6 is formed inside the light absorbing layer 4, a path through which a photocurrent easily flows can be formed in a portion other than the center of the light receiving region 22. Therefore, in the semiconductor light receiving element 50 according to embodiment 4, the multiplication factor of the central portion of the light receiving region 22 (the first p-type portion 14 inside the second p-type portion 15) is lower than that of the semiconductor light receiving element 50 according to embodiment 3, and even if an overcurrent occurs, the photocurrent is less likely to be concentrated in the first p-type portion 14 of the light receiving region 22 than in the semiconductor light receiving element 50 according to embodiment 3, and thus the characteristic degradation due to heat generation can be suppressed.

Since the semiconductor light receiving element 50 according to embodiment 4 is formed by combining the structure of the semiconductor light receiving element 50 according to embodiment 3 and the structure of the semiconductor light receiving element 50 according to embodiment 2, even when excessive light enters the p-type region 6, it is possible to suppress edge breakdown at the end of the light receiving region 22 while suppressing characteristic degradation due to heat generation.

Embodiment 5

Fig. 17 is a cross-sectional view showing a schematic structure of a semiconductor light receiving element according to embodiment 5, and fig. 18 is a cross-sectional view showing a schematic structure of another semiconductor light receiving element according to embodiment 5. The semiconductor light receiving element 50 according to embodiment 5 is different from the semiconductor light receiving element 50 according to embodiment 1 in that the diffusion front edge difference, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is a diffusion front edge difference d2 of 100nm or more. The other structure is the same as that of the semiconductor light receiving element 50 of embodiment 1. The semiconductor light receiving element 50 shown in fig. 17 is a back-surface incident avalanche photodiode, and the semiconductor light receiving element 50 shown in fig. 18 is a surface incident avalanche photodiode. In a case where the diffusion front edge difference, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is 100nm or more, in one example of calculation, the multiplication factor of the central portion of the light-receiving region 22 (the first p-type section 14 inside the second p-type section 15) can be reduced from 9.6 to 6.7, and the photocurrent flowing in the central portion of the light-receiving region 22 can be reduced by about 30%.

In the semiconductor light receiving element 50 according to embodiment 5, the difference between the amplification factor at the central portion and the amplification factor at the peripheral portion in the light receiving region 22 can be realized more stably than in the semiconductor light receiving element 50 according to embodiment 1 because the difference between the diffusion front edges, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is 100nm or more. When the structure in which the difference between the diffusion front edges, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is 100nm or more, is applied to the semiconductor light receiving element 50 of embodiment 3, the difference between the multiplication factor at the center portion and the multiplication factor at the outer peripheral portion in the light receiving region 22 can be realized more stably than the semiconductor light receiving element 50 of embodiment 3.

A structure in which the diffusion front edge difference, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is 100nm or more, can be applied to the semiconductor light receiving element 50 of embodiment 2 and the semiconductor light receiving element 50 of embodiment 4. In this case, the difference between the multiplication factor of the central portion and the multiplication factor of the outer peripheral portion in the light-receiving region 22 can be stably realized.

In the semiconductor light receiving element 50 according to embodiment 5, the p-type region 6 has the first p-type section 14 and the second p-type section 15 having a diffusion front deeper than the first p-type section 14, similarly to the semiconductor light receiving element 50 according to embodiment 1, and therefore, the same effect as that of the semiconductor light receiving element 50 according to embodiment 1 is obtained. Further, in the semiconductor light receiving element 50 according to embodiment 5, since the diffusion front edge difference, which is the distance between the diffusion front edge of the first p-type section 14 and the diffusion front edge of the second p-type section 15, is 100nm or more, the difference between the multiplication factor of the central portion and the multiplication factor of the outer peripheral portion in the light receiving region 22 can be realized more stably than in the semiconductor light receiving element 50 according to embodiment 1.

In addition, although various exemplary embodiments and examples have been described in the present application, the various features, modes, and functions described in 1 or more embodiments are not limited to application to a specific embodiment, and can be applied to the embodiments alone or in various combinations. Therefore, a myriad of modifications not illustrated can be conceived within the technical scope disclosed in the present specification. For example, the case where at least 1 component is modified, added, or omitted is included, and the case where at least 1 component is extracted and combined with the components of other embodiments is also included.

Description of the reference numerals

1 … semiconductor substrate, 2 … multiplication layer, 3 … electric field control layer, 4 … light absorption layer, 5 … window layer, 6 … p-type region, 14 … first p-type part, 15 … second p-type part, 21c … dotted line (central axis), 50 … semiconductor light receiving element, d1 … diffusion front difference (differential distance), d2 … diffusion front difference (differential distance).