阅读说明：本技术 谐振转换器的软启动 (Soft start of resonant converter ) 是由 鲁宾尼奇·姚克绍 于 2020-03-13 设计创作，主要内容包括：LLC转换器包括：开关级,包括初级晶体管；谐振级,连接到开关级；变压器,包括连接到谐振级的初级绕组和与初级绕组耦接的次级绕组；整流级,连接到变压器的次级绕组并提供LLC转换器的输出电压；以及控制器,被配置为和/或被编程为在启动期间通过基于第一参考电压和第二参考电压对初级晶体管进行开关来控制输出电压,其中第一参考电压在启动期间呈指数增大,第二参考电压基于谐振级的谐振电流。(The LLC converter comprises: a switching stage including a primary transistor; a resonant stage connected to the switching stage; a transformer including a primary winding connected to the resonant stage and a secondary winding coupled to the primary winding; a rectifier stage connected to the secondary winding of the transformer and providing an output voltage of the LLC converter; and a controller configured and/or programmed to control the output voltage during start-up by switching the primary transistor based on a first reference voltage and a second reference voltage, wherein the first reference voltage increases exponentially during start-up and the second reference voltage is based on a resonant current of the resonant stage.)

1. An LLC converter, comprising:

a switching stage including a primary transistor;

a resonant stage connected to the switching stage;

a transformer, comprising:

a primary winding connected to the resonant stage; and

a secondary winding coupled with the primary winding;

a rectification stage connected to the secondary winding of the transformer and providing an output voltage of the LLC converter; and

a controller to control the output voltage during start-up by switching the primary transistor based on a first reference voltage that increases exponentially during start-up and a second reference voltage that is based on a resonant current of the resonant stage.

2. The LLC converter of claim 1, wherein the primary transistor is switched with zero voltage switching.

3. The LLC converter of claim 1, wherein the controller adds the first reference voltage and the second reference voltage.

4. The LLC converter of claim 1, wherein the second reference voltage is zero unless an average resonant current is below a threshold current.

5. The LLC converter of claim 1, wherein the second reference voltage is limited to between zero and one-third of a maximum reference voltage.

6. The LLC converter of claim 1, wherein the primary switches are arranged in a half-bridge or full-bridge configuration.

7. The LLC converter of claim 6, wherein the resonant stage comprises a split resonant capacitor.

8. The LLC converter of claim 1, wherein the resonant stage comprises a resonant capacitor and a resonant inductor.

9. The LLC converter of claim 1, wherein the rectification stage comprises a synchronous rectifier connected to the secondary winding.

Technical Field

The invention relates to soft start of a resonant converter. More particularly, the invention relates to soft start-up of a resonant converter using a first reference voltage that increases exponentially during start-up and a second reference voltage that is based on a resonant current of a resonant stage.

Background

Fig. 1 to 3 show resonant converters that may be used with known soft start schemes or the soft start scheme of a preferred embodiment of the present invention.

It is known to soft start converters to prevent large inrush currents and large output voltage overshoots. Some known soft start schemes for resonant converters use a reference voltage V of linear or exponential type_refWherein the exponential type is an exponential curve or is similar to an exponential curve. This known soft start scheme may not be able to maintain the minimum resonant current required to achieve Zero Voltage Switching (ZVS) during soft start. Output voltage V due to the characteristics of LLC loop gain_outAnd a reference voltage V_refThere is a difference between them which results in the voltage control loop being ineffective and the required minimum resonant current cannot be maintained. Known soft start algorithms may suffer from one or more of the following problems:

1. reference voltage V of linear or exponential type_refIt may be too slow or too fast depending on the load during soft start.

2. Output voltage V_outThe curve includes regions where the output voltage does not rise significantly in the frequency range where the resonant tank gain does not increase significantly.

3. The switching frequency is based on a reference voltage V_refMay vary slowly, either because of saturation of the voltage controller or because of the narrow bandwidth of the loop.

4. The resonant current may be very low, which may cause the main power switches (e.g., switches Q1, Q2 in fig. 1 and 2 and switches Q1, Q2, Q3, Q4 in fig. 3) to switch hard, i.e., at a non-zero voltage.

The loop gain of the converter is non-linear over the switching frequency range. Because the loop gain at low frequencies may be lower than at high frequencies, the resonant current may drop to a very low level during soft start, which may result in a loss of ZVS.

Sun et al (U.S. patent No. 8,081,740) teach operating an LLC resonant converter in a fixed frequency and variable pulse duty cycle mode of operation during start-up of the LLC resonant converter. The soft start scheme of Sun et al can effectively limit inrush current, but both the high-side switch and the low-side switch operate with variable pulse duty cycles. One drawback of the soft start scheme of Sun et al is that it is difficult to implement the scheme using commercially available LLC control Integrated Circuits (ICs). Most commercial LLC control ICs do not provide variable pulse duty cycle functionality. To achieve this function, complex external control circuitry needs to be added while taking into account the isolation requirements of the high-side switch. Another important drawback of the soft start scheme of Sun et al is the loss of soft switching during start-up, which requires special considerations for gate drive design.

Feng et al, the Power electronics center, "Optimal track Control of Resonant LLC Converter for Soft Start-Up" discloses another Soft Start scheme. This soft start scheme uses asymmetric current limiting bands to establish initial voltage and current levels. Because the start-up current of Feng et al is controlled within the asymmetric current limit band, there is no inrush current during start-up. Thus, one disadvantage of the control scheme of Feng et al is that a resonant current and resonant capacitor voltage measurement circuit are required to implement the asymmetric current limit band, which increases the overall cost of the system including the control scheme of Feng et al. Another disadvantage of the control scheme of Feng et al is that it can be difficult, if not impossible, to implement the control scheme using a fixed-point microcontroller.

Disclosure of Invention

To overcome the above problems, preferred embodiments of the present invention provide a soft-start scheme for a resonant converter in which the output voltage V is at_outReference voltage V in the area below the curve_refIs modified in that the resonant current of the resonant converter in this region is lower than the current required for normal ZVS operation of the switches in the resonant converter. The soft start scheme is applicable to any type of LLC resonant converter, e.g. half-bridge converter with a single resonant capacitor, a split capacitor, and a full-bridge converter, respectivelyAs shown in fig. 1 to 3.

According to a preferred embodiment of the invention, the LLC converter comprises: a switching stage including a primary transistor; a resonant stage connected to the switching stage; a transformer including a primary winding connected to the resonant stage and a secondary winding coupled to the primary winding; a rectifier stage connected to the secondary winding of the transformer and providing an output voltage of the LLC converter; and a controller controlling the output voltage during start-up by switching the primary transistor based on a first reference voltage and a second reference voltage, wherein the first reference voltage increases exponentially during start-up, and the second reference voltage is based on a resonant current of the resonant stage.

The primary transistor is preferably switched with zero voltage switching. The controller preferably adds the first reference voltage and the second reference voltage. The second reference voltage is preferably zero unless the average resonant current is below the threshold current. The second reference voltage is preferably limited to between zero and one third of the maximum reference voltage.

The primary switches are preferably arranged in a half-bridge or full-bridge configuration. The resonant stage preferably comprises a split resonant capacitor.

The resonant stage preferably comprises a resonant capacitor and a resonant inductor. The rectification stage preferably comprises a synchronous rectifier connected to the secondary winding.

The above and other features, elements, characteristics, steps and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments of the present invention with reference to the attached drawings.

Drawings

Fig. 1 is a circuit diagram of a half-bridge LLC converter with a single resonant capacitor.

Fig. 2 is a circuit diagram of a half-bridge LLC converter with a split resonant capacitor.

Fig. 3 is a circuit diagram of a full bridge LLC converter.

Fig. 4 is a control block diagram of a full bridge LLC converter with closed loop control.

Fig. 5 shows the soft start waveform of the converter at 10% load.

Fig. 6 shows the soft start waveform of the converter at 60% load.

Detailed Description

Fig. 1 shows a half bridge LLC converter with a single resonant capacitor C. The converter includes a primary side and a secondary side. The primary side is the side of the converter between the terminals PFC V +, PFC V-and the transformer T. The secondary side is the side of the converter between the transformer T and the output terminals +, -. A PFC stage (not shown) provides a dc input to the converter at terminals PFC V +, PFC V-.

The primary circuit includes a primary switch Q₁、Q₂Resonant inductor Lr, resonant capacitor C and inductor L_m. Primary switch Q₁、Q₂A switching stage is defined and connected in series between the terminals PFC V +, PFC V-. Resonant inductor L_rResonant capacitor C and inductor L_mDefining a resonant level. Resonant inductor L_rAnd a resonant capacitor C connected in series with each other and connected between the primary winding of the transformer T and the primary switch Q₁、Q₂Between nodes in between. Inductor L_mConnected in parallel to the primary winding of the transformer T. The secondary circuit comprising a synchronous rectifier SR₁、SR₂An output capacitor C_oAnd output terminal +, -. The transformer T comprises two secondary windings. Synchronous rectifier SR₁、SR₂Defining a rectifier stage and connected to the secondary winding of the transformer T. Output capacitor C_oConnected to the node between the two secondary windings and the output terminal +. The controller 100 may be used to synchronize and control the switch Q₁、Q₂And synchronous rectifier SR₁、SR₂Corresponding gate g of₁、g₂、g_r1And g_r2The switch of (2). The above-described components are typical components of an LLC converter including the LLC converters shown in fig. 2 and 3.

FIG. 2 shows a capacitor C with a split resonance₁、C₂The half bridge LLC converter of (1). The converter shown in fig. 2 is similar to the converter shown in fig. 1, except that the resonant capacitor C is divided into resonant capacitors C₁、C₂. The resonant capacitors are connected in series with each other and with terminal PFC V +And the PFC V _ are connected in parallel. Capacitor C₁、C₂The node in between is connected to the primary winding of the transformer T. As in the LLC circuit of FIG. 1, the controller 200 may be used to synchronize and control the switch Q₁、Q₂And synchronous rectifier SR₁、SR₂Corresponding gate g of₁、g₂、g_r1And g_r2The switch of (2).

Fig. 3 shows a full bridge LLC converter. The converter shown in fig. 3 is similar to the converters shown in fig. 1 and 2, but includes a full bridge instead of a half bridge. The primary circuit includes a primary switch Q₁、Q₂、Q₃、Q₄Resonant inductor Lr₁、Lr₂Resonant capacitor C₁、C₂And an inductor L_m. Primary switch Q₁、Q₂、Q₃、Q₄The switching stages are defined to be connected in full bridge and to the terminals PFC V +, PFC V-. Resonant inductor L_r1And a resonant capacitor C₁Are connected in series with each other and are connected between the primary winding of the transformer T and the primary switch Q₂、Q₄Between nodes in between. Resonant inductor L_r2And a resonant capacitor C₂Are connected in series with each other and are connected between the primary winding of the transformer T and the primary switch Q₁、Q₃Between nodes in between. Inductor L_mConnected in parallel between the two ends of the primary winding of the transformer T. The controller 300 may be used to synchronize and control the switch Q₁、Q₂And synchronous rectifier SR₁、SR₂Corresponding gate g of₁、g₂、g₃、g₄、g_r1And g_r2The switch of (2).

Primary switch Q in FIGS. 1-3₁、Q₂、Q₃、Q₄And synchronous rectifier SR₁、SR₂Which may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), other suitable transistors may be used. Primary switch Q₁、Q₂、Q₃、Q₄And synchronous rectifier SR₁、SR₂Can be turned on by the controller 100, 200, 300 andand closing. The controller 100, 200, 300 may open and close the primary switch Q based on the output voltage₁、Q₂、Q₃、Q₄And synchronous rectifier SR₁、SR₂. The controllers 100, 200, 300 may be implemented using one or more digital microcontrollers that may be programmed and/or configured to implement the transient control methods discussed below. The controllers 100, 200, 300 may be any type of digital processor (regardless of its architecture), including but not limited to a Digital Signal Processor (DSP), a Programmable Intelligent Computer (PIC), a Field Programmable Gate Array (FPGA), an AVR microcontroller, and the like. The transient control method may be performed at any speed and at a custom sampling rate, depending on the switching frequency of the converter. The gain and reference of the controllers 100, 200, 300 may be adjusted in any manner to accommodate the design and provide a stable control loop. The controller 100, 200, 300 may be placed on the primary side or the secondary side. Isolation between the primary side and the secondary side may be maintained by sending signals across an isolation boundary using an isolator, such as a digital isolator or an optical isolator such as an optical coupler.

The soft start scheme of fig. 4 may provide an output voltage V that rises similar to an exponential rise and smoothes out approaching the set point_outCurve line. To ensure that this soft start scheme compensates for the significant non-linearity of the resonant tank, the soft-soft scheme uses a control correction in the form of a current control loop to help maintain a minimum resonant current level for ZVS, which operates on the principle of increasing the reference voltage v when needed_ref。

The soft start scheme shown in FIG. 4 uses current control to modify the output voltage V_outReference voltage V in the region where the resonant current of the curve is lower than the current required for normal ZVS operation_ref. The soft start scheme may be used for any type of LLC resonant converter, e.g. half-bridge converters with a single resonant capacitor, split capacitors, and full-bridge converters, e.g. as shown in fig. 1-3, respectively.

The soft start scheme shown in fig. 4 may be implemented in a digital microprocessor 400, including the functions within the dashed box. In FIG. 4The functional blocks within microcontroller 400 should be understood as digital representations rather than actual physical structures within microcontroller 400. Instead of or in addition to the microcontroller 400, a soft start scheme may be implemented using discrete components. To address the problem of insufficient resonant current to sustain ZVS operation during soft start, a current control loop is added to the voltage control loop. The current control loop and the voltage control loop work in parallel, and the reference voltage v can be increased_{ref_v}. Both the voltage control loop and the current control loop may be implemented as proportional/integral controllers or any other suitable controllers.

The current sensor 1 measures the resonant current of the converter 9. The current sensor 1 may output a signal representing a resonant current i_rSignal i of the mean value of_{r_avg}The analog current sensor of (1). Signal i_r__avgSampled by the microcontroller 400 and then referenced from the current i in the summing block 2_refIs subtracted. Current reference i_refIs the current reference of the current loop and is a fixed number. Current reference i_refIs the minimum average value of the resonant current required to maintain ZVS operation under light load conditions during soft start of the converter 9. The summing block 2 provides a current error signal e fed to a current controller 3_i. The current controller 3 outputs a reference voltage v_{ref_i}Which represents the output of the current control loop. The limiter 4 has a low saturation point of zero and a high saturation point of a reference voltage v_{ref_v}One third of the maximum value of (c). The purpose of limiting the output of the current controller 2 to only a positive number is to prevent the current controller 3 from reducing the reference voltage v_{ref_v}And then reduce the resonant current.

Reference voltage v_{ref_v}Which may be a digitally generated voltage reference inside the microcontroller and defines the output voltage waveform for the soft start operation of the converter 9. The summing block 5 sums the reference voltage v_{ref_i}And a reference voltage v_{ref_v}Are added to generate a reference voltage v_ref. Two reference voltages v_{ref_i}And v_{ref_v}Always positive. Thus, the reference voltage v_refCan only be positive.

Voltage sensingThe device 10 senses the output voltage V of the converter 9_out. The voltage sensor 10 may be an analog voltage sensor. The output of the voltage sensor 10 is sampled and digitized by the microcontroller 400 to determine the signal v_outThe numerical value of (c). The summing block 6 derives a reference voltage v from_refMinus the signal v_outTo provide an error signal e_v. Error signal e_vIs input to a voltage controller 7, which voltage controller 7 may be a digital voltage controller. The voltage controller 7 outputs a control signal u to the PWM8 to form gate pulses for the switching transistors of the converter 9.

As shown in fig. 4, the current loop does not control the load current. The current control loop is only enabled when an extremely low resonant current level is detected. During light load soft start operation and when the current controller is enabled, the extra resonant tank energy generated by the current control loop results in a smaller output voltage rise time and ultimately in the converter 9 reaching the set point faster. However, during heavy load soft start operation, the resonant current is much higher than the current reference i_refAnd (4) a threshold value. Since the limiter 4 does not allow a negative output value, the output of the current controller 3 remains zero, so the soft start operation is not affected by the current control loop.

After the soft start operation has ended and the output voltage V_outAfter reaching its nominal voltage, the current controller 3 is disconnected and does not affect the voltage control loop. Thus, this soft start scheme does not interfere or cause any sudden output voltage or resonant current changes. Furthermore, the computational load on the microcontroller 400 increases only slightly during soft start.

Fig. 5 and 6 show various waveforms during soft start with light and heavy loads. For example, the light load may be 10% of the maximum load, and the heavy load may be 60% of the maximum load.

In fig. 5, at time T1, the converter begins a soft start operation. The initial switching frequency of the switch is 3.5 times higher than the resonant frequency to ensure that the inrush current flowing into the resonant tank is within reasonable levels. At time T2, sufficient active power is transferred to the secondary side of the converter to cause the output voltage V_outRising slowly from zero. From time T2 to time T3, the voltage controller 7 decreases the switching frequency, which causes the resonant tank to operate with increased gain, which results in the output voltage V_outFurther increasing. From time T1 to time T5, the resonant current i_rFrom a larger initial value at time T1 down to a value at time T5 that meets the load requirements when the soft start is complete. Since the resonance current decreases, at time T3, the resonance current i_{r_avg}The average value of (a) reaches an extremely low level. Since the converter is still operating at a switching frequency 2.2 times higher than the resonant frequency at this time, the converter will lose ZVS operation of the primary switch if the resonant current is further reduced. To prevent loss of ZVS operation, the current control loop increases the reference voltage v_{ref_i}The reference voltage v_{ref_i}And a reference voltage v_{ref_v}Add up as shown in fig. 4. The voltage control loop responds to the increased reference voltage v by reducing the switching frequency at a faster rate_ref. This reduction in switching frequency increases the resonant current. Output voltage V_outSlight changes in slope are also evident. Both the higher resonant current value and the lower switching frequency help maintain ZVS operation. At time T4, the switching frequency is only 1.5 times higher than the resonant frequency, which is safe for ZVS operation regardless of the resonant current i_rWhat is the value of (c). Thus, at time T4, the current controller is disconnected and the reference voltage v_{ref_i}And drops to zero. From time T4 to time T5, the voltage V is output_outSlowly approaching the set point. At time T5, the output voltage V_outIs equal to the reference voltage v_{ref_v}(ii) a Completing the soft start operation; and the converter enters steady state operation.

In fig. 6 with a heavily loaded soft start, the value of the resonant current is higher than the current reference i during the entire soft start_refAnd (4) a threshold value. This guarantees ZVS operation. Therefore, the current control output is zero during heavy load soft start.

It should be understood that the above description is only illustrative of the present invention. Various alternatives and modifications can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications and variances which fall within the scope of the appended claims.