阅读说明：本技术 一种探针台针卡 (Probe card of probe station ) 是由 兰欣 谢国芳 刘祥龙 于 2021-08-11 设计创作，主要内容包括：本发明公开一种探针台针卡,包括：接口模块,用于外接测试附件；控制模块,用于根据接收的测试指令通过控制测试附件中继电器的开闭,以切换测试模式；栅极驱动模块,用于根据测试模式输出栅极测试信号,并通过测试附件将栅极测试信号传输至被测器件；探针组模块,用于连接被测器件的栅极和源极；采样端口模块,用于通过探针组模块与被测器件的连接,采集被测器件的栅极电压、漏源极电压和漏极电流,并通过与外部显示模块的连接传输至外部。在传统的探针卡上增加测试附件插槽,且将探针组设为可更换形式,实现对功率芯片动态性能的测试。(The invention discloses a probe card of a probe station, which comprises: the interface module is used for externally connecting a test accessory; the control module is used for switching the test mode by controlling the on-off of the relay in the test accessory according to the received test instruction; the grid driving module is used for outputting a grid test signal according to the test mode and transmitting the grid test signal to the tested device through the test accessory; the probe group module is used for connecting the grid electrode and the source electrode of the tested device; and the sampling port module is used for collecting the grid voltage, the drain-source voltage and the drain current of the tested device through the connection of the probe group module and the tested device and transmitting the grid voltage, the drain-source voltage and the drain current to the outside through the connection of the external display module. A test accessory slot is added on a traditional probe card, and a probe set is set to be in a replaceable form, so that the dynamic performance of a power chip is tested.)

1. A probe station needle card, comprising:

the interface module is used for externally connecting a test accessory;

the control module is used for switching the test mode by controlling the on-off of the relay in the test accessory according to the received test instruction;

the grid driving module is used for outputting a grid test signal according to the test mode and transmitting the grid test signal to the tested device through the test accessory;

the probe group module is used for connecting the grid electrode and the source electrode of the tested device;

and the sampling port module is used for collecting the grid voltage, the drain-source voltage and the drain current of the tested device through the connection of the probe group module and the tested device and transmitting the grid voltage, the drain-source voltage and the drain current to the outside through the connection of the external display module.

2. The probe card of claim 1, wherein the test mode comprises a double pulse test and a gate charge test.

3. The probe station card of claim 1, wherein the probe set module is detachably connected and an interface connected with the probe station card is unchanged.

4. The probe card of claim 1, wherein in the test mode, the gate driving module controls the gate to be turned on, the output gate test signal is transmitted to the test accessory through the interface module, the test accessory transmits the output gate test signal to the drain of the device under test, the drain of the device under test reaches the source and then is output through the probe set module, and the sampling port module collects the dynamic parameters.

5. A semiconductor device wafer dynamic parameter testing and sorting system is characterized by comprising: the probe station probe card of any one of claims 1-4, a test accessory, and an external display module; the probe station needle card is externally connected with a test accessory through an interface module and is externally connected with an external display module through a sampling port module, the probe station needle card controls the on-off of a relay in the test accessory according to a received test instruction so as to select a test mode, and meanwhile, dynamic parameters of a tested device in the test mode are obtained and transmitted to the external display module for displaying.

6. The semiconductor device wafer dynamic parameter test sorting system of claim 5, wherein the test accessory comprises: the high-voltage direct-current power supply comprises a first relay, a high-voltage direct-current power supply and a busbar capacitor; the first relay is connected with the positive electrode of the high-voltage direct-current power supply, the two ends of the busbar capacitor are connected with the positive electrode and the negative electrode of the high-voltage direct-current power supply, and the high-voltage direct-current power supply is controlled to charge the busbar capacitor or finish charging through the closing and the opening of the first relay.

7. The system as claimed in claim 6, wherein the interface module is connected to the positive electrode and the negative electrode of the high voltage dc power supply through the first reserved jack and the second reserved jack respectively.

8. The semiconductor device wafer dynamic parametric test sorting system of claim 5, wherein the test accessory further comprises: the second relay, the third relay and the load connected with the second relay and the third relay; and the probe card of the probe station controls the opening and closing of a second relay and a third relay in the test accessory according to the received test instruction so as to select the double-pulse test or the grid charge test.

9. The system as claimed in claim 8, wherein the third pre-reserved jack in the interface module is internally connected to the first pre-reserved jack by copper plating, and externally connected to the input terminals of the corresponding loads of the second relay and the third relay.

10. The system as claimed in claim 9, wherein the output terminal of the load is connected to a stage on which the device under test is placed, and the gate test signal is transmitted from the load output terminal to the drain of the device under test.

Technical Field

The invention relates to the technical field of power device packaging test, in particular to a probe station probe card, and particularly relates to a probe station probe card suitable for a semiconductor device wafer dynamic parameter testing and sorting system.

Background

The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.

The traditional power chip test sorting usually adopts the combination of a static test machine and a probe station, the two instruments are relatively independent, and the static parameters of the power chip are mainly tested through the mutual connection and communication of corresponding test lines and jigs.

For the power chip working at higher frequency, the dynamic parameter test has great reference value. However, the dynamic test of the power semiconductor has a specific test method and a specific connection mode, and is not compatible with the static test, and accordingly, a large-power capacitor, a special signal drive, a high-bandwidth signal acquisition system and the like are required, so that the system has a large volume and is expensive. Developing a dynamic test system for designing a power chip requires a probe station manufacturer to be familiar with a corresponding test principle and to perform special design on a probe station and a probe card thereof. In addition, in order to reduce the parasitic parameters of the dynamic test, a large number of test accessories are inevitably required to be arranged on the probe card of the probe station, and the design difficulty is increased to a greater extent.

Disclosure of Invention

In order to solve the above problems, the present invention provides a probe card of a probe station, and particularly a probe card of a probe station suitable for a semiconductor device wafer dynamic parameter testing and sorting system, wherein a test accessory slot is added on a conventional probe card, and a probe set is set in a replaceable form, so as to test the dynamic performance of a power chip.

In order to achieve the purpose, the invention adopts the following technical scheme:

in a first aspect, the present invention provides a probe station needle card, comprising:

the interface module is used for externally connecting a test accessory;

the control module is used for switching the test mode by controlling the on-off of the relay in the test accessory according to the received test instruction;

the grid driving module is used for outputting a grid test signal according to the test mode and transmitting the grid test signal to the tested device through the test accessory;

the probe group module is used for connecting the grid electrode and the source electrode of the tested device;

and the sampling port module is used for collecting the grid voltage, the drain-source voltage and the drain current of the tested device through the connection of the probe group module and the tested device and transmitting the grid voltage, the drain-source voltage and the drain current to the outside through the connection of the external display module.

As an alternative embodiment, the test mode includes a double pulse test and a gate charge test.

In an alternative embodiment, the probe group module is detachably connected, and the interface connected with the probe card of the probe station is unchanged.

As an alternative embodiment, in the test mode, the gate driving module controls the gate to be turned on, the output gate test signal is transmitted to the test accessory through the interface module, transmitted to the drain of the device under test by the test accessory, and output through the probe group module after reaching the source from the drain of the device under test, and then the dynamic parameter is collected by the sampling port module.

In a second aspect, the present invention provides a semiconductor device wafer dynamic parameter testing and sorting system, comprising: the probe station probe card, the test accessory and the external display module of the first aspect; the probe station needle card is externally connected with a test accessory through an interface module and is externally connected with an external display module through a sampling port module, the probe station needle card controls the on-off of a relay in the test accessory according to a received test instruction so as to select a test mode, and meanwhile, dynamic parameters of a tested device in the test mode are obtained and transmitted to the external display module for displaying.

As an alternative embodiment, the test accessory comprises: the high-voltage direct-current power supply comprises a first relay, a high-voltage direct-current power supply and a busbar capacitor; the first relay is connected with the positive electrode of the high-voltage direct-current power supply, the two ends of the busbar capacitor are connected with the positive electrode and the negative electrode of the high-voltage direct-current power supply, and the high-voltage direct-current power supply is controlled to charge the busbar capacitor or finish charging through the closing and the opening of the first relay.

As an alternative embodiment, the interface module is connected with the positive pole and the negative pole of the high-voltage direct-current power supply through a first reserved jack and a second reserved jack respectively.

As an alternative embodiment, the test accessory further comprises: the second relay, the third relay and the load connected with the second relay and the third relay; and the probe card of the probe station controls the opening and closing of a second relay and a third relay in the test accessory according to the received test instruction so as to select the double-pulse test or the grid charge test.

In an alternative embodiment, the third reserved jack in the interface module is internally connected with the first reserved jack in a copper-clad mode and externally connected with the input ends of corresponding loads of the second relay and the third relay.

In an alternative embodiment, the output terminal of the load is connected to a stage, the stage is provided with a device under test, and the gate test signal is transmitted from the load output terminal to the drain of the device under test.

Compared with the prior art, the invention has the beneficial effects that:

the probe card of the probe station is suitable for testing and sorting the dynamic parameters of the wafer of the semiconductor device, a test circuit and a test accessory slot are added on the traditional probe card, and the probe card is suitable for the dynamic test of the semiconductor devices such as SiC MOSFET, IGBT and the like.

The invention provides a probe card of a probe station suitable for testing and sorting dynamic parameters of a semiconductor device wafer, and because a plurality of testing accessories are added on the probe card, the probe group is designed into a replaceable form, and the cost of the probe card is reduced.

Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the invention and not to limit the invention.

Fig. 1 is a three-dimensional schematic view of a probe card of a probe station according to embodiment 1 of the present invention;

fig. 2 is a design diagram of a probe card PCB provided in embodiment 1 of the present invention;

FIG. 3 is a schematic diagram of a test provided in embodiment 1 of the present invention;

fig. 4 shows gate voltage signals in the double pulse test mode according to embodiment 1 of the present invention;

FIG. 5 shows a gate current signal in a gate charge test mode according to embodiment 1 of the present invention;

the probe group module comprises a probe card 1, a probe card 2, a through hole 3, a first reserved jack, a second reserved jack, a third reserved jack, a probe group module 6, a fourth reserved jack, a fifth reserved jack 8, a control module 9, a grid driving module 10, a grid driving module 11, an IO interface 12 and a coaxial shunt.

The specific implementation mode is as follows:

the invention is further described with reference to the following figures and examples.

It is to be understood that the following detailed description is exemplary and is intended to provide further explanation of the invention as claimed. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, and it should be understood that the terms "comprises" and "comprising", and any variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The embodiments and features of the embodiments of the present invention may be combined with each other without conflict.

Example 1

As shown in fig. 1-2, the present embodiment provides a probe card for a probe station, including:

the interface module is used for externally connecting a test accessory;

the control module is used for switching the test mode by controlling the on-off of the relay in the test accessory according to the received test instruction;

the grid driving module is used for outputting a grid test signal according to the test mode and transmitting the grid test signal to the tested device through the test accessory;

the probe group module is used for connecting the grid electrode and the source electrode of the tested device;

and the sampling port module is used for collecting the grid voltage, the drain-source voltage and the drain current of the tested device through the connection of the probe group module and the tested device and transmitting the grid voltage, the drain-source voltage and the drain current to the outside through the connection of the external display module.

In particular, the amount of the solvent to be used,

the probe card of the probe station can be divided into a power end, a sampling end and a control end; the method comprises the following specific steps:

(1) a power end: the test device comprises an interface module and a probe group module, wherein the interface module comprises a plurality of reserved jacks, and test accessories are connected through the reserved jacks;

the test accessory includes: the high-voltage direct-current power supply comprises a bus capacitor, a high-voltage direct-current power supply, a first relay, a second relay, a third relay, load resistors connected with the relays, a load inductor, a diode connected with the load inductor in an anti-parallel mode and the like; as shown in fig. 3;

the first relay is connected with the positive electrode of the high-voltage direct-current power supply, the two ends of the busbar capacitor are connected with the positive electrode and the negative electrode of the high-voltage direct-current power supply, and the high-voltage direct-current power supply is controlled to start charging or finish charging the capacitor through the closing and the opening of the first relay.

Because the high-voltage direct-current power supply, the load inductor and the load resistor are too large in size, the high-voltage direct-current power supply, the load inductor and the load resistor are installed on a probe station rack outside the probe card, meanwhile, in order to facilitate wiring, a relay corresponding to the load resistor and a diode connected with the load inductor in an anti-parallel mode are also arranged on the probe station rack outside the probe card, and the testing accessory is connected to the probe card through a testing line.

In the interface module, a positive electrode and a negative electrode of a high-voltage direct-current power supply are respectively connected through a first reserved jack 3 and a second reserved jack 4;

the third reserved jack 5 is connected with the first reserved jack 3 in a copper laying mode inside the pin clamp, and is connected with the input ends of loads corresponding to the second relay and the third relay outside the pin clamp;

in this embodiment, after receiving the test command, the test mode is switched by the on/off control of the second relay and the third relay.

In this embodiment, the output end of the load is connected with the wafer bearing table, the wafer bearing table is provided with a tested chip, and the test signal flows to the D pole of the tested chip which is in direct contact with the wafer bearing table.

The probe group module 6 is used for connecting a grid electrode and a source electrode of a tested device and leading out SF, SS, G and GL signals, wherein SF represents an S pole current port, and a large number of probes connected in parallel are connected with an S pole in the probe group; the SS corresponds to the S pole voltage sampling port, and the interior of the probe set is connected with the S pole through 1-2 sampling probes; g and GL correspond to grid driving voltage, and the G pole and the S pole are connected with each other through 1-2 probes in the probe set.

Preferably, the probe group module 6 is detachably connected with the probe card of the probe station, and is replaced according to different chip sizes and different chip pad layouts, but the interface connected with the probe card of the probe station is not changed.

In the test, after the grid is controlled to be opened according to the test mode, a test signal is transmitted from the first reserved jack 3 to the load input end through the third reserved jack 5, is transmitted to the wafer bearing table through the load, namely reaches the D pole of the chip, then passes through the chip to reach the S pole of the chip, passes through the probe group, and is output from the SF port.

(2) A sampling end: an external display module such as an oscilloscope is mounted on the outside because of its large size. The sampling port also comprises a plurality of reserved jacks, a voltage sampling signal wire is led out from the wafer bearing platform and is connected to the fourth reserved jack 7, the fifth reserved jack 8 is independently connected with the S pole of the chip through the internal wiring of the pin card, and the drain-source voltage between the fourth reserved jack 7 and the fifth reserved jack 8 is transmitted to the oscilloscope.

In this embodiment, the voltage of the busbar capacitor is connected to the control module 9 through the wiring inside the pin card, and the real-time low-precision sampling monitoring of the busbar voltage is realized by using the a/D sampling.

In this embodiment, the gate signal of the chip under test is routed through the inside of the pincard, the gate driving signal line is connected to the gate driving module 10, and the gate driving module outputs the gate test signal according to the test mode;

in this embodiment, the pincard is further provided with an IO interface 11, and the gate voltage signal is output to the oscilloscope through the IO interface 11.

In this embodiment, the pincard is further provided with a coaxial shunt 12, the coaxial shunt 12 is connected between the second reserved jack DC-and the chip source SF by spreading copper inside the pincard, converts the collected drain current into a voltage signal, and transmits the voltage signal to an oscilloscope.

(3) A control end: the control module 9 and the gate driving module 10 arranged in the pincard have relatively independent functions, the improvement point of the invention is not shown here, and the components can adopt the prior technical scheme, for example, the control module comprises the functions of early warning, AD sampling, communication, power supply and the like, and the details are not repeated herein.

In the embodiment, through holes 2 are arranged at four corners of a body of a needle clamp 1, and the needle clamp is fixed on a probe station rack through the through holes 2 by adopting bolts; the surface of the pin card is provided with a via hole, a bonding pad and the like of a test accessory, and the inside of the pin card is wired or copper-paved according to a schematic diagram shown in fig. 3.

In this embodiment, the system for testing and sorting dynamic parameters of a semiconductor device wafer by using the probe card of the probe station includes: the probe card of the probe station, the test accessory and the external display module; the probe station needle card is externally connected with a test accessory through an interface module and is externally connected with an external display module through a sampling port module, the probe station needle card controls the on-off of a relay in the test accessory according to a received test instruction so as to select a test mode, and meanwhile, dynamic parameters of a tested device in the test mode are obtained and transmitted to the external display module for displaying.

The test process specifically includes two test modes, namely a double pulse test and a gate charge test, and the test principle shown in fig. 3 is as follows: because the instantaneous power of the test time is very high, the direct-current power supply is replaced by the busbar capacitor in the embodiment, and the busbar voltage is provided for the test process after the busbar capacitor is fully charged;

the control module controls the first Relay Relay1 to be switched on and off, so as to control the high-Voltage direct current POWER supply DC _ POWER to start or finish charging the busbar capacitor C1, and monitor the busbar Voltage through the Voltage Sampling points Voltage _ Sampling at the two ends of the busbar capacitor C1.

The control module controls a relay connected with the load in series to realize the switching of the test mode according to the test instruction; when the second Relay Relay 2 is switched off and the third Relay Relay 3 is switched on, the pincard performs inductive double-pulse test, the inductive value of the load inductor is adjustable, the load inductor is connected in series with the device under test after being connected in anti-parallel with a fast recovery diode or a SiC Schottky diode D1, and the Gate drive Gate _ Driver provides a double-pulse Gate voltage signal for the device under test DUT;

when the second Relay Relay 2 is closed and the third Relay Relay 3 is closed, the pincard performs resistive Gate charge test, the resistance value of the load resistor is adjustable and is connected in series with the DUT, the Gate drives the Gate _ Driver to provide a constant Gate current signal for the DUT, and the current value of the Gate current is collected in real time.

In the test process under the two test modes, the gate Voltage of the device under test DUT is collected through the Voltage Probe Voltage _ Probe 1, the drain-source Voltage of the device under test DUT is collected through the Voltage Probe Voltage _ Probe 2, and the drain current is collected through the common-source coaxial shunt interface BNC.

Of course, the dual pulse test and the gate charge test may use platforms with other structures, and are not described herein.

In this embodiment, a Voltage sampling signal line is led out from the position of the wafer bearing table and connected to the fourth reserved jack 7 of the pincard to serve as a positive electrode node of the Voltage probe Voltage _ probe 2, the fifth reserved jack 8 is separately connected with the chip S pole through internal wiring of the pincard to serve as a negative electrode node of the Voltage probe Voltage _ probe 2, and drain-source Voltage of the DUT is collected by an oscilloscope through the fourth reserved jack 7 and the fifth reserved jack 8.

In this embodiment, during the double-pulse test, the test uses the inductor as the load, and the load is connected with the freewheeling diode in anti-parallel to simulate the actual operation condition of the chip, and the flow steps are as follows:

firstly, receiving a test instruction sent by an upper computer, controlling a second Relay Relay 2 to be switched off, closing a third Relay Relay 3, adjusting the resistance value of an adjustable inductor according to test conditions, and switching a dynamic test mode to a double-pulse test;

setting output voltage of a high-power supply, controlling a first Relay Relay1 to be closed, charging a bus capacitor by a high-voltage direct-current power supply, collecting voltages at two ends of the bus capacitor in real time, and controlling the first Relay Relay1 to be disconnected when the voltage is detected to reach a set value;

controlling the gate driving module to send a double-pulse voltage signal to the gate, as shown in fig. 4, the pulse voltage value is the set test gate voltage, the pulse time T1 is determined by the set test current, and T2 is set to be one tenth of T1, and the formula is as follows:

in the drain current increasing process, the device to be tested is started and stopped twice, the grid voltage VGS, the drain-source current ID and the drain-source voltage VDS collected in the first stopping process and the second stopping process are taken as test data, and dynamic parameters related to the starting and stopping processes are extracted from the test data.

In this embodiment, when testing the gate charge, the test uses the resistor as the load, and the process steps are as follows:

firstly, receiving a test instruction sent by an upper computer, controlling a second Relay Relay 2 to be closed, and a third Relay Relay 3 to be opened, adjusting the resistance value of an adjustable inductor according to test conditions, and switching a dynamic test mode to a gate charge test;

setting output voltage of a high-power supply, controlling a first Relay Relay1 to be closed, charging a bus capacitor by a high-voltage direct-current power supply, collecting voltages at two ends of the bus capacitor in real time, and controlling the first Relay Relay1 to be disconnected when the voltage is detected to reach a set value;

controlling a gate driving module to provide constant small current pulses to a gate of a device under test, and when detecting that the gate voltage reaches a set working voltage Vgs (on), keeping the DUT on for a short time and providing a negative gate current with a consistent size until the DUT is completely turned off, wherein a dotted line in FIG. 5 shows the change of the gate voltage Vgs in an ideal test process;

in the test process, the device to be tested is turned on and off once, the grid voltage VGS, the grid current IG, the drain-source current ID and the drain-source voltage VDS in the turn-on process are taken as test data, and grid charging electric charge quantities under different grid voltages are extracted from the test data.

Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.