Dead time determination method of active clamp flyback circuit

文档序号:1849297 发布日期:2021-11-16 浏览:26次 中文

阅读说明:本技术 有源钳位反激电路的死区时间的确定方法 (Dead time determination method of active clamp flyback circuit ) 是由 熊新 东伟 曾祥才 于 2021-10-19 设计创作,主要内容包括:本申请提供了一种有源钳位反激电路的死区时间的确定方法,涉及电子电路技术领域,该方法包括:在第一开关管关断之后,利用采集电路与原边电路感应产生第一电压,检测第一电压的大小,确定第二死区时间;第一电压与第一开关管的源端和漏端之间的电压具有对应关系;在第二开关管关断之后,利用输入电压、输出电压、原边绕组和副边绕组的匝比,以及震荡周期,确定第一死区时间。本申请可以确定出最优的死区时间,实现减小系统损耗的目的。(The application provides a dead time determination method of an active clamping flyback circuit, which relates to the technical field of electronic circuits and comprises the following steps: after the first switching tube is turned off, the acquisition circuit and the primary side circuit are used for inducing to generate a first voltage, the size of the first voltage is detected, and a second dead time is determined; the first voltage and the voltage between the source end and the drain end of the first switch tube have a corresponding relation; and after the second switching tube is turned off, determining a first dead time by using the input voltage, the output voltage, the turn ratio of the primary winding and the secondary winding and the oscillation period. The method and the device can determine the optimal dead time, and achieve the purpose of reducing system loss.)

1. A method for determining dead time of an active clamp flyback circuit is applied to the active clamp flyback circuit, and the active clamp flyback circuit comprises the following steps: the circuit comprises a primary side circuit, a secondary side circuit and an acquisition circuit, wherein the primary side circuit comprises a first switching tube, a second switching tube and a primary side winding, the secondary side circuit comprises a secondary side winding, and the acquisition circuit comprises an acquisition winding; the method comprises the following steps:

after the first switching tube is turned off, inducing the acquisition circuit and the primary side circuit to generate a first voltage, detecting the magnitude of the first voltage, and determining a second dead time; the first voltage and the voltage between the source end and the drain end of the first switch tube have a corresponding relation;

after the second switching tube is turned off, the first dead time is determined by using the input voltage, the output voltage, the turn ratio of the primary winding and the secondary winding and the oscillation period and by using a first formula group.

2. The method for determining according to claim 1, wherein after the first switching tube is turned off, sensing a first voltage generated by the acquisition circuit and the primary side circuit, detecting a magnitude of the first voltage, and determining the second dead time comprises:

determining the moment when the first switching tube is turned off as a first moment;

inducing the acquisition circuit and the primary side circuit to generate a first voltage, detecting the magnitude of the first voltage, and determining the maximum value of the first voltage;

determining the corresponding moment when the first voltage value is the maximum value as a second moment;

and determining the second dead time according to the first time and the second time.

3. The method of claim 2, wherein detecting the magnitude of the first voltage and determining the maximum value of the first voltage comprises:

detecting the magnitude of the first voltage once every preset interval duration;

judging whether the value of the first voltage obtained by the x-th detection is maximum or not, wherein the value of the first voltage determined for subsequent y times is the same as the value of the first voltage obtained by the x-th detection;

if so, the value of the first voltage obtained by the x-th detection is the maximum value of the first voltage;

wherein x is more than or equal to 1, y is more than or equal to 1, and x and y are integers.

4. The determination method according to claim 2 or 3, wherein determining the second dead time from the first time and the second time comprises:

determining the time difference between the first time and the second time as the second dead time; alternatively, the first and second electrodes may be,

determining a time difference between the first time and the second time as a first time difference;

and determining the time difference between the first time difference and a preset sampling delay time as the second dead time.

5. The method of claim 1, wherein determining the first dead time using the input voltage, the output voltage, a turn ratio of the primary winding and the secondary winding, and the period of oscillation after the second switching transistor is turned off using a first set of equations comprises:

after the second switching tube is turned off, acquiring an input voltage Vin, an output voltage Vout, a turn ratio n of a primary winding and a secondary winding, and an oscillation period T;

determining a first dead time td1 using the first set of equations:

6. the method of claim 5, wherein obtaining the oscillation period comprises:

determining whether the active clamp flyback circuit is operating in a discontinuous mode;

if yes, detecting the magnitude of the first voltage;

and determining the interval time between the two first voltage minimum values, and taking the interval time as an oscillation period.

7. A control circuit of an active clamp flyback circuit, comprising: a processor;

the processor executes a computer program stored in a memory to implement the method of determining dead time of an active-clamped flyback circuit as claimed in any of claims 1 to 6.

8. A computer readable storage medium storing a computer program, wherein the computer program when executed by a processor implements the method of determining the dead time of an active clamped flyback circuit as claimed in any one of claims 1 to 6.

Technical Field

The application relates to the technical field of electronic circuits, in particular to a method for determining dead time of an active clamp flyback circuit.

Background

Referring to fig. 1 and 2, in the prior art, an Active Clamp Flyback (ACF) circuit includes a transformer T1 for transferring power from a primary circuit to a load of a secondary circuit. The active clamp flyback circuit further includes: a first switch tube QL controlled to be turned on and off according to the first gate driving signal PMW1, and a second switch tube QH controlled to be turned on and off according to the second gate driving signal PWM 2.

In order to avoid the direct connection between the first switch tube QL and the second switch tube QH, corresponding dead time is preset before the second switch tube QH is turned on after the first switch tube QL is turned off from conduction, and before the first switch tube QL is turned on after the second switch tube QH is turned off from conduction. Although the preset dead time is simple to control, the system is unnecessarily wasted, and the efficiency of the system is reduced.

Therefore, a new method for determining the dead time of the active clamp flyback circuit is needed.

Disclosure of Invention

The embodiment of the application provides a method for determining dead time of an active clamping flyback circuit. The optimal dead time is determined, and the purpose of reducing the system loss is achieved.

In order to achieve the purpose, the technical scheme is as follows:

in a first aspect, a method for determining a dead time of an active clamp flyback circuit is provided, and is applied to the active clamp flyback circuit, where the active clamp flyback circuit includes: the circuit comprises a primary side circuit, a secondary side circuit and an acquisition circuit, wherein the primary side circuit comprises a first switching tube, a second switching tube and a primary side winding, the secondary side circuit comprises a secondary side winding, and the acquisition circuit comprises an acquisition winding; the method comprises the following steps:

after the first switching tube is turned off, inducing the acquisition circuit and the primary side circuit to generate a first voltage, detecting the magnitude of the first voltage, and determining a second dead time; the first voltage and the voltage between the source end and the drain end of the first switch tube have a corresponding relation; after the second switching tube is turned off, the first dead time is determined by using the input voltage, the output voltage, the turn ratio of the primary winding and the secondary winding and the oscillation period and by using a first formula group.

The embodiment of the application provides a method for determining dead time of an active clamping flyback circuit, wherein a first voltage is induced by a collecting winding and a primary winding, so that the optimal second dead time can be determined according to the size of the first voltage which has a corresponding relation with the voltage between a source end and a drain end of a first switch tube. In addition, the optimal first dead time can be calculated by utilizing the first formula group according to the input voltage and the output voltage.

When the load is different, the dead time determined by the determination method provided by the embodiment of the application is changed, so that the loss of the system can be reduced to the minimum extent.

In a possible implementation manner of the first aspect, after the first switching tube is turned off, inducing a first voltage with the primary side circuit by using the acquisition circuit, detecting a magnitude of the first voltage, and determining a second dead time includes: determining the moment when the first switching tube is turned off as a first moment; inducing the acquisition circuit and the primary side circuit to generate a first voltage, detecting the magnitude of the first voltage, and determining the maximum value of the first voltage; determining the corresponding moment when the first voltage value is the maximum value as a second moment; and determining the second dead time according to the first time and the second time.

In a possible implementation manner of the first aspect, detecting a magnitude of the first voltage, and determining a maximum value of the first voltage includes: detecting the magnitude of the first voltage once every preset interval duration; judging whether the value of the first voltage obtained by the x-th detection is maximum or not, wherein the value of the first voltage determined for subsequent y times is the same as the value of the first voltage obtained by the x-th detection; if so, the value of the first voltage obtained by the x-th detection is the maximum value of the first voltage; wherein x is more than or equal to 1, y is more than or equal to 1, and x and y are integers.

In a possible implementation manner of the first aspect, determining the second dead time according to the first time and the second time includes: determining the time difference between the first time and the second time as the second dead time; or, determining a time difference between the first time and the second time as a first time difference; and determining the time difference between the first time difference and a preset delay time as the second dead time.

In one possible implementation manner of the first aspect, after the second switching tube is turned off, determining the first dead time by using the input voltage, the output voltage, the turn ratio of the primary winding and the secondary winding, and the oscillation period by using a first formula set, includes: after the second switching tube is turned off, acquiring an input voltage Vin, an output voltage Vout, a turn ratio n of a primary winding and a secondary winding, and an oscillation period T; determining a first dead time td1 using the first set of equations:

in a possible implementation manner of the first aspect, the obtaining the oscillation period includes: determining whether the active clamp flyback circuit is operating in a discontinuous mode; if yes, detecting the magnitude of the first voltage; and determining the interval time between the two first voltage minimum values, and taking the interval time as an oscillation period.

In a second aspect, an active clamp flyback circuit is provided, comprising: the device comprises a primary side circuit, a secondary side circuit and an acquisition circuit; the primary side circuit comprises a first switching tube, a second switching tube and a primary side winding, the secondary side circuit comprises a secondary side winding, and the acquisition circuit comprises an acquisition winding; the acquisition circuit is used for generating a first voltage by induction with the primary circuit, and the first voltage has a corresponding relation with the voltage between the source end and the drain end of a first switch tube in the primary circuit.

In one possible implementation form of the second aspect, the acquisition circuit is further configured to detect a period of oscillation.

In a third aspect, there is provided a dead time control circuit for an active clamp flyback circuit, including: a processor; the processor executes a computer program stored in a memory to implement the method of determining the dead time of an active-clamped flyback circuit as described in the first aspect and any one of its possible implementations.

In a fourth aspect, there is further provided a computer-readable storage medium storing a computer program which, when executed by a processor, implements the method for determining the dead time of an active clamped flyback circuit as described in the first aspect and any one of its possible implementations.

For the beneficial effects of the second aspect to the fourth aspect, reference may be made to the contents of the first aspect, which are not described herein again.

Drawings

Fig. 1 is a schematic structural diagram of an active clamp flyback circuit provided in the prior art;

fig. 2 is a timing diagram of a portion of the signals of the active clamp flyback circuit shown in fig. 1;

FIG. 3 is a schematic diagram of the optimal length of the second dead time under different loads;

fig. 4 is a schematic structural diagram of an active clamp flyback circuit provided in an embodiment of the present application;

fig. 5 is a schematic flowchart of a second dead time determination method for an active-clamp flyback circuit according to an embodiment of the present application;

FIG. 6 is a schematic diagram of the optimal length of the second dead time under a certain load;

FIG. 7 is a simplified circuit diagram of the primary side circuit shown in FIG. 4;

fig. 8 is a flowchart illustrating a first dead time determination method for an active-clamp flyback circuit according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art. The terms "first," "second," and the like as used in the description and in the claims of the present application do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present application, "a plurality" means two or more unless otherwise specified.

The directional terms "left", "right", "upper" and "lower" are defined with respect to the orientation in which the display assembly is schematically placed in the drawings, and it is to be understood that these directional terms are relative concepts, which are used for descriptive and clarifying purposes, and may be changed accordingly according to the change of the orientation in which the array substrate or the display device is placed.

Fig. 1 is a schematic diagram illustrating a structure of an active clamp flyback circuit provided in the prior art, and fig. 2 is a timing diagram illustrating a part of signals of the active clamp flyback circuit shown in fig. 1.

As shown in fig. 1, the active-clamp flyback circuit 100 includes a transformer T1 for transferring power from the primary circuit to the load of the secondary circuit. An input voltage Vin of the primary side circuit is used for providing an input power supply, the positive pole of the input voltage Vin is coupled to the first end of the primary side winding Lm through an inductor Lk, the second end of the primary side winding Lm is grounded through a first switching tube QL, the two ends of the secondary side winding of the transformer T1 of the secondary side circuit are connected in series with a rectifier switching tube SR/D and an output capacitor Co, and the two ends of the output capacitor Co output voltage to a load.

The primary side circuit further comprises an input capacitor Cr and a second switching tube QH, wherein a first end of the input capacitor Cr is connected to the anode of the input voltage Vin, and a second end of the input capacitor Cr is coupled to a second end of the primary side winding Lm through the second switching tube QH. The first parasitic capacitor Coss1 is a drain-source parasitic capacitance of the first switch tube QL, and the second parasitic capacitor Coss2 is a drain-source parasitic capacitance of the second switch tube QH.

Referring to fig. 2, the first switching tube QL is turned on and off according to the first gate driving signal PMW1, and the second switching tube QH is turned on and off according to the second gate driving signal PWM 2. After the first switch tube QL is turned off, corresponding to td2 time, the current IQ1 on the first switch tube QL charges the first parasitic capacitor Coss1 and discharges the second parasitic capacitor Coss2, so that the voltage Vds _ QL across the first switch tube QL increases and the voltage Vds _ QH across the second switch tube QH decreases. Wherein, the two-terminal voltage refers to the voltage between the source terminal and the drain terminal.

When the voltage Vds _ QH at the two ends of the second switching tube QH is reduced to zero, the second switching tube QH is turned on, so that ZVS (zero voltage switch) of the second switching tube QH is realized, and the switching loss of the second switching tube QH is reduced.

After the second switching tube QH is turned off, the negative exciting current ILm is used to charge the second parasitic capacitor Coss2, the first parasitic capacitor Coss1 is discharged, the voltage Vds _ QH across the second switching tube QH rises, and the voltage Vds _ QL across the first switching tube QL falls. When the voltage Vds _ QL at the two ends of the first switching tube QL is reduced to zero, the first switching tube QL is switched on, the ZVS of the first switching tube QL is realized, and the switching loss of the first switching tube QL is reduced.

In order to avoid the direct connection between the first switching tube QL and the second switching tube QH after the first switching tube QL is switched from on to off and before the second switching tube QH is switched on as shown in fig. 1 and 2, the prior art adds a second dead time, namely td2 shown in fig. 2.

Similarly, in order to avoid the second switching tube QH and the first switching tube QL from being connected directly after the second switching tube QH is switched from being turned on to being turned off and before the first switching tube QL is turned on, the prior art adds a first dead time, namely td1 shown in fig. 2.

However, the second dead time td2 and the first dead time td1 are generally fixed values set manually, and although they are simple to control, they cause unnecessary loss to the system and reduce the system efficiency.

In view of this, the present application provides a dead time determination method for an active-clamp flyback circuit, in which a collecting winding is arranged to collect a time corresponding to a time when a voltage across a first switching tube rises to a maximum value, where the time is a time when a voltage across a second switching tube falls to zero, so that an optimal second dead time can be determined. In addition, according to the input voltage and the output voltage, the corresponding time when the negative excitation current oscillates to zero can be calculated by using the first formula group, and the time is the optimal first dead time.

First, the second dead time td2 is improved.

It should be understood that if the second dead time td2 is set for too long, the longer the body diode conduction time of the second switching tube QH, the greater the system loss; if the time set by the second dead time td2 is too short, the second switching tube QH cannot achieve zero-voltage turn-on, which also increases system loss. Thus, in order to reduce the loss of the system, the second dead time td2 needs to be adaptively transformed instead of being fixed.

As can be seen from fig. 1, in the active-clamp flyback circuit, the peak values of the excitation inductance and the leakage inductance current increase as the load increases. The peak values of the excitation inductance and the leakage inductance current directly affect the falling time of the source-drain voltage Vds _ QH corresponding to the second switch tube QH to zero, that is, the length of the second dead time td 2.

It should be understood that, in the case of heavy load, the larger the current peak value is, the shorter the time taken for the second switch tube QH to drop to zero corresponding to the source-drain voltage Vds _ QH, and at this time, the shorter the second dead time td2 can be accordingly. In the case of light load, the smaller the peak current value, the longer the time taken for the source-drain voltage Vds _ QH of the second switch tube QH to drop to zero, and at this time, the longer the second dead time td2 should be.

Fig. 3 shows an optimal length diagram of the second dead time td2 under different loads.

As shown in fig. 3, under heavy load, the time taken for the second switch tube QH to fall to zero corresponding to the source-drain voltage Vds _ QH is short, as shown by ta in fig. 3. At this time, the duration denoted by ta may be the optimal second dead time td2 of the active-clamp flyback circuit under a heavy load. Under light load, the time taken for the second switching tube QH to fall to zero corresponding to the source-drain voltage Vds _ QH is longer, as indicated by tb in fig. 3. At this time, the duration denoted by tb may be the optimal second dead time td2 of the active-clamp flyback circuit under light load. It can be seen that the optimal duration of the second dead time td2 varies with the load, and is not a fixed value, as the time taken for the source-drain voltage Vds _ QH corresponding to the second switch tube QH to drop to zero.

Therefore, the embodiment of the application provides a method for determining the second dead time td2 of the active clamp flyback circuit, and is applied to the active clamp flyback circuit provided by the application. According to the method for determining the second dead time td2, the optimal second dead time td2 can be determined by determining the time for the source-drain voltage Vds _ QH corresponding to the second switching tube QH to drop to zero.

First, the active clamp flyback circuit provided in the present application will be described with reference to fig. 4. Fig. 4 shows an active clamp flyback circuit provided in an embodiment of the present application. As shown in fig. 4, the active clamp flyback circuit provided in the embodiment of the present application further includes, on the basis of the active clamp flyback circuit 100 shown in fig. 1: an acquisition circuit 110. For other structures, reference may be made to the above detailed description of the active-clamp flyback circuit 100 shown in fig. 1, and further description is omitted here.

As shown in fig. 4, the acquisition circuit 110 connects one end of the acquisition winding to ground, and connects two divider resistors in series to ground at the other end. The collecting winding is coupled to the primary winding, and a voltage terminal FB is further connected between two voltage dividing resistors in the collecting circuit 110 and is used for detecting the first voltage VFB.

Referring to fig. 4, the first switching tube QL is controlled to be turned on and off according to the first gate driving signal PWM1, and the second switching tube QH is controlled to be turned on and off according to the second gate driving signal PWM 2. The first voltage VFB changes with the state of the first switching tube QL, and the state of the second switching tube QH is opposite to the state of the first switching tube QL. Alternatively, the magnitude of the first voltage VFB is changed following the state of the second switching tube QH.

Specifically, after the first switching tube QL is turned off, the current IQ1 on the first switching tube QL charges the first parasitic capacitor Coss1 and discharges the second parasitic capacitor Coss2, so that the voltage Vds _ QL across the first switching tube QL increases and the voltage Vds _ QH across the second switching tube QH decreases. And the first voltage VFB in the acquisition circuit 110 will follow the rise of the first switch tube QL at this time. In other words, the first voltage VFB will increase with the decrease of the voltage Vds _ QH across the second switching tube QH.

When the voltage Vds _ QH across the second switching tube QH is reduced to zero, the voltage Vds _ QL across the first switching tube QL will be increased to the maximum value, and meanwhile, the first voltage VFB in the acquisition circuit 110 will be correspondingly increased to the maximum value. Thus, the time interval between when the first voltage VFB starts to rise and rises to the maximum value may be determined, i.e., may be the corresponding second dead time td 2.

On this basis, when the loads in the secondary side circuits are different, the time for the voltage Vds _ QH across the second switching tube QH to decrease to zero is different, the time for the voltage Vds _ QL across the first switching tube QL to increase to the maximum value is different, and correspondingly, the time for the first voltage VFB in the acquisition circuit 110 to increase to the maximum value is also different. Therefore, the determined time period for the first voltage VFB to rise to the maximum value after the first switching tube QL is turned off is also different. The different time duration can be used as the optimal second dead time td2 of the active-clamp flyback circuit under the corresponding load.

It should be noted that if the chip including the active clamp flyback circuit has no clamp voltage, the first voltage VFB generated in the acquisition circuit 110 will be a very large negative voltage. For this purpose, the chip can be clamped to a small fixed negative voltage by a clamping diode (i.e., the second switch QH), so that the first voltage VFB will start to rise from the small negative voltage after the first switch QL is turned off. The small negative pressure is, for example, -0.7V.

In conjunction with the above description, fig. 5 shows a flowchart of a method for determining the second dead time td2 of the active-clamp flyback circuit provided in the present application.

As shown in fig. 5, the method includes S101 to S104.

S101, determining that the turn-off time of the first switching tube QL is a first time.

It should be understood that whether the first switching tube QL is turned off may be determined by determining whether the first gate driving signal PMW1 is at a low level.

S102, inducing the acquisition circuit 110 and the primary side circuit to generate a first voltage VFB, detecting the size of the first voltage VFB, and determining the maximum value of the first voltage VFB. For example, the maximum value of the first voltage VFB at the voltage terminal FB may be acquired by a differential circuit or the like inside the chip.

And S103, determining the corresponding time when the first voltage VFB is the maximum value as a second time.

Specifically, S102 and S103 may include:

the first voltage VFB is detected once every certain time interval, whether the value of the first voltage VFB obtained by the x-th detection is maximum or not is judged, the value of the first voltage VFB determined for subsequent y times is identical to the value of the first voltage obtained by the x-th detection, the value of the first voltage VFB obtained by the x-th detection is the maximum value of the first voltage VFB, and the moment when the maximum value of the first voltage is obtained by the x-th detection is the second moment.

Wherein x is more than or equal to 1, y is more than or equal to 1, and x and y are integers. The duration of the detection interval and the size of y can be set as required, and this is not limited in this embodiment of the present application.

It will be appreciated that the time to detect the first voltage once is typically short, only a few nanoseconds.

And S104, determining a second dead time td2 according to the first time and the second time.

It should be understood that the difference between the first time and the second time is a corresponding second dead time td2 after the first switch QL is turned off and before the second switch QH is turned on under the corresponding load.

For example, fig. 6 is a schematic diagram of the optimal length of the second dead time td2 under a certain load.

As shown in fig. 6, first, it is determined that the first switching tube QL is turned off. After the first switching tube QL is turned off, the magnitude of the first voltage VFB corresponding to the voltage terminal FB in the acquisition circuit 110 is detected every 10 ns.

If the first switching tube QL is turned off at time T1 during the test, the first voltage VFB starts to rise, i.e. the value of the first voltage VFB starts to increase from-0.7V and reaches the maximum value at time 6, and during the test from time 6 to time 9, i.e. from time 60ns to time 90ns, it is determined that the first voltage VFB rises and remains unchanged. Therefore, the first voltage VFB corresponding to the 60ns can be determined to be the maximum value of the first voltage VFB, the 60ns is determined to be the second time T2, and at this time, the optimal second dead time can be determined to be the time difference between the first time T1 and the second time T2 according to the first time T1 and the second time T2.

However, in the actual detection process, there may be a problem of time delay and the like when determining the maximum value of the first voltage VFB, so that the second time corresponding to the determined maximum value of the first voltage VFB is not the time when the actual first voltage VFB reaches the maximum value. Thus, the preset sampling delay time may be subtracted based on the determination of the time difference between the first time T1 and the second time T2. For example, the sample delay time is subtracted.

For example, as shown in FIG. 6, the time difference between the first time T1 and the second time T2 is a first time difference T2-T1; the preset delay time is T2-T2', and thus, the time difference T2' -T1, i.e., T1 to T2', between the first time difference and the preset delay time is a second dead time td2' closer to the real time. Thus, the accuracy of the determined second dead time can be improved by removing the delay time.

The preset delay time may be obtained by inference according to historical data, or determined by several experiments, or may be determined by other methods, which is not limited in this embodiment of the present application.

Here, it should be noted that, since the sampling delay time is usually not well determined, the above method for determining the optimal second dead time is also not well controlled. For this reason, when determining the optimal second dead time, the above S103 may be simplified as: and determining the corresponding moment when the first voltage VFB passes through the zero voltage as a second moment. Then, the corresponding second dead time td2 can be determined simply and quickly according to the first time and the second time.

The modified second dead time td2 is described in detail above, and the determination of the first dead time td1 is described in detail below.

Referring to fig. 1, after the second switching tube QH is turned off, a negative excitation current i is usedLmThe second parasitic capacitor Coss2 is charged and discharged to the first parasitic capacitor Coss1, the voltage Vds _ QH across the second switching tube QH rises, and the voltage Vds _ QL across the first switching tube QL falls. It can be seen that, in order to minimize the system loss, the ZVS of the first switching tube QL needs to be realized with the minimum negative current.

Based on this, the present application utilizes the circuit shown in fig. 7 to find the minimum negative current. The circuit shown in fig. 7 is a simplified circuit diagram of the primary side circuit shown in fig. 4.

As shown in fig. 7, the capacitance of the switch SW to ground is equivalent to an equivalent capacitance Ceq. The equivalent capacitor Ceq includes an output capacitor of the power tube and a parasitic capacitor of the transformer.

It should be noted that, since the magnetizing inductance Lm is much larger than the leakage inductance Lk, the leakage inductance Lk can be ignored in the subsequent analysis.

Referring to fig. 7, n is the turn ratio of the primary winding and the secondary winding of the transformer, Vin is the input voltage, Vout is the output voltage, the initial current of the exciting inductor is negative (from bottom to top), and I is the magnitudeneg

Thus, before the first switching tube QL is turned on, the following equation holds:

therefore, the expression of the voltage Vds _ QL across the first switching tube QL is obtained as follows:

according to the formula, if the first switching tube QL needs to realize ZVS, the voltage across the first switching tube QL must drop to zero, so the current Ineg must satisfy the following condition:

then, the minimum value satisfying the condition is the minimum negative current Ineg_min

According to the above formula, when Vin is less than or equal to nVout, no negative current is needed, and the voltage Vds _ QL across the first switching tube QL naturally drops to zero, i.e. normal low voltage (QR) control.

When Vin is greater than nVout, if we want to realize ZVS of the first switch tube QL, a negative current is needed, and the voltage Vds _ QL across the first switch tube QL will drop to zero.

Since Ceq and Lm are fixed values, the minimum required negative current Ineg_minCorresponding to the input voltage Vin. In particular, the minimum required negative current I is higher when the input voltage Vin is higherneg_minThe larger the value of (c). The minimum required negative current I is the lower the input voltage Vinneg_minThe smaller the value of (c).

For example, when the input voltage Vin is 90V, the smaller the value of the minimum negative current required to realize ZVS of the first switching tube QL is, and when the input voltage Vin is 265V, the larger the value of the minimum negative current required to realize ZVS of the first switching tube QL is.

Based on the above, referring to fig. 7, if the energy is enough to realize ZVS of the first switching tube QL, the exciting inductor current iLmWhen the oscillation reaches zero for the first time, the voltage Vds _ QL at two ends of the first switching tube QL is zero, and at the moment, the first switching tube QL is switched on to realize ZVS. Then exciting inductor current iLmThe time from the first oscillation of the minimum negative current Ineg _ min to zero is the optimum dead time td 1.

Therefore, the temperature of the molten steel is controlled,

thus, the method can obtain the product,

when exciting the inductive current iLmWhen the first oscillation reaches zero, the time is the optimal first dead time td1, that is:

wherein T is the oscillation period.

In conjunction with the above description, the lower the input voltage Vin, the minimum negative current Ineg_minThe smaller the corresponding value, the larger the optimal first dead time td 1. The higher the input voltage Vin, the minimum negative current Ineg_minThe larger the corresponding value, the smaller the optimal first dead time td 1. In other words, the larger the input voltage Vout, the larger the optimal first dead time td 1. The smaller the input voltage Vout, the smaller the optimal first dead time td 1.

Based on the conclusion obtained by the above analysis, the embodiment of the present application provides a method for determining the first dead time td1 of the active-clamp flyback circuit, and fig. 8 shows a schematic flow chart of the method for determining the first dead time td1 of the active-clamp flyback circuit provided by the embodiment of the present application. As shown in fig. 8, the method includes S201 to S202.

S201, after the second switching tube QH is turned off, obtaining an input voltage Vin, an output voltage Vout, a turn ratio n of a primary winding and a secondary winding, and an oscillation period T.

S202, a first dead time td1 is determined according to the following first formula group.

The first formula set is:

the method for acquiring the oscillation period may include: it is determined whether the active clamp flyback circuit is operating in Discontinuous (DCM) mode. If not, the oscillation period cannot be obtained. If yes, acquiring the oscillation period.

Specifically, the acquisition circuit 110 may be utilized to generate the first voltage VFB by induction, and then obtain the first voltage VFB at the voltage terminal FB. Then, the minimum value (i.e. the trough) of the first voltage VFB is determined, and thereby, the time difference between two times of the first voltage minimum value VFB is determined, and the oscillation period T can be obtained.

The embodiment of the application provides a method for determining dead time of an active clamping flyback circuit, and the method comprises the steps of collecting time corresponding to the time when the voltage at two ends of a first switching tube rises to the maximum value by setting a collecting winding, namely the time when the voltage at two ends of a second switching tube falls to zero, and therefore the optimal second dead time can be determined. In addition, according to the input voltage and the output voltage, the corresponding time when the excitation negative current oscillates to zero can be calculated by using the first formula group, and the time is the optimal first dead time.

When the load is different, the dead time determined by the determination method provided by the embodiment of the application is changed, so that the loss of the system can be reduced to the minimum extent.

The embodiment of the present application further provides an active clamp flyback circuit, including primary circuit and secondary circuit, this primary circuit includes: the primary winding comprises a first switching tube QL, a second switching tube QH and a primary winding; the secondary circuit includes a secondary winding.

The active clamp flyback circuit is used for determining the optimal first dead time and the optimal second dead time by using the active clamp flyback circuit determination method, and controlling the conduction and the disconnection of the first switching tube QL and the second switching tube QH according to the determined first dead time and the determined second dead time.

The embodiment of the present application further provides a dead time control circuit of an active clamp flyback circuit, including: a processor; the processor executes a computer program stored in a memory to implement the method of determining dead time of an active-clamped flyback circuit as described above.

The beneficial effects of the dead time control circuit of the active clamp flyback circuit provided by the embodiment of the application are the same as the beneficial effects of the dead time determination method of the active clamp flyback circuit, and are not repeated here.

An embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored, and when the computer program is executed by a processor, the method for determining the dead time of the active-clamp flyback circuit is implemented as described above.

The beneficial effects of the computer-readable storage medium provided by the embodiment of the application are the same as those of the method for determining the dead time of the active clamp flyback circuit, and are not repeated here.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

16页详细技术资料下载
上一篇:一种医用注射器针头装配设备
下一篇:一种三端口能量传输电路的控制方法及能量传输设备

网友询问留言

已有0条留言

还没有人留言评论。精彩留言会获得点赞!

精彩留言,会给你点赞!