阅读说明：本技术 一种用于开关稳压器可调精度锁频环数字控制方法 (Digital control method for adjustable-precision frequency locking ring of switching regulator ) 是由 廖新志 于 2021-08-24 设计创作，主要内容包括：本发明公开了一种用于开关稳压器可调精度锁频环数字控制方法,涉及开关稳压器控制方法技术领域,该用于开关稳压器可调精度锁频环数字控制方法,包括以下步骤：步骤一：当系统计数使能后,首先进行信号的同步处理：将系统计数使能同步到参考时钟域,得到参考时钟域的计数使能；步骤二：将参考时钟域的计数使能同步到开关时钟域,得到开关时钟域的计数使能。通过数字控制模块控制锁频率环,将可变频率开关稳压器的开关频率在稳态进行调制,使其工作在固定频率下,既保留了可变频率稳压器的良好负载性能,又简化了可变频率开关稳压器中谐波滤波器设计,能够防止开关时钟频率不能跟随参考频率而导致开关频率不稳定的问题。(The invention discloses a digital control method for an adjustable precision frequency locking ring of a switching regulator, which relates to the technical field of control methods of switching regulators, and comprises the following steps: the method comprises the following steps: when the system count is enabled, firstly, the synchronization processing of the signals is carried out: synchronizing the system counting enable to a reference clock domain to obtain the counting enable of the reference clock domain; step two: and synchronizing the counting enable of the reference clock domain to the switch clock domain to obtain the counting enable of the switch clock domain. The frequency locking ring is controlled by the digital control module, the switching frequency of the variable frequency switching regulator is modulated in a stable state, and the variable frequency switching regulator works under a fixed frequency, so that the good load performance of the variable frequency switching regulator is kept, the design of a harmonic filter in the variable frequency switching regulator is simplified, and the problem that the switching frequency is unstable due to the fact that the switching clock frequency cannot follow the reference frequency can be solved.)

1. The digital control method for the adjustable precision frequency locking ring of the switching regulator comprises a switching frequency control ring system and is characterized in that the switching frequency control ring system comprises a digital control module with a reference clock domain and a switching clock domain, a switch conduction module with a Ton instruction, a voltage reduction type conversion circuit control ring module and a switching grid electrode driving control module, wherein the voltage reduction type conversion circuit control ring and the control module are connected with the switching grid electrode driving control module through the switch conduction module.

2. The adjustable-precision frequency-locked loop digital control method for the switching regulator according to claim 1, wherein the switching gate driving control module is connected with a master switch and a slave switch respectively, a positive terminal of the master switch is connected with an input power supply terminal, a negative terminal of the slave switch is connected with a ground terminal, a negative terminal of the master switch is connected with a positive terminal of the slave switch, the negative terminal of the master switch and the positive terminal of the slave switch are both connected with one end of an inductor and a switching clock port of the digital control module, the other end of the inductor is connected with the ground terminal, one end of an output power supply terminal is connected with the ground terminal through a capacitor, and the other end of the output power supply terminal is connected with the buck conversion circuit control loop module.

3. The adjustable-precision frequency-locked loop digital control method for the switching regulator according to claim 1, wherein the digital control module further comprises a reference clock counter, a switching clock counter, a counting result comparator with a configurable error tolerance value, and a control code output control module, wherein the reference clock counter and the switching clock counter are both connected with the control code output control module through the counting result comparator.

4. The adjustable precision frequency locking loop digital control method for the switching regulator according to claim 1, characterized by further comprising the following steps:

the method comprises the following steps: when the system count is enabled, firstly, the synchronization processing of the signals is carried out: synchronizing the system counting enable to a reference clock domain to obtain the counting enable of the reference clock domain;

step two: synchronizing the counting enable of the reference clock domain to the switch clock domain to obtain the counting enable of the switch clock domain;

step three: after receiving the enabling signal, starting to count, and starting to count by the reference clock and the switch clock;

step four: when the reference clock count value reaches a system count value (100 reference clock cycles), the reference clock count is cleared and enabled, and the reference clock count value is cleared to start the next reference clock count;

step five: synchronizing the reference clock counting clearance to a switch clock domain, after the synchronization is successful, enabling a switch clock counting clearance signal to be effective, clearing a switch clock counting value, starting the next switch clock counting, and clearing the reference clock counting clearance synchronization signal;

step six: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective;

step seven: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective, and adjusting the control code according to the comparison result;

step eight: since the count value of the switching clock is lower than the reference clock count value, the control code is increased, and the control code adjustment step is 1, the control code is adjusted to 1.

5. The adjustable-precision frequency-locked loop digital control method for the switching regulator according to claim 4, wherein for the third step, the counting of the reference clock domain is started after the counting of the reference clock domain is enabled, the count value of the reference clock on the rising edge of each reference clock is increased by 1, the counting of the switching clock domain is started after the counting of the switching clock domain is enabled, and the count value of the switching clock on the rising edge of each switching clock is increased by 1.

6. The adjustable-precision frequency-locked loop digital control method for the switching regulator according to claim 4, wherein for the adjustment in step seven, the count value of the switching clock in this design example is the switching clock count 93 of the "switching clock count clear enable" signal valid yes, the system count value is 100, the system configurable error allowance value is 5, and since 100+5 equals 105 and 100-5 equals 95, the switching clock count 93 is not within the error allowance range, the control code needs to be adjusted.

7. The adjustable-precision frequency-locked loop digital control method for the switching regulator according to claim 4, wherein in step eight, the timing control for keeping the control code unchanged and decreasing the control code is the same as that for increasing the control code in this step.

Technical Field

The invention belongs to the technical field of voltage regulators, and particularly relates to an adjustable precision frequency locking ring digital control method for a switching voltage regulator.

Background

Switching regulators may be classified into fixed frequency switching regulators and variable frequency switching regulators, and a variable frequency switching regulator has good load transient performance, but a change in switching frequency causes a change in an input power supply terminal of the regulator, an output power supply terminal of the regulator, a load current of the regulator, and the like. Since the harmonic spectrum of the variable frequency switching regulator also varies with the switching frequency, it is necessary to design a complex higher-order harmonic filter to process the harmonic in the variable frequency switching regulator. The switching frequency of the fixed frequency switching regulator is fixed, the harmonic wave spectrum is also fixed, thus simplifying the design of the harmonic wave filter of the fixed frequency switching regulator, which is also the main reason that the fixed frequency switching regulator becomes the mainstream switching regulator at present, and the premise that the stability of the switching frequency is ensured to ensure the good working performance of the fixed frequency switching regulator is provided.

Disclosure of Invention

The invention aims to solve the existing problems and provides an adjustable precision frequency locking ring digital control method for a switching regulator.

The digital control method for the adjustable precision frequency locking ring of the switching regulator comprises a switching frequency control ring system and is characterized in that the switching frequency control ring system comprises a digital control module with a reference clock domain and a switching clock domain, a switch conduction module with a Ton instruction, a voltage reduction type conversion circuit control ring module and a switching grid electrode driving control module, wherein the voltage reduction type conversion circuit control ring and the control module are connected with the switching grid electrode driving control module through the switch conduction module.

The switch grid driving control module is connected with a master switch and a slave switch respectively, the positive terminal of the master switch is connected with an input power supply end, the negative terminal of the slave switch is connected with a grounding end, the negative terminal of the master switch is connected with the positive terminal of the slave switch, the negative terminal of the master switch and the positive terminal of the slave switch are both connected with one end of an inductor and a switch clock port of the digital control module, the other end of the inductor is connected with the positive terminal of an output power supply end, one end of the output power supply end is connected with the grounding end through a capacitor, and the other end of the output power supply end is connected with the buck conversion circuit control loop module.

The digital control module further comprises a reference clock counter, a switch clock counter, a counting result comparator capable of configuring an error allowable value and a control code output control module, wherein the reference clock counter and the switch clock counter are connected with the control code output control module through the counting result comparator.

The adjustable precision frequency locking ring digital control method for the switching regulator further comprises the following steps:

the method comprises the following steps: when the system count is enabled, firstly, the synchronization processing of the signals is carried out: synchronizing the system counting enable to a reference clock domain to obtain the counting enable of the reference clock domain;

step two: synchronizing the counting enable of the reference clock domain to the switch clock domain to obtain the counting enable of the switch clock domain;

step three: after receiving the enabling signal, starting to count, and starting to count by the reference clock and the switch clock;

step four: when the reference clock count value reaches a system count value (100 reference clock cycles), the reference clock count is cleared and enabled, and the reference clock count value is cleared to start the next reference clock count;

step five: synchronizing the reference clock counting clearance to a switch clock domain, after the synchronization is successful, enabling a switch clock counting clearance signal to be effective, clearing a switch clock counting value, starting the next switch clock counting, and clearing the reference clock counting clearance synchronization signal;

step six: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective;

step seven: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective, and adjusting the control code according to the comparison result;

step eight: since the count value of the switching clock is lower than the reference clock count value, the control code is increased, and the control code adjustment step is 1, the control code is adjusted to 1.

Preferably, for the third step, the counting of the reference clock domain is enabled and then started, the counting value of the reference clock on the rising edge of each reference clock is increased by 1, the counting of the switch clock domain is enabled and then started, and the counting value of the switch clock on the rising edge of each switch clock is increased by 1.

Preferably, for the adjustment in step seven, in this design example, the count value of the switch clock is the switch clock count 93 when the "switch clock count clear enable" signal is valid, the system count value is 100, the error allowance value configurable by the system is 5, and since 100+5 equals 105 and 100-5 equals 95, the switch clock count 93 is not within the error allowance range, the control code needs to be adjusted.

Preferably, the timing control for the control code to be kept unchanged and the control code to be decreased in step eight is the same as the control code to be increased in this step.

Compared with the prior art, the invention has the following advantages: the frequency locking ring is controlled by the digital control module, the switching frequency of the variable frequency switching regulator is modulated in a stable state, and the variable frequency switching regulator works under a fixed frequency, so that the good load performance of the variable frequency switching regulator is kept, the design of a harmonic filter in the variable frequency switching regulator is simplified, the aim of stabilizing a switching clock at a standard reference clock input by a system is finally fulfilled, the switching frequency of the variable frequency switching regulator is modulated in the stable state, and the problem that the switching frequency is unstable due to the fact that the switching clock frequency cannot follow the reference frequency can be solved.

Drawings

FIG. 1 is a flow chart of the steps of a switching frequency control loop system for an adjustable precision frequency locked loop digital control method of a switching regulator;

FIG. 2 is a flow diagram of a switching frequency control loop system for an adjustable precision frequency locked loop digital control method of a switching regulator;

FIG. 3 is a flow diagram of a digital module for an adjustable precision frequency-locked loop digital control method of a switching regulator;

fig. 4 is a control flow chart of an adjustable precision frequency locking loop digital control method for a switching regulator.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

As shown in fig. 2 and 4, according to an embodiment of the present invention, there is provided an adjustable-precision frequency locking loop digital control method for a switching regulator, including a switching frequency control loop system, where the switching frequency control loop system includes a digital control module having a reference clock domain and a switching clock domain, a switch conducting module having a Ton command, a buck conversion circuit control loop module, and a switching gate driving control module, and both the buck conversion circuit control loop and the control module are connected to the switching gate driving control module through the switch conducting module.

The switch grid driving control module is connected with a master switch and a slave switch respectively, the positive terminal of the master switch is connected with an input power supply end, the negative terminal of the slave switch is connected with a grounding end, the negative terminal of the master switch is connected with the positive terminal of the slave switch, the negative terminal of the master switch and the positive terminal of the slave switch are both connected with one end of an inductor and a switch clock port of the digital control module, the other end of the inductor is connected with the positive terminal of an output power supply end, one end of the output power supply end is connected with the grounding end through a capacitor, and the other end of the output power supply end is connected with the buck conversion circuit control loop module.

The digital control module further comprises a reference clock counter, a switch clock counter, a counting result comparator capable of configuring an error allowable value and a control code output control module, wherein the reference clock counter and the switch clock counter are connected with the control code output control module through the counting result comparator.

As shown in fig. 1 and 3, according to an embodiment of the present invention, an adjustable precision frequency-locked loop digital control method for a switching regulator further includes the following steps:

step S101: when the system count is enabled, firstly, the synchronization processing of the signals is carried out: synchronizing the system counting enable to a reference clock domain to obtain the counting enable of the reference clock domain;

step S103: synchronizing the counting enable of the reference clock domain to the switch clock domain to obtain the counting enable of the switch clock domain;

step S105: after receiving the enabling signal, starting to count, and starting to count by the reference clock and the switch clock;

step S107: when the reference clock count value reaches a system count value (100 reference clock cycles), the reference clock count is cleared and enabled, and the reference clock count value is cleared to start the next reference clock count;

step S109: synchronizing the reference clock counting clearance to a switch clock domain, after the synchronization is successful, enabling a switch clock counting clearance signal to be effective, clearing a switch clock counting value, starting the next switch clock counting, and clearing the reference clock counting clearance synchronization signal;

step S111: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective;

step S113: comparing the reference clock count value with the switch clock count value at the moment when the switch clock count clear enable signal is effective, and adjusting the control code according to the comparison result;

step S115: since the count value of the switching clock is lower than the reference clock count value, the control code is increased, and the control code adjustment step is 1, the control code is adjusted to 1.

In step S105, the counting is started after the counting of the reference clock domain is enabled, the count value of the reference clock at the rising edge of each reference clock is increased by 1, the counting is started after the counting of the switching clock domain is enabled, and the count value of the switching clock at the rising edge of each switching clock is increased by 1.

In the adjustment in step S111, in this design example, the count value of the switch clock is the switch clock count 93 when the "switch clock count clear enable" signal is valid, the system count value is 100, the error tolerance configurable by the system is 5, and since 100+5 is 105 and 100-5 is 95, the switch clock count 93 is not within the error tolerance range, the control code needs to be adjusted.

Here, the timing control for the control code to be kept unchanged and the control code to be decreased in step S113 is the same as the control code to be increased in this step.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation. The use of the phrase "comprising one of the elements does not exclude the presence of other like elements in the process, method, article, or apparatus that comprises the element.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.