阅读说明：本技术 一种超声波激励电路 (Ultrasonic excitation circuit ) 是由 宋雨 高强 李栋 高云飞 刘俊杰 张昊博 张子轩 于 2021-09-14 设计创作，主要内容包括：本发明涉及一种超声波激励电路,包括：脉冲调制电路、信号放大电路和触发电路；其中,脉冲调制电路用于生成原始触发信号,并对原始出发信号进行调制得到第一脉冲波信号；信号放大电路用于对第一脉冲波信号进行放大处理得到第二脉冲波信号；触发电路用于根据第二脉冲波信号生成脉冲激励信号,并基于脉冲激励信号驱动超声波探头。本发明采用低频触发信号,占用资源低,且能迅速准确驱动超声波换能器发射出具有足够能量的超声波。(The invention relates to an ultrasonic excitation circuit, comprising: the device comprises a pulse modulation circuit, a signal amplification circuit and a trigger circuit; the pulse modulation circuit is used for generating an original trigger signal and modulating an original starting signal to obtain a first pulse wave signal; the signal amplification circuit is used for amplifying the first pulse wave signal to obtain a second pulse wave signal; the trigger circuit is used for generating a pulse excitation signal according to the second pulse wave signal and driving the ultrasonic probe based on the pulse excitation signal. The invention adopts the low-frequency trigger signal, occupies low resources, and can quickly and accurately drive the ultrasonic transducer to emit the ultrasonic wave with enough energy.)

1. An ultrasonic excitation circuit, comprising:

the pulse modulation circuit is used for generating an original trigger signal and modulating the original starting signal to obtain a first pulse wave signal;

the signal amplification circuit is used for amplifying the first pulse wave signal to obtain a second pulse wave signal;

and the trigger circuit is used for generating a pulse excitation signal according to the second pulse wave signal and driving the ultrasonic probe based on the pulse excitation signal.

2. The ultrasonic excitation circuit of claim 1, wherein the pulse modulation circuit comprises: the circuit comprises a first chip, a second chip, an adjustable resistor and a third capacitor;

the second chip is respectively connected with the first chip, the first end of the adjustable resistor, the second end of the adjustable resistor, the first end of the third capacitor and the second end of the third capacitor;

the first chip is used for generating the original trigger signal and sending the original trigger signal to the second chip;

the adjustable resistor and the third capacitor act together to modulate the original trigger signal to obtain the first pulse wave signal, and the second chip sends the first pulse wave signal to the signal amplification circuit.

3. The ultrasonic excitation circuit according to claim 2, wherein the original trigger signal has a pulse width of 20us, an amplitude of 3.3v, and an interval of 5 ms;

the width of the first pulse wave signal is 200 ns.

4. The ultrasonic excitation circuit of claim 2, wherein the pulse modulation circuit further comprises: the power supply, the second electrolytic capacitor, the second capacitor and the first voltage stabilizing chip;

the first end of the power supply is respectively connected with the second end of the second electrolytic capacitor and the first end of the first voltage stabilizing chip;

the second end of the power supply, the third end of the power supply, the first end of the second electrolytic capacitor and the first end of the second capacitor are all connected;

the second end of the first voltage stabilizing chip and the second chip are both grounded;

the third end of the voltage stabilizing chip, the second end of the second capacitor, the second chip and the first end of the adjustable capacitor are all connected;

the power supply is used for outputting 12v voltage; the first voltage stabilizing chip is used for reducing the voltage of the 12v voltage source and stably outputting 5v voltage;

the 5v voltage is used for supplying power to the second chip; the second electrolytic capacitor and the second capacitor filter noise in the 12v voltage and the 5v voltage.

5. The ultrasonic excitation circuit according to claim 4, wherein the signal amplification circuit comprises: a third chip;

the third chip is connected with the second chip; the third chip is used for amplifying the first pulse wave signal to obtain a second pulse wave signal; the frequency of the first pulse wave signal is the same as that of the second pulse wave signal; the amplitude of the second pulse wave signal is 9 v.

6. The ultrasonic excitation circuit according to claim 5, wherein said signal amplification circuit further comprises: the third electrolytic capacitor, the fourth capacitor, the fifth capacitor, the second voltage stabilizing chip and the fourth electrolytic capacitor;

the first end of the third electrolytic capacitor and the first end of the second voltage stabilizing chip are both connected with the first end of the power supply; the second end of the second voltage stabilizing chip is grounded;

the third end of the second voltage-stabilizing chip, the second end of the fourth capacitor, the first end of the fifth capacitor, the first end of the fourth electrolytic capacitor and the third chip are all connected;

a second end of the fifth capacitor and a second end of the fourth electrolytic capacitor are both grounded;

the second voltage stabilizing chip is used for reducing the 12v voltage and stably outputting a 9v voltage; the 9v voltage supplies power to the third chip;

the third electrolytic capacitor and the fourth capacitor filter noise in the 12v voltage and the 9v voltage;

the fifth capacitor filters out high-frequency interference in the 9v voltage; the fourth electrolytic capacitor filters noise in the 9v voltage.

7. The ultrasonic excitation circuit according to claim 6, wherein the trigger circuit comprises: the power field effect transistor, the boosting module, the first resistor, the second safety capacitor and the third resistor;

the grid electrode of the power field effect transistor is connected with the third chip, and the drain electrode of the power field effect transistor is respectively connected with the first end of the second safety capacitor and the second end of the first resistor;

the first end of the second safety capacitor is connected with the first end of the third resistor; the second end of the third resistor and the source electrode of the power field effect transistor are both grounded;

the first end of the boosting module is connected with the first end of the power supply; the third end of the boosting module is connected with the first end of the first resistor; and the second end and the fourth end of the boosting module are grounded.

8. The ultrasonic excitation circuit of claim 7, wherein the trigger circuit further comprises: the first electrolytic capacitor, the first safety capacitor and the second resistor;

the first ends of the first electrolytic capacitor and the first safety capacitor are connected with the third end of the boosting module, and the second ends of the first electrolytic capacitor and the first safety capacitor are grounded;

the first end of the second resistor is connected with the grid electrode of the power field effect transistor, and the second end of the second resistor is grounded;

the first safety capacitor filters out the noise of the 9v voltage; the first electrolytic capacitor filters high-frequency interference in the 9v voltage;

the second resistor is used for matching impedance.

9. The ultrasonic excitation circuit of claim 2, wherein the pulse modulation circuit further comprises: a first capacitor;

the second end of the first capacitor is respectively connected with the first chip and the second chip, and the first end of the first capacitor is grounded;

the first capacitor filters the original trigger signal.

Technical Field

The invention relates to the technical field of ultrasonic waves, in particular to an ultrasonic excitation circuit.

Background

The ultrasonic wave is a sound wave with the frequency higher than 20000Hz, and has high directivity and strong penetrating power during propagation due to high frequency and short wavelength, and meanwhile, the ultrasonic wave has strong containment and can propagate for a long distance in different media. Ultrasonic waves are used as a fluctuation form with energy, become a carrier of detection information, are often used as a nondestructive testing method in the fields of industry, high and new technology and the like, particularly the ultrasonic technology in the medical aspect is rapidly developed, and various types of ultrasonic diagnosis and treatment instruments are used clinically at present. The existing ultrasonic detection device has the defects of complex hardware structure, overlarge volume, inaccurate measurement and the like of a transmitting circuit or an exciting circuit, so that the development of the portable ultrasonic exciting circuit which occupies low controller resources and can emit high-frequency pulses has practical significance.

Disclosure of Invention

To overcome the deficiencies of the prior art, it is an object of the present invention to provide an ultrasonic excitation circuit.

In order to achieve the purpose, the invention provides the following scheme:

an ultrasonic excitation circuit comprising:

the pulse modulation circuit is used for generating an original trigger signal and modulating the original starting signal to obtain a first pulse wave signal;

the signal amplification circuit is used for amplifying the first pulse wave signal to obtain a second pulse wave signal;

and the trigger circuit is used for generating a pulse excitation signal according to the second pulse wave signal and driving the ultrasonic probe based on the pulse excitation signal.

Preferably, the pulse modulation circuit includes: the circuit comprises a first chip, a second chip, an adjustable resistor and a third capacitor;

the second chip is respectively connected with the first chip, the first end of the adjustable resistor, the second end of the adjustable resistor, the first end of the third capacitor and the second end of the third capacitor;

the first chip is used for generating the original trigger signal and sending the original trigger signal to the second chip;

the adjustable resistor and the third capacitor act together to modulate the original trigger signal to obtain the first pulse wave signal, and the second chip sends the first pulse wave signal to the signal amplification circuit.

Preferably, the pulse width of the original trigger signal is 20us, the amplitude is 3.3v, and the interval is 5 ms;

the width of the first pulse wave signal is 200 ns.

Preferably, the pulse modulation circuit further comprises: the power supply, the second electrolytic capacitor, the second capacitor and the first voltage stabilizing chip;

the first end of the power supply is respectively connected with the second end of the second electrolytic capacitor and the first end of the first voltage stabilizing chip;

the second end of the power supply, the third end of the power supply, the first end of the second electrolytic capacitor and the first end of the second capacitor are all connected;

the second end of the first voltage stabilizing chip and the second chip are both grounded;

the third end of the voltage stabilizing chip, the second end of the second capacitor, the second chip and the first end of the adjustable capacitor are all connected;

the power supply is used for outputting 12v voltage; the first voltage stabilizing chip is used for reducing the voltage of the 12v voltage source and stably outputting 5v voltage;

the 5v voltage is used for supplying power to the second chip; the second electrolytic capacitor and the second capacitor filter noise in the 12v voltage and the 5v voltage.

Preferably, the signal amplification circuit includes: a third chip;

the third chip is connected with the second chip; the third chip is used for amplifying the first pulse wave signal to obtain a second pulse wave signal; the frequency of the first pulse wave signal is the same as that of the second pulse wave signal; the amplitude of the second pulse wave signal is 9 v.

Preferably, the signal amplification circuit further includes: the third electrolytic capacitor, the fourth capacitor, the fifth capacitor, the second voltage stabilizing chip and the fourth electrolytic capacitor;

the first end of the third electrolytic capacitor and the first end of the second voltage stabilizing chip are both connected with the first end of the power supply; the second end of the second voltage stabilizing chip is grounded;

the third end of the second voltage-stabilizing chip, the second end of the fourth capacitor, the first end of the fifth capacitor, the first end of the fourth electrolytic capacitor and the third chip are all connected;

a second end of the fifth capacitor and a second end of the fourth electrolytic capacitor are both grounded;

the second voltage stabilizing chip is used for reducing the 12v voltage and stably outputting a 9v voltage; the 9v voltage supplies power to the third chip;

the third electrolytic capacitor and the fourth capacitor filter noise in the 12v voltage and the 9v voltage;

the fifth capacitor filters out high-frequency interference in the 9v voltage; the fourth electrolytic capacitor filters noise in the 9v voltage.

Preferably, the trigger circuit includes: the power field effect transistor, the boosting module, the first resistor, the second safety capacitor and the third resistor;

the grid electrode of the power field effect transistor is connected with the third chip, and the drain electrode of the power field effect transistor is respectively connected with the first end of the second safety capacitor and the second end of the first resistor;

the first end of the second safety capacitor is connected with the first end of the third resistor; the second end of the third resistor and the source electrode of the power field effect transistor are both grounded;

the first end of the boosting module is connected with the first end of the power supply; the third end of the boosting module is connected with the first end of the first resistor; and the second end and the fourth end of the boosting module are grounded.

Preferably, the trigger circuit further comprises: the first electrolytic capacitor, the first safety capacitor and the second resistor;

the first ends of the first electrolytic capacitor and the first safety capacitor are connected with the third end of the boosting module, and the second ends of the first electrolytic capacitor and the first safety capacitor are grounded;

the first end of the second resistor is connected with the grid electrode of the power field effect transistor, and the second end of the second resistor is grounded;

the first safety capacitor filters out the noise of the 9v voltage; the first electrolytic capacitor filters high-frequency interference in the 9v voltage;

the second resistor is used for matching impedance.

Preferably, the pulse modulation circuit further comprises: a first capacitor;

the second end of the first capacitor is respectively connected with the first chip and the second chip, and the first end of the first capacitor is grounded;

the first capacitor filters the original trigger signal.

According to the specific embodiment provided by the invention, the invention discloses the following technical effects:

the present invention provides an ultrasonic excitation circuit, including: the device comprises a pulse modulation circuit, a signal amplification circuit and a trigger circuit; the pulse modulation circuit is used for generating an original trigger signal and modulating an original starting signal to obtain a first pulse wave signal; the signal amplification circuit is used for amplifying the first pulse wave signal to obtain a second pulse wave signal; the trigger circuit is used for generating a pulse excitation signal according to the second pulse wave signal and driving the ultrasonic probe based on the pulse excitation signal. The invention adopts the low-frequency trigger signal, occupies low resources, and can quickly and accurately drive the ultrasonic transducer to emit the ultrasonic wave with enough energy.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

FIG. 1 is a block diagram of an ultrasonic excitation circuit of the present invention;

FIG. 2 is a circuit diagram of a pulse modulation circuit according to the present invention;

FIG. 3 is a circuit diagram of a signal amplification circuit according to the present invention;

FIG. 4 is a circuit diagram of a trigger circuit according to the present invention.

Description of the symbols: 1-pulse modulation circuit, 2-signal amplification circuit and 3-trigger circuit.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, the inclusion of a list of steps, processes, methods, etc. is not limited to only those steps recited, but may alternatively include additional steps not recited, or may alternatively include additional steps inherent to such processes, methods, articles, or devices.

The invention aims to provide an ultrasonic excitation circuit which adopts a low-frequency trigger signal, occupies low resources and can quickly and accurately drive an ultrasonic transducer to emit ultrasonic waves with enough energy.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.

The present invention provides an ultrasonic excitation circuit, including: a pulse modulation circuit 1, a signal amplification circuit 2 and a trigger circuit 3.

The pulse modulation circuit 1 is used for generating an original trigger signal and modulating the original starting signal to obtain a first pulse wave signal; the signal amplification circuit 2 is used for amplifying the first pulse wave signal to obtain a second pulse wave signal; and the trigger circuit 3 is used for generating a pulse excitation signal according to the second pulse wave signal and driving the ultrasonic probe based on the pulse excitation signal.

Specifically, as shown in fig. 2, the pulse modulation circuit 1 includes: the circuit comprises a first chip U1, a second chip U2, an adjustable resistor RP1, a capacitor C3, a power supply DC, an electrolytic capacitor CE2, a capacitor C2, a capacitor C1 and a voltage stabilizing chip U3.

As shown in fig. 3, the signal amplification circuit 2 includes: a third chip U4, an electrolytic capacitor CE3, a capacitor C4, a capacitor C5, a voltage stabilizing chip U5 and an electrolytic capacitor CE 4.

As shown in fig. 4, the flip-flop circuit 3 includes: the device comprises a power field effect transistor Q, a boosting module T, a resistor R1, a safety capacitor CX2, a resistor R3, an electrolytic capacitor CE1, a safety capacitor CX1, a resistor R2 and an aviation plug HK.

The 1 st pin of the first chip U1, the 5 th pin of the second chip U2 and the second end of the capacitor C1 are connected. The 13 th pin of the first chip U1 is grounded.

The second terminal of the voltage-stabilizing chip U3, the first terminal of the capacitor C1, the 3 rd pin of the second chip U2, the 4 th pin of the second chip U2 and the 7 th pin of the second chip U2 are all grounded.

The 1 st pin of the second chip U2 is connected with the 2 nd pin and the 4 th pin of the third chip U4 respectively.

The second terminal of the power supply DC, the third terminal of the power supply DC, the first terminal of the dotting capacitor CE2 and the first terminal of the capacitor C2 are all grounded. The first end of the power supply DC, the first end of the voltage stabilizing chip U3, the second end of the electrolytic capacitor CE2 and the first end of the boosting module T are all connected. And the second end and the fourth end of the boosting module T are grounded.

A first end of the capacitor C3 is connected with the 11 th pin of the second chip U2, and a second end of the capacitor C3 is connected with the 10 th pin of the second chip U2.

The second end of the capacitor C2, the third end of the voltage-stabilizing chip U3 and the first end of the adjustable capacitor RP1 are all connected with the 14 th pin of the second chip U2; the second end of the adjustable capacitor RP1 is connected with the 9 th pin of the second chip U2.

The first terminal of the voltage stabilizing chip U5 and the first terminal of the electrolytic capacitor CE3 are both connected to the first terminal of the power supply DC. The second terminal of the electrolytic capacitor CE3 is grounded. The second terminal of the regulator chip U5 is grounded.

The third terminal of the voltage-stabilizing chip U5, the second terminal of the capacitor C4, the first terminal of the capacitor C5 and the first terminal of the electrolytic capacitor CE4 are all connected with the 6 th pin of the third chip U4. The first terminal of the capacitor C4, the second terminal of the capacitor C5, and the second terminal of the electrolytic capacitor CE4 are all grounded.

And the third end of the boosting module T, the first end of the electrolytic capacitor CE1, the first end of the safety capacitor CX1 and the first end of the resistor R1 are connected. The second end of the electrolytic capacitor CE1 and the second end of the safety capacitor CX1 are both grounded.

The grid of the power field effect transistor Q, the first end of the resistor R2, the 5 th pin of the third chip U4 and the 7 th pin of the third chip U4 are all connected.

The second end of the resistor R1 and the first end of the safety capacitor CX2 are both connected with the drain of the grid of the power field effect transistor Q.

The second end of the safety capacitor CX2 and the first end of the resistor R3 are both connected with the first end of the aviation plug HK.

The second end of the resistor R2, the source of the power FET Q, the second end of the resistor R3 and the second end of the aviation plug HK are all grounded.

In this embodiment, the first chip U1 selects a seeguino single chip microcomputer, the voltage stabilization chip U3 selects an LM7805 chip, the voltage stabilization chip U5 selects an LM7809 chip, the second chip U2 selects a DM74121 chip, and the third chip U4 selects an ICL7667 chip.

Specifically, the output voltage of the voltage regulation chip U3 is 5V, the quiescent current is 8mA, the output noise voltage is 40 μ V, the ripple rejection ratio is 62dB, the input-output voltage difference is 2V, and the output impedance is 17m Ω. The propagation delay time of the second chip U2 is 80ns, the working temperature is 0-70 ℃, and the low-level output current is 16 mA.

The input voltage of the voltage stabilizing chip U5 is 11.5V-24V, the output voltage is 9V, the quiescent current is 8mA, the output noise voltage is 40 muV, the output impedance is 17m omega, and the working temperature is-40 ℃ to 125 ℃. The rise time of the third chip U4 is 30ns, the output current is 10Ma, the power supply voltage is 4.5V-17V, the maximum power is 300mW, and the working temperature is 0-70 ℃.

The model of the power field effect transistor Q is IRL620, the drain-source breakdown voltage of the power field effect transistor Q is 200V, the gate-source breakdown voltage of the power field effect transistor Q is 10V, the continuous leakage current of the power field effect transistor Q is 5.2A, PD-, the power consumption of the power field effect transistor Q is 3.1W, the rising time of the power field effect transistor Q is 31ns, the typical closing delay time of the power field effect transistor Q is 18ns, and the working temperature of the power field effect transistor Q is-55-150 ℃.

The specific principle of the invention is as follows:

the first chip U1 generates an original trigger signal, wherein the pulse width of the original trigger signal is 20us, the amplitude of the original trigger signal is 3.3v, and the interval of the original trigger signal is 5 ms; the capacitor C1 filters the original trigger signal to reduce clutter and burrs; the power supply DC is used for outputting 12v voltage; the voltage stabilizing chip U3 is used for reducing the voltage of the 12v voltage source and outputting 5v voltage stably; the 5v voltage is used for supplying power to the second chip U2; the electrolytic capacitor CE2 and the capacitor C2 filter noise in the 12v voltage and the 5v voltage. The adjustable resistor RP1 and the capacitor C3 jointly act to modulate the original trigger signal to obtain a first pulse wave signal, wherein the width of the first pulse wave signal is 200ns, and the frequency of the first pulse wave signal is 2.5 MHz. The second chip U2 outputs the first pulse wave signal to the 2 nd and 4 th pins of the third chip U4 through the 1 st pin.

The third chip U4 has low propagation delay and fast rising and falling time at the output end, and then amplifies the first pulse wave signal to obtain a second pulse wave signal; the frequency of the first pulse wave signal is the same as that of the second pulse wave signal; the amplitude of the second pulse wave signal is 9 v. The voltage stabilizing chip U5 is used for reducing the 12v voltage and outputting a 9v voltage stably; the 9v voltage supplies the third chip U4. The electrolytic capacitor CE3 and the capacitor C4 filter noise in the 12v voltage and the 9v voltage; the capacitor C5 filters out high-frequency interference in the 9v voltage; the electrolytic capacitor CE4 filters the noise in the 9v voltage.

When the second pulse wave signal is at a low level, the power field effect transistor Q is turned off, and the boost module T charges the safety regulation capacitor CX2 to the output voltage of the boost module T through the resistor R1; when the second pulse wave signal is at a high level, the drain electrode of the power field effect transistor Q is connected with the source electrode, the safety capacitor CX2 discharges through the resistor R3, a high-voltage excitation signal is generated at two ends of the resistor R3, the pulse excitation signal is formed by repeated charging and discharging, ultrasonic waves can be driven, and the aviation plug HK is connected with the ultrasonic probe. The safety capacitor CX1 filters out the noise of the 9v voltage; the electrolytic capacitor CE1 filters high-frequency interference in the 9v voltage; the resistor R1 limits the current of the high-voltage circuit to prevent the subsequent elements from being damaged due to the overhigh current; the resistor R2 is used to match impedance.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

The principles and embodiments of the present invention have been described herein using specific examples, which are presented solely to aid in the understanding of the apparatus and its core concepts; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.