阅读说明：本技术 管线运算装置、可编程逻辑控制器及管线处理的执行方法 (Pipeline arithmetic device, programmable logic controller and execution method of pipeline processing ) 是由 西垣弘二 清水隆也 日下武纪 于 2020-03-09 设计创作，主要内容包括：管线运算装置(110)包括：运算部(120),包含管线；节点监视部(161),获取节点处理时间；队列监视部(162),获取累积消息量；优先级变量计算部(163),基于节点处理时间及所述节点的前段的接收队列的累积消息量,来计算所述节点的优先级变量；以及时间分配部(164),根据优先级变量对各节点分配运行时间。(A pipeline arithmetic device (110) comprises: an arithmetic unit (120) including a pipeline; a node monitoring unit (161) that acquires a node processing time; a queue monitoring unit (162) that acquires the cumulative message amount; a priority variable calculation unit (163) that calculates a priority variable for the node based on the node processing time and the cumulative message amount of the reception queue in the preceding stage of the node; and a time allocation unit (164) that allocates an operation time to each node according to the priority variable.)

1. A pipeline arithmetic device, comprising:

an arithmetic unit having a plurality of nodes and a plurality of receive queues, and including at least one pipeline in which the plurality of nodes are connected via the receive queues; and

a control unit having a node monitoring unit, a queue monitoring unit, a priority variable calculating unit, and a time allocating unit,

the node monitoring section acquires, from the node, a node processing time that is a time required for processing one message at the node,

the queue monitoring section acquires an accumulated message amount in the receive queue from the receive queue,

the priority variable calculation unit calculates a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a reception queue in a preceding stage of the node,

the time allocation unit allocates an operation time to each of the nodes based on the priority variable of each of the nodes.

2. The pipeline arithmetic device of claim 1,

the accumulated message amount is the number of messages accumulated in the receive queue, or the total size of the accumulated messages.

3. Pipeline arithmetic apparatus according to claim 1 or 2,

the priority variable calculation unit calculates a product of the node processing time of the node and the accumulated message amount as a priority variable of the node.

4. Pipeline arithmetic apparatus according to any one of claims 1 to 3,

the priority variable calculation unit generates the node processing time for calculating the priority variable of the node based on a plurality of the node processing times of the node from the past acquired by the node monitoring unit.

5. Pipeline arithmetic apparatus according to any one of claims 1 to 4,

the calculation unit further includes a confluence monitoring unit and a correction coefficient calculation unit,

the merging monitoring unit acquires, from the queue monitoring unit, the cumulative message amount of a reception queue upstream of the node at the merging point of the partial pipelines and before the node of the different partial pipeline, and calculates the degree of imbalance in the cumulative message amount of the reception queue before the node of the different partial pipeline,

the correction coefficient calculation unit calculates a correction coefficient for a node belonging to any one of the different partial pipelines based on the degree of imbalance,

the time allocation unit allocates the operation time based on a value obtained by multiplying the priority variable by the correction coefficient when the correction coefficient is calculated for the node.

6. Pipeline arithmetic apparatus according to any one of claims 1 to 4,

the arithmetic part further comprises a memory monitoring part and a correction coefficient calculating part,

the memory monitoring unit notifies the correction coefficient calculation unit when the free capacity of a memory for storing the accumulated messages of the reception queue is smaller than a predetermined value,

the correction coefficient calculation unit, when receiving the notification, assigns a correction coefficient greater than 1 to the node belonging to a pipe having a shorter time or fewer branches until the message processing in the plurality of pipes is completed,

the time allocation unit allocates the operation time based on a value obtained by multiplying the priority variable by the correction coefficient when the correction coefficient is given to the node.

7. A programmable logic controller comprising a pipeline arithmetic device as claimed in any one of claims 1 to 6.

8. A pipeline processing execution method for executing pipeline processing by at least one pipeline, wherein the pipeline is formed by connecting a plurality of nodes through a receiving queue, and the method comprises the following steps:

acquiring node processing time, wherein the node processing time is the time required by processing a message at the node;

acquiring the accumulated message amount in the receiving queue;

calculating a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a receive queue of a front stage of the node; and

and allocating operation time to each node according to the priority variable of each node.

Technical Field

The invention relates to a pipeline (pipeline) arithmetic device, a programmable logic controller and an execution method of pipeline processing.

Background

The following requirements are increasing, namely: in Factory Automation (FA) at various production sites, operation information of various machines, measurement data of a mobile product, and other sampling data related to production information are collected and made into a database. Therefore, in a production plant, it is required to improve the performance of a data collection and analysis system that can access various kinds of machines and perform enormous data processing.

On the other hand, pipeline processing is widely known as a technique for processing various data in an information processing apparatus. Patent document 1 discloses a method of: in such pipeline processing, the execution priority of each task is adjusted to prevent overflow (overflow) of a reception buffer (reception queue), and appropriate data processing is performed.

Documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication "Japanese patent laid-open publication No. Hei 11-237993"

Disclosure of Invention

Problems to be solved by the invention

The data collection and analysis system of FA needs to be constructed in such a manner that: the data collection target device, the data processing method, and the like can be freely specified by a user (factory manager) according to the production process. As a data collection and analysis machine used therefor, it is conceivable to use a pipeline arithmetic device.

The pipeline arithmetic device can easily set a data processing procedure required by a user by combining a data collection target device or a function block (node) prepared in accordance with a desired data processing method.

Further, it is also conceivable to integrate a pipeline arithmetic device as a data collection and analysis device into a Programmable Logic Controller (PLC) that controls various devices to be controlled. This makes it easy to reflect the analysis result of the collected data to the control of various controlled devices.

The pipeline operation device used in such FA has a large amount of data to process, and thus, high performance is required.

The present invention has been made in view of such circumstances, and an object thereof is to realize an improved pipeline operation apparatus which prevents overflow of a receive queue and can also perform pipeline processing in an overall efficient manner.

Means for solving the problems

In order to solve the above problems, the present invention adopts the following configuration.

A pipeline arithmetic device according to an aspect of the present invention includes: an arithmetic unit having a plurality of nodes and a plurality of receive queues, and including at least one pipeline in which the plurality of nodes are connected via the receive queues; and a control unit having a node monitoring unit, a queue monitoring unit, a priority variable calculating unit, and a time allocating unit, wherein the pipeline computing device includes: the node monitoring unit acquires a node processing time, which is a time required for processing one message at the node, from the node, the queue monitoring unit acquires an accumulated message amount in the reception queue from the reception queue, the priority variable calculation unit calculates a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a reception queue preceding the node, and the time allocation unit allocates an operating time to each of the nodes based on the priority variable of each of the nodes.

The programmable logic controller of an aspect of the present invention may also be a programmable logic controller including the pipeline arithmetic device of the aspect.

The execution method of pipeline processing of an aspect of the present invention executes pipeline processing by at least one pipeline, which is formed by connecting a plurality of nodes via a receive queue, and includes the steps of: acquiring node processing time, wherein the node processing time is the time required by processing a message at the node; acquiring the accumulated message amount in the receiving queue; calculating a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a receive queue of a front stage of the node; and allocating operation time to each node according to the priority variable of each node.

ADVANTAGEOUS EFFECTS OF INVENTION

According to the pipeline operation device of one aspect of the present invention, an improved pipeline operation can be realized to prevent overflow of the receive queue, and thus pipeline processing can also be performed overall efficiently.

According to the programmable logic controller of an aspect of the present invention, it is easy for a user to construct the following FA system, namely: the control device has a high-performance data collection function, and reflects the analysis result of the collected data to the control of various controlled devices.

According to the pipeline processing execution method of the aspect of the invention, an improved pipeline operation can be realized to prevent overflow of the receive queue, and thus pipeline processing can also be executed in an overall efficient manner.

Drawings

Fig. 1 is a schematic configuration diagram showing a pipeline computing apparatus according to embodiment 1 of the present invention.

Fig. 2 is a diagram for explaining the operation of the pipeline arithmetic device according to embodiment 1 of the present invention. (a) And (b) represent states at different times, respectively.

Fig. 3 is a schematic configuration diagram showing a programmable logic controller according to embodiment 2 of the present invention.

Fig. 4 is a diagram for explaining the structure and operation of the pipeline arithmetic device according to embodiment 3 of the present invention.

Fig. 5 is a diagram for explaining the structure and operation of the pipeline arithmetic device according to embodiment 4 of the present invention.

Fig. 6 is a schematic configuration diagram showing a pipeline computing apparatus according to embodiment 5 of the present invention.

Fig. 7 is a schematic configuration diagram showing a pipeline computing apparatus according to embodiment 7 of the present invention.

Fig. 8 is a diagram for explaining the structure and operation of the pipeline arithmetic device according to embodiment 7 of the present invention.

Fig. 9 is a schematic configuration diagram showing a pipeline computing apparatus according to embodiment 8 of the present invention.

Detailed Description

[ embodiment mode 1 ]

Hereinafter, an embodiment (hereinafter also referred to as "the present embodiment") according to one aspect of the present invention will be described with reference to the drawings.

Application example § 1

First, an example of a scenario to which the present invention is applied will be described with reference to fig. 1. Fig. 1 is a schematic diagram showing the configuration of a pipeline computing device 110 according to the present embodiment.

The pipeline arithmetic device 110 includes an arithmetic unit 120 and a control unit 160.

The arithmetic unit 120 includes a plurality of nodes (input node 130, logical node 140, output node 150) as functional blocks and a plurality of reception queues 141 and 151. The arithmetic unit 120 is configured as a pipeline in which a plurality of the nodes are connected via a receive queue, and at least one pipeline is provided in the arithmetic unit 120.

The control unit 160 includes a node monitoring unit 161, a queue monitoring unit 162, a priority variable calculating unit 163, and a time allocating unit 164, which are functional blocks.

The pipeline arithmetic device 110 executes a pipeline processing execution program loaded from the outside thereof or a pipeline processing execution program loaded from a recording device (not shown) including the pipeline processing execution program, thereby realizing the functions of these respective parts as functional blocks.

The node monitoring unit 161 acquires a node processing time T, which is a time required for processing a message at a node, from each node (the input node 130, the logical node 140, and the output node 150).

The queue monitoring unit 162 acquires the respective accumulated message amounts from the reception queues 141 and 151.

The priority variable calculation unit 163 calculates the priority variable PRI of the node based on at least the node processing time of the node and the accumulated message amount of the reception queue in the previous stage of the node.

The time allocation unit 164 allocates an operation time to each node and operates the node based on the priority variable PRI of each node.

In this way, the pipeline arithmetic device 110 of the present embodiment calculates the priority variable PRI based on at least the node processing time and the accumulated message amount of the reception queue, and allocates the operation time to each node based on the priority variable PRI.

Accordingly, an improved pipeline operation apparatus is realized to prevent overflow in a receive queue and also to perform pipeline processing overall efficiently.

Construction example 2

Next, an example of the configuration of the pipeline computing device 110 according to the present embodiment will be described.

The node of the arithmetic unit 120 is any one of the input node 130, the logical node 140, and the output node 150. The function of each node is as follows.

The input node 130 is a functional block that collects messages from a machine or the like external to the pipeline arithmetic device 110. The input node 130 is various depending on the type of external device or the like and the type of message to be processed. In this specification, the summarized data is referred to as a message, and the content of the message is information such as production information, control information, and environment information. The control information may be, for example, information such as a parameter such as a real-time torque (torque) that can be acquired from a heat engine (thermal motor), and the environmental information may be, for example, information such as a temperature.

The logical node 140 is a functional block that processes an input message and outputs it to a subsequent stage. The logical nodes 140 are various depending on the contents of the implemented process.

The output node 150 is a functional block that outputs an input message to an external device or the like of the pipeline computing device 110. The output node 150 is various depending on the type of external device or the like and the type of message to be processed.

The devices external to the pipeline computing device 110 may be a machine tool, a measuring device, various FA devices, a database for collecting and providing data related to various production information, a database for storing data related to various production information, and a cloud server (cloud server) on the Internet or other network.

Further, when the pipeline computing device 110 is integrated into a PLC, the connection destination of the input node 130 or the output node 150 of the pipeline computing device 110 may be a data file on a storage device included in the PLC or an application such as an operation control program of a machine tool running on the PLC.

The production information is a concept including information on the operation of the machine tool, the measurement device, and various other FA devices, measurement data, and other production-related information.

Fig. 1 shows a data server 11 and a database 12 as examples of external devices to which an input node 130 and an output node 150 are connected, respectively.

In the arithmetic unit 120, necessary logical nodes 140 are sequentially connected between the input node 130 and the output node 150 to form a pipeline.

The logical node 140 is provided with a logical node reception queue 141 at the front stage. Similarly, a receive queue 151 of the output node is provided at the front stage of the output node 150. Each receive queue 141, 151 temporarily accumulates messages input to logical node 140 or output node 150 until processing in logical node 140 or output node 150 is complete and the next message can be received.

The number of pipelines constituting the arithmetic section 120 is usually plural, but at least one pipeline may be used. Furthermore, a pipeline is not limited to connecting single or multiple logical nodes in series from one input node 130 to one output node 150, but may branch or merge in the middle.

The configuration of the control unit 160 including the node monitoring unit 161, the queue monitoring unit 162, the priority variable calculation unit 163, and the time allocation unit 164 is approximate as described in the above application example § 1. The details of the functions of the respective sections will be described below together with the description of the operation of the pipeline arithmetic device 110.

In the present embodiment, the cumulative message number Q, which is the number of messages, is used as the cumulative message amount of each reception queue.

The node processing time T may be specifically a time from the following start time to end time. The time at which a node receives a message from a receive queue, i.e., the dequeue time of the receive queue, may be set as the start time. In the case of the input node 130, the time when the start (kick) of the input node 130 is performed may be set as the start time.

The enqueue time of the reception queue of the connection destination node, which is the time when the node sends the message to the reception queue of the connection destination node, may be set as the end time. In the case of the output node 150, the following time points may be set: and the time when the message output to the external device or the like of the output destination of the output node 150 is completed. Further, particularly in the case where the node does not output a message to the subsequent stage, the time point at which the node receiving the message itself does not need to further perform the processing of the message received by the node (the time point at which the processing of itself is completed) may be set as the time point at which the processing is completed.

Action example 3

The operation of the pipeline arithmetic device 110 according to the present embodiment will be described based on a more specific example.

The input node 130 sequentially acquires messages from a plurality of data servers 11. Each data Server 11 may be a Web Server (Web Server) that provides messages based on Hypertext Transfer Protocol (http) or Secure Hypertext Transfer Protocol (https).

The logical node 140 sequentially extracts data necessary for analyzing the device state from the input message, for example, performs necessary operations, and outputs the data. The logical node 140 may also perform processing for analyzing a script using HyperText Markup Language (html), for example.

The output node 150 in turn outputs the message output by the logical node 140 to the database 12.

Fig. 2(a) is a diagram showing a state of the pipeline 121 of the arithmetic unit 120 when each node executes such an operation. The suffixes i, n, o attached to the node processing time T, the cumulative number of messages Q of the reception queue, and the priority variable PRI denote the input node 130, the logical node 140 or its reception queue 141, the output node 150 or its reception queue 151, respectively.

In the example, the node processing time T required for each node To process a message is Ti 20ms, Tn 100ms, and To 50 ms.

In this case, the node monitoring unit 161 acquires the node processing time Ti of 20ms, Tn of 100ms, and To of 50ms from the input node 130, the logical node 140, and the output node 150, respectively. Note that, although the Unit is expressed in milliseconds here, the Unit may be the number of clocks of a Central Processing Unit (CPU).

In the state of fig. 2(a), the accumulated message count Q, which is the number of messages accumulated in each reception queue, is temporarily set to Qn 3 and Qo 0.

At this time, the queue monitoring unit 162 acquires the cumulative message number Qn of 3 and the cumulative message number Qo of 0 from the reception queues 141 and 151, respectively.

Next, the priority variable calculating unit 163 receives the node processing time T of each node from the node monitoring unit 161, and also receives the cumulative message count Q of each node from the queue monitoring unit 162. The priority variable calculation unit 163 regards the cumulative number of messages Qi as 1 with respect to the input node 130.

Then, the priority variable calculation unit 163 calculates the priority variable PRI for each node. Here, the priority variable PRI is a value calculated from at least the node processing time T and the cumulative message number Q. In the specific example of the present embodiment, the priority variable PRI is the product of the node processing time T and the cumulative message number Q.

The priority variable calculation unit 163 calculates the priority variable PRI for each node as PRIi1 ═ 1 × 20, PRIn ═ 3 × 100, and PRIo ═ 0 × 50.

Next, the time allocation unit 164 divides the information processing resource, for example, the CPU time, regarding the time given to the arithmetic unit 120, based on the priority variable PRI for each node calculated by the priority variable calculation unit 163. As an example, the CPU time given to the arithmetic unit 120 is allocated in proportion to the priority variable PRI, and each node is operated.

Then, according to the state of fig. 2(a), CPU time is not allocated to the output node 150 and CPU time larger than that of the input node 130 is allocated to the logical node 140 within a predetermined time.

Since a large CPU time is allocated to the logical node 140, the cumulative number Qn of messages in the reception queue 141 of the logical node 140 decreases after a certain time, and the state transitions to the state of fig. 2(b) as an example. In this way, the backlog of messages sent by the input node 130 to the logical node 140 is eliminated.

However, when the input node 130 is reserved for the fixed-cycle execution, the time distribution unit 164 exceptionally gives the input node 130 CPU time for the fixed-cycle execution capable of performing the operation.

The time allocation unit 164 operates as follows when reservation is made for the input node 130 to be executed periodically. For example, when a reservation is made to acquire a message from an external device at a fixed cycle of 1ms and the processing time of the input node 130 is set to 0.02ms, the time allocation unit 164 operates the input node 130 so as to secure a CPU time of 0.02ms at least within 1 ms. The time allocation unit 164 allocates the remaining CPU time to the operation unit 120 in proportion to the other nodes, and operates the other nodes.

When the reservation for the regular-cycle execution is made for the input node 130 and a relatively large fixed CPU time is allocated to the input node 130, the message output from the input node 130 becomes high frequency. Therefore, in the initial stage of the operation of the pipeline, the messages are backlogged in the receive queue of the specific node, but the running time of each node is adjusted to eliminate the backlog in the same manner as described above.

4 action and Effect

As described above, even if the pipeline arithmetic device 110 according to the present embodiment temporarily accumulates a message in excess in a specific reception queue, the operation time of each node is dynamically allocated according to the situation, and the operation is performed so as to eliminate the excess accumulation. Therefore, overflow of the receive queue of the pipeline operation is effectively suppressed.

As described above, the priority variable PRI is calculated based on the node processing time T and the cumulative message number Q, and the operation time of each node is dynamically allocated based on the priority variable PRI. That is, the pipeline computing device 110 according to the present embodiment achieves the efficiency of the whole pipeline without waiting for the operation at the node.

(comparative 1)

For comparison, a case where the control unit 160 does not adjust the operation time of each node as described above will be described.

At this time, for example, when the message processing in the logical node 140 requires time, the message output from the input node 130 is backlogged in the reception queue 141 of the logical node 140 (Qn becomes excessive). If this situation persists, the reception queue 141 overflows.

Therefore, in order to avoid flooding, it is conceivable to set a waiting time for the action of the input node 130. For example, when the node processing time Tn of the logical node 140 is 100ms, the waiting time for the operation of the input node 130 is set to 200ms, and a message is transmitted to the reception queue 141 of the logical node 140 only at intervals of 200ms or more. The latency must be designed in consideration of the processing time of the subsequent stage of the pipeline.

However, when there are a plurality of pipelines set in the arithmetic unit 120, it is very troublesome for the user to perform such adjustment, and it is difficult to appropriately set the waiting time.

On the other hand, in the pipeline computing device 110 of the present embodiment, even if the user does not make such an adjustment for each input node, the accumulation of messages is dynamically eliminated.

Therefore, the user can easily construct a data collection system capable of collecting and analyzing data from various devices without setting parameters such as the waiting time of each node.

(comparative 2)

For comparison, a case where the conventional technique of patent document 1 is applied will be described. In a pipeline arithmetic device to which the related art is applied, the operation time allocated to each node is calculated based on the amount of data (memory usage amount of a message) accumulated in the reception queue of each node.

On the other hand, in the pipeline arithmetic device 110 of the present embodiment, the operation time allocated to each node is proportionally allocated according to the priority variable PRI, which is the product of the cumulative data number Q, which is the cumulative message amount of the reception queue of each node, and the node processing time T.

Therefore, when a message is temporarily accumulated in excess in a reception queue of a certain node, CPU time is allocated to the node in consideration of the node processing time. Therefore, according to the pipeline operation device 110, the state of the excessive accumulation of the messages can be eliminated more quickly than in the case of applying the related art.

For example, when a node having a node processing time of 100ms is connected to a node having a node processing time of 200ms, a CPU time of 2 times must be allocated to the latter node in order to pass a message of a constant flow rate through the pipe. Therefore, in the prior art, such allocation is performed when 2 times as many messages as the former node reception queue are accumulated in the reception queue of the latter node.

On the other hand, in the pipeline operation device 110 of the present embodiment, the number of messages accumulated in the nodes is equal by performing the allocation. This is because the CPU time is allocated according to the product of the cumulative message number Q and the node processing time T. As described above, according to the pipeline arithmetic device 110 of the present embodiment, the number of messages accumulated in the reception queue of each node of the pipeline 121 in operation is not likely to be different. Therefore, even when the memory resources for configuring the receive queue are limited, the pipeline arithmetic device 110 can be efficiently used.

Further, as in the conventional art, when there is a variation in the amount of messages accumulated in the reception queue, the following inefficient situation is likely to occur: in a particular node, messages that should be processed are exhausted, and the node waits for reception before the next timing of updating the ratio of the running time. However, in the pipeline operation device 110 of the present embodiment, since such a situation is suppressed, pipeline processing can be performed efficiently as a whole.

The operation and effect of embodiment 1 above are also exhibited in the same manner in the following embodiments.

[ embodiment 2 ]

Other embodiments of the present invention will be described below. For convenience of description, components having the same functions as those described in the above embodiments are denoted by the same reference numerals, and description thereof will not be repeated.

Fig. 3 is a schematic diagram showing a configuration of a Programmable Logic Controller (PLC)200 according to embodiment 2.

The programmable logic controller 200 includes a pipeline arithmetic device 210 similar to that of embodiment 1. The pipeline arithmetic device 210 is provided with an arithmetic unit 220 and a control unit 260.

In the arithmetic unit 220, a user (plant manager) constructs a pipeline connecting nodes corresponding to data output target devices such as data collection target devices or data processing methods, so that the user can easily perform necessary data collection and setting of processing.

In FIG. 3, a plurality of pipelines including Input nodes, Logic nodes, and Output nodes are shown. Note that, although not shown, a reception queue is connected to the Logic node Logic and the front stage of the Output node Output, as in the above-described embodiment. The configuration of the control unit 260 is the same as that of the above-described embodiment.

The programmable logic controller 200 further has: data files 201, 202 in the storage means it comprises; and applications 203 and 204 such as a work machine operation control program that run therein.

The connection destination of the Input node Input of the pipeline operation device 210 may be the data file 201 or the application 203. Further, the connection destination of the Input node Input may be a machine tool or a measuring machine as an external machine of the programmable logic controller 200, and other various FA machines, a data server 11 that collects and provides data related to various production information, a database 12 that stores data related to various production information, and a cloud server 13 on the internet or other network.

The connection destination of the Output node Output of the pipeline operation device 210 may be the data file 202 or the application 204. Further, the connection destination of the Output node Output may be a work machine or a measurement machine as an external machine of the programmable logic controller 200, and other various FA machines, a data server 11 that collects and provides data related to the FA machines, a database 12 that collects and provides data related to various production information, and a cloud server 13 on the internet or other network.

The application 203 to which the Input node Input is connected and the application 204 to which the Output node Output is connected may be different applications or the same application.

According to embodiment 2, the pipeline arithmetic device 210 as a data collection and analysis device is integrated into the programmable logic controller 200 that controls various devices to be controlled. Therefore, it is easy for the user to construct a system that reflects the analysis result of the collected data to the control of various control target devices.

[ embodiment 3 ]

The pipeline arithmetic device according to embodiment 3 is the same as the above-described embodiments. In embodiment 3, the operation of the arithmetic unit in the case where a branch is set in the pipeline will be described.

Fig. 4 is a diagram showing a pipeline 321 belonging to an arithmetic section of the pipeline arithmetic device according to embodiment 3. The line 321 has the following structure.

The input node 330 obtains messages from the work machine 14 external to the pipeline computing device and the logic node 340 extracts the necessary data. At the front stage of the logical node 340, a reception queue 341 is provided. The logical node 340 branches the processed message out to output node (a)350 and output node (B) 352.

The output node (a)350 outputs the processed message to the database 12 outside the pipeline operation device. The output node (B)352 outputs a message to the cloud server 13 outside the pipeline operation device. The output node (B)352 performs processing according to, for example, a Message Queue Telemetry Transport (MQTT) protocol.

Here, the following is assumed: the node processing time Toa of the output node (a)350 connected to the database 12 is 50ms, the output node (B)352 connected to the cloud server 13 takes more time, and the node processing time Tob is 150 ms. This corresponds to the case where: the database 12 is connected to a local network inside the plant, and performs output processing more quickly than the cloud server 13 connected to the internet.

When the pipeline 321 starts to operate, messages are output from the logical node 340 to the receive queue 351 of the output node (a)350 and the receive queue 353 of the output node (B)352 at substantially the same time. The cumulative message count Qoa of the reception queue (a)351 and the cumulative message count Qob of the reception queue (B)353 both become 1.

Then, the ratio of the priority variable PRIoa of the output node (a)350 to the priority variable PRIob of the output node (B)352 to 1 × 150 becomes 1: 3. the CPU time is allocated according to the ratio, and thus the message processing in the output node (a)350 and the output node (a)350 ends almost at the same time.

Since the processing of the messages is finished at almost the same time, the accumulated message numbers Qoa and Qob are almost the same, and the ratio of the CPU time given to the reception queue (a)351 and the reception queue (B) corresponds to the node processing time. Therefore, while the pipeline 321 continues to operate, the idle state does not occur in the operation of any of the output nodes 350 and 352 while waiting for the input of a message, and the CPU time of each node is divided very efficiently.

On the other hand, when the conventional technique of patent document 1 is applied, for example, when the operation of the pipeline starts and the cumulative message number Qoa of the receive queue (a)351 and the cumulative message number Qob of the receive queue (B)353 both become 1, the same CPU time is divided. As described above, when the conventional technique of patent document 1 is applied, an idle state occurs in which an operation is performed by waiting for a message to be input in the output node (a)350 having a shorter node processing time, and the operation efficiency of the entire pipeline is deteriorated.

As described above, in the example of embodiment 3, a pipeline arithmetic device is realized which achieves efficiency of the entire pipeline without waiting for an operation at a node.

[ embodiment 4 ]

The pipeline arithmetic device according to embodiment 4 is the same as the above-described embodiments. In embodiment 4, the operation of the arithmetic section in the case where a confluence is set in the pipeline will be described.

Fig. 5 is a diagram showing a pipeline 421 belonging to an arithmetic unit of the pipeline arithmetic device according to embodiment 4. The suffixes ia, ib, na, nb, n2 attached to the node processing time T, the cumulative number of messages Q of the reception queue, and the priority variable PRI represent the input node (a)430, the input node (B)432, the logical node (a)440 or its reception queue (a)441, the logical node (B)442 or its reception queue (B)443, the logical node (2)444 or its reception queue (2)445, respectively. The line 421 has the following structure.

The input node (a)430 acquires a message from the work machine 14 outside the pipeline arithmetic device, and the logic node (a)440 extracts necessary data. The logical node (a)440 has a reception queue (a)441 at its front stage. Logical node (a)440 enters the processed message into receive queue (2)445 of logical node (2) 444.

The input node (B)432 acquires a message from the work machine 15 outside the pipeline arithmetic device, and the logical node (B)442 extracts necessary data. At the front stage of the logical node (B)442, a reception queue (B)443 is provided. Logical node (B)442 enters the processed message into receive queue 445 of logical node (2) 444.

In this way, in the reception queue (2)445 of the logical node (2)444 of the pipe confluence, the number Qn2 of accumulated messages is counted with the messages from each node set as one group.

Logical node (2)444 performs processing such as dequeuing the two messages from reception queue 445 and merging (merge) the two messages, and outputs the result to output node 450. A receive queue 451 is provided at the front stage of the output node 450. The output node 450 outputs a message to the database 12 external to the pipeline operation device.

Here, the following is assumed: the node processing time Tna for logical node (A)440 is 50ms, and the node processing time Tnb for logical node (B)442 is 100 ms.

If the CPU time allocation based on the priority variable PRI is also executed for each of the input nodes 430 and 432, the message processing in each node can be completed at the same time as in the above embodiment.

Therefore, according to embodiment 4, it is possible to eliminate the occurrence of an idle state in which the logical node (2)444 at the confluence point waits for the input of any message and the operation is performed, and it is possible to very efficiently divide the CPU time of each node.

As described above, in the example of embodiment 4, a pipeline arithmetic device is realized which achieves efficiency of the entire pipeline without waiting for an operation at a node.

In fig. 5, Qia is 1, Qib is 1, Qna is 1, Qnb is 1, Qn2 is 1, Tia is 10ms, Tib is 20ms, Tn2 is 100 ms. Furthermore, PRIia ═ 1 × 10, prib ═ 1 × 20, PRIna ═ 1 × 50, PRInb ═ 1 × 100, and PRIn2 ═ 1 × 100.

[ embodiment 5 ]

When a confluence from a plurality of input nodes is set in a pipeline as in the pipeline 421 of the pipeline arithmetic device of embodiment 4, when reservation for periodic execution is made for at least one input node, the following phenomenon occurs.

Since the time required for message processing differs among the partial pipelines of the merged stream, the reception queue (reception queue 445 in fig. 5) of the node after the merged stream is in a state in which even if the message from one partial pipeline is backlogged, the message from the other partial pipeline is exhausted. In this way, the merged node waits for a message, and the pipeline is not efficiently used. The pipeline arithmetic device of embodiment 5 has a structure that can eliminate such a phenomenon.

Fig. 6 is a schematic diagram showing the configuration of a pipeline computing device 610 according to embodiment 5.

The pipeline arithmetic device 610 includes an arithmetic unit 620 and a control unit 660.

The arithmetic unit 620 may have various pipelines inside, as in the pipeline arithmetic device of the above-described embodiment.

The control unit 660 includes a confluence monitoring unit 665 and a correction coefficient calculation unit 666, in addition to the configuration of the control unit 160 of the pipeline computing device 110.

The merge monitoring unit 665 receives at least the cumulative number of messages in the reception queues (reception queues 441 and 443 in fig. 5) of the nodes immediately before the merge from the queue monitoring unit 562, and compares these. As a result of the comparison, the degree of imbalance in the number of accumulated messages between the partial pipelines of the merged flow is determined.

The correction coefficient calculation unit 666 receives information on the imbalance state of the number of accumulated messages between partial pipelines of the merge from the merge monitoring unit 665. The correction coefficient calculation unit 666 calculates the correction coefficient K for the node belonging to the partial pipe where the message accumulation occurs, based on the degree of imbalance between the partial pipes of the merged pipe.

For example, in the pipe having a flow merging as shown in fig. 5, the cumulative number of messages Qna in the receive queue 441 is 3 times the cumulative number of messages Qnb in the receive queue 443. At this time, the correction coefficient calculation unit 666 sets the correction coefficient K to 3 for the input node (a)430 and the logical node (a)440, which are nodes of the partial pipeline to which the reception queue 441 belongs.

The time allocation unit 664 allocates the CPU time to each node based on the correction coefficient K calculated by the correction coefficient calculation unit 666 and the priority variable PRI calculated by the priority variable calculation unit 663 in the same manner as the priority variable calculation unit 163 of the pipeline operation device 110. More specifically, the CPU time corresponding to the value obtained by multiplying the priority variable PRI by the correction coefficient is allocated to the node to which the correction coefficient is set.

Thus, the resource of CPU time is allocated according to the nodes belonging to the partial pipeline generating the message accumulation, and the imbalance of the confluence point is eliminated.

Thus, according to the pipeline arithmetic device 610 of embodiment 5, even in a pipeline having a flow merge, pipeline processing can be executed reliably and efficiently as a whole.

[ embodiment 6 ]

The pipeline arithmetic device according to embodiment 6 is an example of a device similar to the above-described embodiments but having a different formula for calculating the priority variable PRI.

In the example of the above embodiment, the calculation formula for calculating the priority variable executed by the priority variable calculation unit is PRI ═ T × Q. That is, the node processing time T has the same weight as the cumulative message number Q.

However, when the free capacity of the memory provided to the arithmetic unit is reduced, it may be preferable to further weight the cumulative message number Q and operate in a direction to temporarily reduce the cumulative message.

In the pipeline arithmetic device according to embodiment 6, as an example, the calculation formula for calculating the priority variable executed by the priority variable calculation unit may be represented by PRI ═ T × Q^r(r.gtoreq.1). Here, the variable r is a parameter for weighting the cumulative number of messages Q, and when it exceeds 1, it indicates that the cumulative number of messages Q is further weighted. The calculation formula for weighting is not limited to the above calculation formula, and other calculation formulas may be used.

In the pipeline arithmetic device according to embodiment 6, when the free capacity of the memory is reduced, the value of the variable r can be made larger than 1, and the operation can be performed in a direction of reducing the number Q of accumulated messages, thereby suppressing the occurrence of a situation where the memory resource is insufficient.

In the pipeline arithmetic device according to embodiment 6, as an example, the calculation formula for calculating the priority variable executed by the priority variable calculation unit may be represented by PRI ═ T × Q, taking into account the usage rate m of the memory provided to the calculation unit as it is^{(Q /Qmax+m)}. Here, Qmax is the maximum number of messages that can be accumulated in the receive queue. The occurrence of a situation in which memory resources are insufficient can also be suppressed by the present calculation formula.

[ embodiment 7 ]

The pipeline arithmetic device according to embodiment 7 is similar to the above-described embodiments, but includes an example of special processing performed in a specific situation.

Fig. 7 is a schematic diagram showing the configuration of a pipeline computing device 510 according to embodiment 7.

The pipeline arithmetic device 510 includes an arithmetic unit 520 and a control unit 560.

The arithmetic unit 520 can internally set various pipelines, as in the pipeline arithmetic device of the above-described embodiment. Examples of the set lines will be described below. To avoid complication, only one line is shown in fig. 7.

The control unit 560 includes a memory monitoring unit 567 and a correction coefficient calculation unit 566 in addition to the configuration of the control unit 160 of the pipeline computing device 110.

The memory monitoring unit 567 receives the cumulative number of messages for each node from the queue monitoring unit 562, and sums them. In this way, it is determined whether or not the free capacity is smaller than a predetermined value, compared with the allocation of the memory resource reserved for the receive queue of the pipeline arithmetic device 510. When the free capacity is smaller than the predetermined value, the memory monitoring unit 567 notifies the correction coefficient calculation unit 566 of this.

When receiving the notification from the memory monitoring unit 567, the correction coefficient calculation unit 566 sets the correction coefficient K for the node belonging to the specific pipe. The correction coefficient K may be a predetermined value (for example, K is 2) or may be a value corresponding to the usage ratio of the memory.

The time allocation unit 564 allocates the CPU time to each node based on the correction coefficient K calculated by the correction coefficient calculation unit 566 and the priority variable PRI calculated by the priority variable calculation unit 563 in the same manner as the priority variable calculation unit 163 of the pipeline operation device 110. More specifically, the CPU time corresponding to the value obtained by multiplying the priority variable PRI by the correction coefficient K is allocated to the node to which the correction coefficient is set.

Fig. 8 is a diagram showing a pipeline (a)521 and a pipeline (B)522 of an arithmetic unit of the pipeline arithmetic device 510 according to embodiment 7.

The suffixes ia, na, oa attached to the node processing time T, the cumulative number of messages Q of the reception queue, and the priority variable PRI represent the input node (a)530, the logical node (a)540 or its reception queue (a)541, the output node (a)550 or its reception queue (a)551, respectively.

Similarly, the suffixes ib, nb, ob respectively represent the input node (B)532, the logical node (B)542 or its receiving queue (B)543, the output node (B)552 or its receiving queue (B) 553.

The pipeline (a)521 is connected to an input node (a)530, a reception queue (a)541, a logic node (a)540, a reception queue (a)551, and an output node (a)550 in this order. The node processing time of the input node (a)530, the logic node (a)540, and the output node (a)550 is 10ms for Tia, 50ms for Tna, and 100ms for Toa, respectively.

The input node (B)532, the reception queue (B)543, the logical node (B)542, the reception queue (B)553, and the output node (B)552 are connected to the pipeline (B)522 in this order. The node processing time of the input node (B)532, the logical node (B)542, and the output node (B)552 is Tib 10ms, Tnb 200ms, and Toa 50ms, respectively.

In the above configuration, when the free capacity of the given memory is reduced and notified from the memory monitoring unit 567, the correction coefficient calculation unit 566 gives the correction coefficient K (for example, K is 2) to each node belonging to the pipe 521.

The pipeline to which the correction coefficient is given is selected from pipelines whose time until the pipeline is completed is short. In the example of FIG. 8, the time for line 521 is Tia + Tna + Toa, which is 160 ms. The time for line 522 is Tib + Tnb + Tob, 260 ms. Thus, in the example of FIG. 8, pipeline 521 is selected.

The pipeline selected by the correction coefficient calculation unit 566 may be determined in advance based on an estimated value of the processing time of each pipeline by a program for constructing the pipeline computing device 510. Alternatively, the node processing time T may be sequentially calculated based on the node processing time T of each node acquired by the node monitoring unit 561.

As described above, when the CPU time is prioritized for the predetermined pipeline 521 whose time until the pipeline is completed is short, the message processing in the pipeline 521 is performed rapidly, and the free capacity of the memory increases.

In fig. 8, Qna ═ 3, Qoa ═ 3, PRIna ═ 3 × 50, PRIoa ═ 3 × 100, Qnb ═ 3, Qob ═ 3, PRInb ═ 3 × 200, and PRIob ═ 3 × 50.

As described above, in the pipeline computing device 510 according to embodiment 7, when the free capacity of the memory provided to the computing unit is reduced, the time allocation unit 564 increases the operation time divided for the nodes belonging to the pipeline having a short time until the completion of the pipeline, and rapidly reduces the message in the computing unit 520.

In the pipeline arithmetic device 510 according to embodiment 7, when the free capacity of the memory is reduced, the control unit 560 can perform the above-described special processing to reduce the number of messages accumulated in the arithmetic unit 520, thereby suppressing the occurrence of a situation where the memory resource is insufficient.

In embodiment 7, an example of a case where a plurality of non-branching pipelines are included is described. On the other hand, for example, a pipeline having a branch as shown in fig. 4 is branched, and a message in the pipeline is rapidly increased. Therefore, it is also effective to restore the free capacity of the memory by relatively reducing the operation time for dividing such a branched pipeline when the free capacity of the memory becomes small by the same operation as described above.

[ embodiment 8 ]

The pipeline computing device 710 according to embodiment 8 is similar to the above-described embodiments, but generates an example of the node processing time for calculating the priority variable PRI of the node based on the statistical value of the plurality of node processing times T from the past of the node acquired by the node monitoring unit.

Fig. 9 is a schematic diagram showing the configuration of a pipeline computing device 710 according to embodiment 8.

The pipeline arithmetic device 710 includes an arithmetic unit 720, a control unit 760, and a recording unit 770.

The arithmetic unit 720 can internally set various pipelines, as in the pipeline arithmetic device of the above embodiment.

The control unit 760 includes a statistic calculation unit 768 in addition to the configuration of the control unit 160 of the pipeline computing device 110.

The node monitoring unit 761 records the node processing time T acquired from each node of the operation unit 720 in the recording unit 770.

The statistical value calculation unit 768 calculates the statistical value of the node processing time based on the node processing time T of each previous node recorded in the recording unit 770 and the latest node processing time T acquired by the node monitoring unit 761. As the statistical value, an average value, a median value, or a mode value may be used. Alternatively, the latest node processing time T without using an abnormal value may be set by using a method such as Smirnov-Grubbs (Smirnov-Grubbs) test.

The priority variable calculating unit 763 calculates the priority variable PRI in the same manner as the priority variable calculating unit 163 of the pipeline computing device 110 except that the statistic value calculated by the statistic value calculating unit 768 is used for the node processing time.

The operation of the time allocator 764 is similar to that of the time allocator 164 of the pipeline computing device 110.

According to the pipeline arithmetic device 710 of embodiment 8, since the statistical value is used as the node processing time for calculating the priority variable PRI, it is possible to prevent extreme allocation of the operation time of each node due to a sudden event.

[ notes of attachment ]

In the embodiment, the cumulative message number Q, which is the number of accumulated messages, is used as the cumulative message amount of the reception queue.

However, the application of the present invention is not limited to this, and as the accumulated message amount, the total size of the messages accumulated in the reception queue (the memory usage amount) may be used. At this time, the priority variable PRI may be calculated by the product of the total size of the accumulated messages and the node processing time T.

In the above embodiment, the specific example is described as the priority variable PRI. However, the application of the present invention is not limited to this, and the priority variable PRI may be calculated by multiplying each message by a coefficient corresponding to an index such as the importance of the message that is considered useful in calculating the processing priority of the message, and using the sum of the coefficients.

Further, the pipeline arithmetic device of the present invention is not limited to the case where all the nodes of the arithmetic unit are controlled by the control unit 160 of the present invention, and some of the nodes may be controlled by another method.

[ implementation by software ]

The functional blocks (particularly, the input node, the logic node, the output node, the reception queue, the node monitoring unit, the queue monitoring unit, the priority variable calculating unit, the time allocation unit, the merge monitoring unit, the correction coefficient calculating unit, the memory monitoring unit, and the statistic value calculating unit) of the pipeline computing devices 110, 210, 510, 610, 710 may be implemented by a logic Circuit (hardware) formed as an Integrated Circuit (IC) chip) or the like, or may be implemented by software.

In the latter case, the pipeline arithmetic devices 110, 210, 510, 610, 710 include computers that execute commands of programs as software for realizing the respective functions. The computer includes, for example, one or more processors, and includes a computer-readable recording medium storing the program. The object of the present invention is achieved by the computer wherein the processor reads and executes the program from the recording medium.

As the processor, for example, a Central Processing Unit (CPU) can be used. As the recording medium, a tape, a disk, a card, a semiconductor Memory, a programmable logic circuit, or the like can be used in addition to a "non-transitory tangible medium", such as a Read Only Memory (ROM), or the like.

Further, a Random Access Memory (RAM) or the like for expanding the program may be included.

The program may be supplied to the computer via any transmission medium (a communication network, a broadcast wave, or the like) through which the program can be transmitted.

In addition, an embodiment of the present invention can be realized in the form of a data signal embedded in a carrier wave for embodying the program by electronic transmission.

[ conclusion ]

A pipeline arithmetic device according to an aspect of the present invention includes: an arithmetic unit having a plurality of nodes and a plurality of receive queues, and including at least one pipeline in which the plurality of nodes are connected via the receive queues; and a control unit having a node monitoring unit, a queue monitoring unit, a priority variable calculating unit, and a time allocating unit, wherein the pipeline computing device includes: the node monitoring unit acquires a node processing time, which is a time required for processing one message at the node, from the node, the queue monitoring unit acquires an accumulated message amount in the reception queue from the reception queue, the priority variable calculation unit calculates a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a reception queue preceding the node, and the time allocation unit allocates an operating time to each of the nodes based on the priority variable of each of the nodes.

According to the structure, an improved pipeline operation device is realized, overflow of the receive queue is prevented, and pipeline processing can be performed efficiently as a whole.

In the pipeline arithmetic device of the aspect, the accumulated message amount may also be the number of messages accumulated in the receive queue or the total size of the accumulated messages.

According to the structure, a priority variable for pipeline processing that can be performed efficiently as a whole can be specifically calculated.

The pipeline arithmetic device according to the above aspect may have a structure in which: the priority variable calculation unit calculates a product of the node processing time of the node and the accumulated message amount as a priority variable of the node.

According to the above configuration, an idle state in which a node operates due to waiting for a message input does not occur, and deterioration of the operation efficiency of the entire pipeline can be suppressed.

The pipeline arithmetic device according to the above aspect may have a structure in which: the priority variable calculation unit generates the node processing time for calculating the priority variable of the node based on a plurality of the node processing times of the node from the past acquired by the node monitoring unit.

According to the above configuration, it is possible to prevent extreme allocation of the operation time of each node due to a burst event.

The pipeline arithmetic device according to the above aspect may have a structure in which: the calculation unit further includes a merging monitoring unit that acquires, from the queue monitoring unit, a node upstream of a merging point of a plurality of partial pipelines among the pipelines, and a correction coefficient calculation unit, and the accumulated message amounts of the reception queues belonging to the front stages of the nodes of the mutually different partial pipelines are calculated to be unbalanced, the correction coefficient calculation section, for a node belonging to any one of the mutually different partial pipelines, a correction coefficient is calculated based on the degree of imbalance, and when the correction coefficient is calculated for the node, the running time is assigned according to a value obtained by multiplying the priority variable by the correction coefficient.

According to the configuration, even in the pipeline having the confluence, the pipeline processing can be reliably and efficiently performed as a whole.

The pipeline arithmetic device according to the above aspect may have a structure in which: the calculation unit further includes a memory monitoring unit that notifies the correction coefficient calculation unit when an empty capacity of a memory that stores the accumulated messages of the reception queue is smaller than a predetermined value, the correction coefficient calculation unit that, when the notification is received, assigns a correction coefficient larger than 1 to the node belonging to a pipe that has a shorter time or less branches until the message processing in the pipe is completed among the plurality of pipes, and the time allocation unit that, when the correction coefficient is assigned to the node, allocates the operation time based on a value obtained by multiplying the priority variable by the correction coefficient.

According to the above configuration, when the free capacity of the memory is reduced, the message accumulated in the arithmetic unit can be reduced, and the occurrence of a situation in which the memory resource is insufficient can be suppressed.

A programmable logic controller of an aspect of the present invention is a programmable logic controller including a pipeline arithmetic device of the aspect.

According to the structure, the user can easily construct the following FA system, that is: the data collection function is improved in performance, and the analysis result of the collected data is reflected in the control of various controlled devices.

The execution method of pipeline processing of an aspect of the present invention executes pipeline processing by at least one pipeline, which is formed by connecting a plurality of nodes via a receive queue, and includes the steps of: acquiring node processing time, wherein the node processing time is the time required by processing a message at the node; acquiring the accumulated message amount in the receiving queue; calculating a priority variable of the node based on at least the node processing time of the node and the accumulated message amount of a receive queue of a front stage of the node; and allocating operation time to each node according to the priority variable of each node.

According to the structure, an improved pipeline operation processing is realized, overflow of the receive queue is prevented, and further pipeline processing can be performed efficiently as a whole.

The present invention is not limited to the above embodiments, and various modifications can be made within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments are also included in the technical scope of the present invention.

Description of the symbols

110. 210, 510, 610, 710: pipeline computing device

120. 220, 520, 620, 720: arithmetic unit

121. 321, 421, 521, 522: pipeline

130. 330, 430, 432, 530, 532, Input: input node

140. 340, 440, 442, 444, 540, 542, Logic: logical node

150. 350, 352, 450, 550, 552, Output: output node

141. 151, 341, 351, 353, 441, 443, 445, 451, 541, 543, 551, 553: receive queue

160. 260, 560, 660, 760: control unit

161. 561, 661, 761: node monitoring unit

162. 562, 662, 762: queue monitoring unit

163. 563, 663, 763: priority variable calculating part

164. 564, 664, 764: time distribution unit

665: confluence monitoring section

566. 666: correction coefficient calculation unit

567: memory monitoring unit

768: statistic value calculating unit

770: recording unit

200: programmable logic controller

201. 202: data file

203. 204: applications of

11: data server

12: database with a plurality of databases

13: cloud server

14. 15: machine tool

T, Ti, Tia, Tib, Tn, Tna, Tnb, Tn2, To, Toa, Tob: node processing time

Q, Qi, Qia, Qib, Qn, Qna, Qnb, Qn2, Qo, Qoa, Qob: accumulating message count

PRI, PRIi, PRIia, PRIib, priin, PRIna, PRInb, priin 2, priio, priioa, priiob: priority variable