阅读说明：本技术 一种基于衰减器的增益可变低噪声放大器 (Variable gain low noise amplifier based on attenuator ) 是由 吴昊 陶继青 史昕宇 傅海鹏 于 2021-10-18 设计创作，主要内容包括：本发明提供了一种基于衰减器的增益可变低噪声放大器,包括：放大电路、匹配电路、第一衰减器、第二衰减器；放大电路的第一端为低噪声放大器的信号输入端,放大电路第二端与匹配电路第一端连接,匹配电路第二端与第一衰减器第一端连接,第一衰减器的第二端与第二衰减器的第一端连接,第二衰减器的第二端为低噪声放大器的信号输出端。本发明所述的一种基于衰减器的增益可变低噪声放大器,基于衰减器结构及栅极电感可以有效提升低噪声放大器工作带宽,增强隔离度,提高线性度；通过匹配电路实现较好的噪声性能；通过衰减器结构可以实现增益可调,从而可以应用到5G N77频段。(The invention provides an attenuator-based gain-variable low-noise amplifier, which comprises: the circuit comprises an amplifying circuit, a matching circuit, a first attenuator and a second attenuator; the first end of the amplifying circuit is a signal input end of the low noise amplifier, the second end of the amplifying circuit is connected with the first end of the matching circuit, the second end of the matching circuit is connected with the first end of the first attenuator, the second end of the first attenuator is connected with the first end of the second attenuator, and the second end of the second attenuator is a signal output end of the low noise amplifier. According to the attenuator-based gain-variable low-noise amplifier, the working bandwidth of the low-noise amplifier can be effectively increased, the isolation degree is enhanced, and the linearity is improved based on the attenuator structure and the grid inductor; better noise performance is realized through a matching circuit; the attenuator structure can realize adjustable gain, thereby being applied to 5G N77 frequency band.)

1. An attenuator-based gain-variable low noise amplifier, characterized by: the method comprises the following steps: the circuit comprises an amplifying circuit, a matching circuit, a first attenuator and a second attenuator;

the first end of the amplifying circuit is a signal input end of the low noise amplifier, the second end of the amplifying circuit is connected with the first end of the matching circuit, the second end of the matching circuit is connected with the first end of the first attenuator, the second end of the first attenuator is connected with the first end of the second attenuator, and the second end of the second attenuator is a signal output end of the low noise amplifier;

the first attenuator comprises a second resistor R2, a third resistor R3, a fourth resistor R4, a fourth transistor Q4 and a fifth transistor Q5, wherein the first end of the first attenuator is connected with the first end of the second resistor R2 and the drain of the fourth transistor Q4, the second end of the second resistor R2, the first end of the third resistor R3 and the first end of the fourth resistor R4 are connected, the second end of the fourth resistor R4 is connected with the drain of the fifth transistor Q5, the source of the fifth transistor Q5 is grounded, and the second end of the first attenuator is connected with the second end of the third resistor R3 and the source of the fourth transistor Q4;

the gate of the fourth transistor Q4 is connected to a first digitally controlled level VG1, and the gate of the fifth transistor Q5 is connected to a second digitally controlled level VG 2;

the second attenuator consists of a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8, wherein the first end of the second attenuator is connected with the second end of the first attenuator, the first end of the fifth resistor R5, the drain of the sixth transistor Q6 and the first end of the sixth resistor R6, the second end of the sixth resistor R6 is grounded through the seventh transistor Q7, the second end of the second attenuator is the output end of the low noise amplifier, the second end of the second attenuator is connected with the second end of the fifth resistor R5, the first end of the seventh resistor R7 and the source end of the sixth transistor Q6, and the second end of the seventh resistor R7 is grounded through the eighth transistor Q8;

the gate of the sixth transistor Q6 is connected to a third digitally controlled level VG3, the gates of the seventh transistor Q7 and the eighth transistor Q8 are both connected to a fourth digitally controlled level VG4, and the source of the seventh transistor Q7 and the source of the eighth transistor Q8 are grounded, respectively.

2. The attenuator-based variable gain low noise amplifier of claim 1, wherein: the amplifying circuit includes: a first capacitor C1, a second capacitor C2, a fifth capacitor C5, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first resistor R1, a first inductor L1 and a third inductor L3;

a first end of the first capacitor C1 is a signal input end of a low noise amplifier, and a second end of the first capacitor C1 is respectively connected with a gate of the first transistor Q1 and a first end of the first resistor R1;

a first end of the second capacitor C2 is connected to the second end of the first resistor R1 and the gate of a third transistor Q3, a second end of the second capacitor C2 is grounded, a drain of the third transistor Q3 is connected to a current source, a drain of the third transistor Q3 is connected to the gate, and a source of the third transistor Q3 is grounded;

the grid of the second transistor Q2 is connected with the first end of a fifth capacitor C5 and the first end of a third inductor L3 respectively, the second end of the fifth capacitor C5 is grounded, the second end of the third inductor L3 is connected with a second power supply voltage VB2, the drain of the second transistor Q2 is connected with the first power supply voltage VB1 through the first inductor L1, the source of the second transistor Q2 is connected with the drain of the first transistor Q1, and the source of the first transistor Q1 is grounded.

3. The attenuator-based variable gain low noise amplifier of claim 2, wherein: the matching circuit comprises a third capacitor C3, a fourth capacitor C4 and a second inductor L2, wherein the first end of the third capacitor C3, the first end of the second inductor L2 and the first end of the fourth capacitor C4 are connected, the first end of the third capacitor C3 is respectively connected with the first end of the first inductor L1 and the drain of the second transistor Q2, the second end of the third capacitor C3 is output by a low-noise amplifier, the second end of the third capacitor C3 is connected with the drain of the second transistor Q2, the second end of the second inductor L2 is grounded, and the second end of the fourth capacitor C4 is connected with the first end of the first attenuator.

Technical Field

The invention belongs to the field of integrated circuits, and particularly relates to a gain-variable low-noise amplifier based on an attenuator.

Background

With the advancement of the fifth generation mobile communication technology, in order to meet the requirements of high data transmission rate and high user density, and to realize large-scale connection, high reliability, and low delay communication, the communication base station performs, on the core component of the reception link: low noise amplifiers put higher demands on the system. The original low noise amplifier is generally limited by factors such as narrow bandwidth, low linearity, and invariable gain, and is difficult to apply to 5G communication.

In order to overcome the above problems, a low noise amplifier with wide bandwidth, high linearity and adjustable gain is urgently needed, and the fifth generation mobile communication technology is promoted to be widely popularized.

Disclosure of Invention

In view of the above, the present invention is directed to a variable gain low noise amplifier based on an attenuator, so as to solve the problems of narrow bandwidth, low linearity and invariable gain of the low noise amplifier.

In order to achieve the purpose, the technical scheme of the invention is realized as follows:

an attenuator-based variable gain low noise amplifier comprising: the circuit comprises an amplifying circuit, a matching circuit, a first attenuator and a second attenuator;

the first end of the amplifying circuit is a signal input end of the low noise amplifier, the second end of the amplifying circuit is connected with the first end of the matching circuit, the second end of the matching circuit is connected with the first end of the first attenuator, the second end of the first attenuator is connected with the first end of the second attenuator, and the second end of the second attenuator is a signal output end of the low noise amplifier;

further, the amplifying circuit includes: a first capacitor C1, a second capacitor C2, a fifth capacitor C5, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first resistor R1, a first inductor L1 and a third inductor L3;

a first end of the first capacitor C1 is a signal input end of the low noise amplifier, and a second end thereof is respectively connected to the gate of the first transistor Q1 and the first end of the first resistor R1.

A first end of the second capacitor C2 is connected to the second end of the first resistor R1 and the gate of a third transistor Q3, a second end of the second capacitor C2 is grounded, a drain of the third transistor Q3 is connected to a current source, a drain of the third transistor Q3 is connected to the gate, and a source of the third transistor Q3 is grounded;

the grid of the second transistor Q2 is connected with the first end of a fifth capacitor C5 and the first end of a third inductor L3 respectively, the second end of the fifth capacitor C5 is grounded, the second end of the third inductor L3 is connected with a second power supply voltage VB2, the drain of the second transistor Q2 is connected with the first power supply voltage VB1 through the first inductor L1, the source of the second transistor Q2 is connected with the drain of the first transistor Q1, and the source of the first transistor Q1 is grounded.

Further, the matching circuit includes a third capacitor C3, a fourth capacitor C4, and a second inductor L2, the first end of the third capacitor C3, the first end of the second inductor L2, and the first end of the fourth capacitor C4 are connected, the first end of the third capacitor C3 is connected to the first end of the first inductor L1 and the drain of the second transistor Q2, the second end of the third capacitor C3 is a low noise amplifier output, the second end of the third capacitor C3 is connected to the drain of the second transistor Q2, the second end of the second inductor L2 is grounded, and the second end of the fourth capacitor C4 is connected to the first end of the first attenuator.

Further, the first attenuator comprises a second resistor R2, a third resistor R3, a fourth resistor R4, a fourth transistor Q4 and a fifth transistor Q5, a first end of the first attenuator is connected to a first end of the second resistor R2 and a drain of the fourth transistor Q4, a second end of the second resistor R2, a first end of the third resistor R3 and a first end of the fourth resistor R4 are connected, a second end of the fourth resistor R4 is connected to a drain of the fifth transistor Q5, a source of the fifth transistor Q5 is grounded, and a second end of the first attenuator is connected to a second end of the third resistor R3 and a source of the fourth transistor Q4;

the gate of the fourth transistor Q4 is connected to a first digitally controlled level VG1 and the gate of the fifth transistor Q5 is connected to a second digitally controlled level VG 2.

Further, the second attenuator is composed of a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8, a first end of the second attenuator is connected to the second end of the first attenuator, the first end of the fifth resistor R5, the drain of the sixth transistor Q6 and the first end of the sixth resistor R6, a second end of the sixth resistor R6 is connected to the ground through the seventh transistor Q7, a second end of the second attenuator is an output end of the low noise amplifier, and is connected to the second end of the fifth resistor R5, the first end of the seventh resistor R7 and the source end of the sixth transistor Q6, and a second end of the seventh resistor R7 is connected to the ground through the eighth transistor Q8;

the gate of the sixth transistor Q6 is connected to a third digitally controlled level VG3, the gates of the seventh transistor Q7 and the eighth transistor Q8 are both connected to a fourth digitally controlled level VG4, and the source of the seventh transistor Q7 and the source of the eighth transistor Q8 are grounded, respectively.

Compared with the prior art, the gain variable low noise amplifier based on the attenuator has the following beneficial effects:

according to the attenuator-based gain-variable low-noise amplifier, the working bandwidth of the low-noise amplifier can be effectively increased, the isolation degree is enhanced, and the linearity is improved based on the attenuator structure and the grid inductor; better noise performance is realized through a matching circuit; the attenuator structure can realize adjustable gain, thereby being applied to 5G N77 frequency band.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:

fig. 1 is a circuit diagram of an attenuator-based gain-variable low noise amplifier according to an embodiment of the present invention.

Detailed Description

It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.

The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.

As shown in FIG. 1, the attenuator-based gain variable low noise amplifier comprises an amplifying circuit, a matching circuit, a first attenuator and a second attenuator;

the first end of the amplifying circuit is a signal input end of the low noise amplifier, the second end of the amplifying circuit is connected with the first end of the matching circuit, the second end of the matching circuit is connected with the first end of the first attenuator, the second end of the first attenuator is connected with the first end of the second attenuator, and the second end of the second attenuator is a signal output end of the low noise amplifier;

the amplifying circuit includes: a first capacitor C1, a second capacitor C2, a fifth capacitor C5, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first resistor R1, a first inductor L1 and a third inductor L3;

a first end of the first capacitor C1 is a signal input end of the low noise amplifier, and a second end thereof is respectively connected to the gate of the first transistor Q1 and the first end of the first resistor R1.

A first end of the second capacitor C2 is connected to the second end of the first resistor R1 and the gate of a third transistor Q3, a second end of the second capacitor C2 is grounded, a drain of the third transistor Q3 is connected to a current source, a drain of the third transistor Q3 is connected to the gate, and a source of the third transistor Q3 is grounded;

the grid of the second transistor Q2 is connected with the first end of a fifth capacitor C5 and the first end of a third inductor L3 respectively, the second end of the fifth capacitor C5 is grounded, the second end of the third inductor L3 is connected with a second power supply voltage VB2, the drain of the second transistor Q2 is connected with the first power supply voltage VB1 through the first inductor L1, the source of the second transistor Q2 is connected with the drain of the first transistor Q1, and the source of the first transistor Q1 is grounded.

The matching circuit comprises a third capacitor C3, a fourth capacitor C4 and a second inductor L2, wherein the first end of the third capacitor C3, the first end of the second inductor L2 and the first end of the fourth capacitor C4 are connected, the second end of the third capacitor C3 is connected with the drain of the second transistor Q2, the second end of the second inductor L2 is grounded, and the second end of the fourth capacitor C4 is connected with the first end of the first attenuator;

the first end of the third capacitor C3 is connected to the first end of the first inductor L1 and the drain of the second transistor Q2, respectively, and the second end of the third capacitor C3 is the output of the low noise amplifier.

The first attenuator comprises a second resistor R2, a third resistor R3, a fourth resistor R4, a fourth transistor Q4 and a fifth transistor Q5, wherein the first end of the first attenuator is connected with the first end of the second resistor R2 and the drain of the fourth transistor Q4, the second end of the second resistor R2, the first end of the third resistor R3 and the first end of the fourth resistor R4 are connected, the second end of the fourth resistor R4 is connected with the drain of the fifth transistor Q5, the source of the fifth transistor Q5 is grounded, and the second end of the first attenuator is connected with the second end of the third resistor R3 and the source of the fourth transistor Q4;

the gate of the fourth transistor Q4 is connected to a first digitally controlled level VG1 and the gate of the fifth transistor Q5 is connected to a second digitally controlled level VG 2.

The second attenuator consists of a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8, wherein the first end of the second attenuator is connected with the second end of the first attenuator, the first end of the fifth resistor R5, the drain of the sixth transistor Q6 and the first end of the sixth resistor R6, the second end of the sixth resistor R6 is grounded through the seventh transistor Q7, the second end of the second attenuator is the output end of the low noise amplifier, the second end of the second attenuator is connected with the second end of the fifth resistor R5, the first end of the seventh resistor R7 and the source end of the sixth transistor Q6, and the second end of the seventh resistor R7 is grounded through the eighth transistor Q8;

the gate of the sixth transistor Q6 is connected to a third digitally controlled level VG3, the gates of the seventh transistor Q7 and the eighth transistor Q8 are both connected to a fourth digitally controlled level VG4, and the source of the seventh transistor Q7 and the source of the eighth transistor Q8 are grounded, respectively.

The second capacitor C2 is a filter capacitor, and the third transistor Q3 is a current mirror transistor; the second capacitor C2 is used for filtering noise, and the third transistor Q3 is used for determining the current level of the low noise amplifier. The first inductor, the second inductor, the third capacitor and the fourth capacitor are determined according to the working frequency of the low noise amplifier and the size of the parasitic capacitor of the common grid drain terminal.

The third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, the seventh transistor Q7 and the eighth transistor Q8 in the first attenuator and the second attenuator are determined according to the gain requirement of the low noise amplifier.

The specific implementation is as follows:

as shown in fig. 1, the third transistor Q3 determines the current level of the circuit, and when selecting the bias, the first transistor Q1 and the second transistor Q2 are operated in the saturation region, and the bias is adjusted according to the optimal current density; then, optimally adjusting the bias voltage of the common-gate transistor according to the linearity; then, input end and output end matching is carried out: firstly, the input impedance is matched to 50 ohms during matching, secondly, the resistances of the first attenuator and the second attenuator are adjusted, the output impedance is matched to 50 ohms, and finally, the noise and the gain are balanced.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.