阅读说明：本技术 驱动电路、驱动器以及电机装置 (Drive circuit, driver and motor device ) 是由 陈毅东 雷子健 刘振 闵渭兴 招青钦 于 2021-08-27 设计创作，主要内容包括：本申请公开了驱动电路、驱动器以及电机装置,通过当驱动电机处于非工作状态时,输入待机信号至主控模块,使主控模块分别输出第一休眠信号至驱动模块和输出第二休眠信号至反馈模块,以使驱动模块在输入第一休眠信号的作用下断电并停止输出第一脉冲信号至驱动电机,反馈模块在输入第二休眠信号的作用下断电并停止将驱动电机的工作电压反馈至主控模块；因此使驱动模块和反馈模块在驱动电机处于非工作状态时均处于断电状态,不会产生耗能,降低了驱动电路在驱动电机处于非工作状态下的耗能。(The application discloses a driving circuit, a driver and a motor device, when a driving motor is in a non-working state, a standby signal is input to a main control module, the main control module is enabled to output a first dormancy signal to the driving module and output a second dormancy signal to a feedback module respectively, so that the driving module is powered off under the action of inputting the first dormancy signal and stops outputting a first pulse signal to the driving motor, and the feedback module is powered off under the action of inputting the second dormancy signal and stops feeding back the working voltage of the driving motor to the main control module; therefore, the driving module and the feedback module are both in a power-off state when the driving motor is in a non-working state, energy consumption is avoided, and energy consumption of the driving circuit when the driving motor is in the non-working state is reduced.)

1. A drive circuit for driving a motor, comprising:

the main control module is configured to receive an external standby signal when the main control module is powered on and works, and output a first sleep signal and a second sleep signal when the standby signal is input;

the driving module is connected with the main control module and is configured to be powered off when the first dormancy signal is input and stop outputting a first pulse signal to the driving motor; and

and the feedback module is connected with the main control module and is configured to be powered off when the second dormancy signal is input and stop feeding back the working voltage of the driving motor to the main control module.

2. The drive circuit of claim 1, wherein the master control module comprises a master control component and a voltage regulation component;

the voltage stabilizing component is configured to step down a first input voltage to generate an internal voltage;

the main control assembly is connected with the voltage stabilizing assembly, is configured to work according to the internal voltage in a power-on mode, and outputs the first sleep signal and the second sleep signal when the standby signal is input;

correspondingly, the feedback module is respectively connected with the main control assembly and the voltage stabilizing assembly, and is configured to stop working according to the internal voltage when the second sleep signal is input, stop detecting the working voltage of the driving motor, and stop outputting the detection voltage to the main control assembly according to the working voltage.

3. The drive circuit according to claim 2, wherein the first pulse signal includes a first pulse voltage and a second pulse voltage;

the driving module is further configured to detect a first current generated when the first pulse voltage acts on the driving motor, detect a second current generated when the second pulse voltage acts on the driving motor, and output a fault signal and power off when the first current is greater than a first preset current and/or the second current is greater than a second preset current;

the master control assembly is further configured to respond according to the fault signal.

4. The driving circuit of claim 3, wherein the driving module is specifically configured to power on and operate according to an input second input voltage, and output the fault signal and power off when the second input voltage is less than a preset voltage; and detecting the working temperature of the driving module, and outputting the fault signal and powering off when the working temperature is higher than a preset temperature.

5. The driving circuit of claim 2, wherein the voltage regulation component comprises a linear voltage regulation chip, a first capacitor, a second capacitor, and a third capacitor;

the input end of the linear voltage-stabilizing chip, the first end of the first capacitor and the first end of the second capacitor are connected in common and connected to a first input voltage input end of the voltage-stabilizing component, and the first input voltage input end of the voltage-stabilizing component is used for inputting the first input end;

the output end of the linear voltage stabilizing chip is connected with the first end of the third capacitor and is connected to the internal voltage output end of the voltage stabilizing component, and the internal voltage output end of the voltage stabilizing component is used for outputting the internal voltage;

and the second end of the first capacitor, the second end of the second capacitor, the second end of the third capacitor and the grounding end of the linear voltage stabilizing chip are all connected with a power ground.

6. The drive circuit of claim 4, wherein the master control component comprises a master control chip;

the power supply end of the main control chip is connected to the internal voltage input end of the main control assembly, and the internal voltage input end of the main control assembly is used for inputting the internal voltage; the first universal input end of the main control chip is connected to the standby signal input end of the main control assembly, and the standby signal input end of the main control assembly is used for inputting the standby signal; the first general output end of the main control chip is connected to the first dormancy signal output end of the main control assembly, and the first dormancy signal output end of the main control assembly is used for outputting the first dormancy signal; the second general output end of the main control chip is connected to the second dormancy signal output end of the main control assembly, and the second dormancy signal output end of the main control assembly is used for outputting the second dormancy signal; the second universal input end of the main control chip is connected to the fault signal input end of the main control assembly, and the fault signal input end of the main control assembly is used for inputting the fault signal; the third universal input end of the main control chip is connected to the detection voltage input end of the main control assembly, and the detection voltage input end of the main control assembly is used for inputting the detection voltage; the third general output end of the main control chip is connected to the response signal output end of the main control assembly, and the response signal output end of the main control assembly is used for outputting a response signal; the second pulse first output end of the main control chip and the second pulse second output end of the main control chip are shared for outputting a second pulse signal; the third pulse first output end of the main control chip and the third pulse second output end of the main control chip are shared for outputting a third pulse signal; and the grounding end of the main control chip is connected with a power ground.

7. The driving circuit according to claim 4, wherein the driving module comprises a driving chip, a first diode, a first resistor, a second resistor, a fourth capacitor, and a fifth capacitor;

the anode of the first diode is connected to a second input voltage input end of the driving module, and the second input voltage input end of the driving module is used for inputting the second input voltage; the power end of the driving chip, the first end of the fourth capacitor and the cathode of the first diode are connected in common; the grid energy storage end of the driving chip is connected with the second end of the fourth capacitor; the grounding end of the driving chip is connected with a power ground; the first output end of the driving chip is connected to the first output end of the first pulse voltage of the driving module, the second output end of the driving chip is connected to the second output end of the first pulse voltage of the driving module, and the first output end of the first pulse voltage of the driving module and the second output end of the first pulse voltage of the driving module are jointly used for outputting the second pulse voltage; the third output end of the driving chip is connected to the first output end of the second pulse voltage of the driving module, the fourth output end of the driving chip is connected to the second output end of the second pulse voltage of the driving module, and the first output end of the second pulse voltage of the driving module and the second output end of the second pulse voltage of the driving module are jointly used for outputting the second pulse voltage; the first input end of the driving chip is connected to the first input end of the second pulse signal of the driving module, the second input end of the driving chip is connected to the second input end of the second pulse signal of the driving module, and the first input end of the second pulse signal of the driving module and the second input end of the second pulse signal of the driving module share the same signal and are used for inputting the second pulse signal; the third input end of the driving chip is connected to the first input end of the third pulse signal of the driving module, the fourth input end of the driving chip is connected to the second input end of the third pulse signal of the driving module, and the first input end of the third pulse signal of the driving module and the second input end of the third pulse signal of the driving module share the same signal for inputting the third pulse signal; the error output end of the driving chip is connected to the fault signal output end of the driving module, and the fault signal output end of the driving module is used for outputting the fault signal; the first detection end of the driving chip is connected with the first end of the first resistor, the second end of the first resistor is connected with a power ground, and the first detection end of the driving chip is used for inputting the first current; a second detection end of the driving chip is connected with a first end of the second resistor, a second end of the second resistor is connected with a power ground, and the second detection end of the driving chip is used for inputting the second current; the internal rectifying end of the driving chip is connected with the first end of the fifth capacitor; the sleep end of the driving chip is connected to a first sleep signal input end of the driving module, and the first sleep signal input end of the driving module is used for inputting the first sleep signal; and the second end of the fifth capacitor is connected with the power ground.

8. The driving circuit of claim 1, wherein the feedback module comprises a third resistor, a fourth resistor, a fifth resistor, a sixth capacitor, a seventh capacitor, a second diode, a first field effect transistor, a second field effect transistor, and an operational amplifier;

the anode of the second diode is connected to a second sleep signal input end of the feedback module, and the second sleep signal input end of the feedback module is used for inputting the second sleep signal; the cathode of the second diode, the first end of the third resistor and the base of the first field effect transistor are connected in common; the collector of the first field effect transistor, the first end of the fourth resistor and the grid of the second field effect transistor are connected in common; the second end of the fourth resistor, the source electrode of the second field effect transistor and the first end of the sixth capacitor are connected in common and connected to an internal voltage input end of the feedback module, and the internal voltage input end of the feedback module is used for inputting the internal voltage; the drain electrode of the second field effect transistor is connected with the power supply end of the operational amplifier; the output end of the operational amplifier is connected with the first end of the fifth resistor; a second end of the fifth resistor is connected with a second end of the seventh capacitor and connected to a detection voltage output end of the feedback module, and the detection voltage output end of the feedback module is used for outputting the detection voltage; the non-inverting input end of the operational amplifier is connected to a reference voltage source; the inverting input end of the operational amplifier is connected to the working voltage input end of the feedback module, and the working voltage input end of the feedback module is used for inputting the working voltage; and the grounding end of the operational amplifier, the second end of the third resistor, the second end of the sixth capacitor and the second end of the seventh capacitor are all connected with a power ground.

9. A driver comprising a driver circuit as claimed in any one of claims 1 to 8.

10. A motor apparatus comprising a drive motor and a drive circuit according to any one of claims 1 to 8;

the driving motor is connected with the driving circuit and is configured to act according to the first pulse signal.

Technical Field

The application belongs to the technical field of electronic circuits, and particularly relates to a driving circuit, a driver and a motor device.

Background

The traditional motor driving mode is as follows: whether the motor works or not, the whole driving circuit is in a power-on working state, and therefore the whole energy consumption of the driving circuit is increased when the motor is not in the working state.

Disclosure of Invention

The application aims to provide a driving circuit, and aims to solve the problem that energy consumption of a traditional driving circuit is increased when a motor is not in a working state.

A first aspect of embodiments of the present application provides a driving circuit for driving a motor, including:

the main control module is configured to receive an external standby signal when the main control module is powered on and works, and output a first sleep signal and a second sleep signal when the standby signal is input;

the driving module is connected with the main control module and is configured to be powered off when the first dormancy signal is input and stop outputting a first pulse signal to the driving motor; and

and the feedback module is connected with the main control module and is configured to be powered off when the second dormancy signal is input and stop feeding back the working voltage of the driving motor to the main control module.

In one embodiment, the main control module comprises a main control assembly and a voltage stabilizing assembly;

the voltage stabilizing component is configured to step down a first input voltage to generate an internal voltage;

the main control assembly is connected with the voltage stabilizing assembly, is configured to work according to the internal voltage in a power-on mode, and outputs the first sleep signal and the second sleep signal when the standby signal is input;

correspondingly, the feedback module is respectively connected with the main control assembly and the voltage stabilizing assembly, and is configured to stop working according to the internal voltage when the second sleep signal is input, stop detecting the working voltage of the driving motor, and stop outputting the detection voltage to the main control assembly according to the working voltage.

In one embodiment, the first pulse signal includes a first pulse voltage and a second pulse voltage;

the driving module is further configured to detect a first current generated when the first pulse voltage acts on the driving motor, detect a second current generated when the second pulse voltage acts on the driving motor, and output a fault signal and power off when the first current is greater than a first preset current and/or the second current is greater than a second preset current;

the master control assembly is further configured to respond according to the fault signal.

In one embodiment, the driving module is specifically configured to power on and operate according to an input second input voltage, and output the fault signal and power off when the second input voltage is less than a preset voltage; and detecting the working temperature of the driving module, and outputting the fault signal and powering off when the working temperature is higher than a preset temperature.

In one embodiment, the voltage stabilizing component includes a linear voltage stabilizing chip, a first capacitor, a second capacitor, and a third capacitor;

the input end of the linear voltage-stabilizing chip, the first end of the first capacitor and the first end of the second capacitor are connected in common and connected to a first input voltage input end of the voltage-stabilizing component, and the first input voltage input end of the voltage-stabilizing component is used for inputting the first input end;

the output end of the linear voltage stabilizing chip is connected with the first end of the third capacitor and is connected to the internal voltage output end of the voltage stabilizing component, and the internal voltage output end of the voltage stabilizing component is used for outputting the internal voltage;

and the second end of the first capacitor, the second end of the second capacitor, the second end of the third capacitor and the grounding end of the linear voltage stabilizing chip are all connected with a power ground.

In one embodiment, the main control assembly comprises a main control chip;

the power supply end of the main control chip is connected to the internal voltage input end of the main control assembly, and the internal voltage input end of the main control assembly is used for inputting the internal voltage; the first universal input end of the main control chip is connected to the standby signal input end of the main control assembly, and the standby signal input end of the main control assembly is used for inputting the standby signal; the first general output end of the main control chip is connected to the first dormancy signal output end of the main control assembly, and the first dormancy signal output end of the main control assembly is used for outputting the first dormancy signal; the second general output end of the main control chip is connected to the second dormancy signal output end of the main control assembly, and the second dormancy signal output end of the main control assembly is used for outputting the second dormancy signal; the second universal input end of the main control chip is connected to the fault signal input end of the main control assembly, and the fault signal input end of the main control assembly is used for inputting the fault signal; the third universal input end of the main control chip is connected to the detection voltage input end of the main control assembly, and the detection voltage input end of the main control assembly is used for inputting the detection voltage; the third general output end of the main control chip is connected to the response signal output end of the main control assembly, and the response signal output end of the main control assembly is used for outputting a response signal; the second pulse first output end of the main control chip and the second pulse second output end of the main control chip are shared for outputting a second pulse signal; the third pulse first output end of the main control chip and the third pulse second output end of the main control chip are shared for outputting a third pulse signal; and the grounding end of the main control chip is connected with a power ground.

In one embodiment, the driving module includes a driving chip, a first diode, a first resistor, a second resistor, a fourth capacitor, and a fifth capacitor;

the anode of the first diode is connected to a second input voltage input end of the driving module, and the second input voltage input end of the driving module is used for inputting the second input voltage; the power end of the driving chip, the first end of the fourth capacitor and the cathode of the first diode are connected in common; the grid energy storage end of the driving chip is connected with the second end of the fourth capacitor; the grounding end of the driving chip is connected with a power ground; the first output end of the driving chip is connected to the first output end of the first pulse voltage of the driving module, the second output end of the driving chip is connected to the second output end of the first pulse voltage of the driving module, and the first output end of the first pulse voltage of the driving module and the second output end of the first pulse voltage of the driving module are jointly used for outputting the second pulse voltage; the third output end of the driving chip is connected to the first output end of the second pulse voltage of the driving module, the fourth output end of the driving chip is connected to the second output end of the second pulse voltage of the driving module, and the first output end of the second pulse voltage of the driving module and the second output end of the second pulse voltage of the driving module are jointly used for outputting the second pulse voltage; the first input end of the driving chip is connected to the first input end of the second pulse signal of the driving module, the second input end of the driving chip is connected to the second input end of the second pulse signal of the driving module, and the first input end of the second pulse signal of the driving module and the second input end of the second pulse signal of the driving module share the same signal and are used for inputting the second pulse signal; the third input end of the driving chip is connected to the first input end of the third pulse signal of the driving module, the fourth input end of the driving chip is connected to the second input end of the third pulse signal of the driving module, and the first input end of the third pulse signal of the driving module and the second input end of the third pulse signal of the driving module share the same signal for inputting the third pulse signal; the error output end of the driving chip is connected to the fault signal output end of the driving module, and the fault signal output end of the driving module is used for outputting the fault signal; the first detection end of the driving chip is connected with the first end of the first resistor, the second end of the first resistor is connected with a power ground, and the first detection end of the driving chip is used for inputting the first current; a second detection end of the driving chip is connected with a first end of the second resistor, a second end of the second resistor is connected with a power ground, and the second detection end of the driving chip is used for inputting the second current; the internal rectifying end of the driving chip is connected with the first end of the fifth capacitor; the sleep end of the driving chip is connected to a first sleep signal input end of the driving module, and the first sleep signal input end of the driving module is used for inputting the first sleep signal; and the second end of the fifth capacitor is connected with the power ground.

In one embodiment, the feedback module includes a third resistor, a fourth resistor, a fifth resistor, a sixth capacitor, a seventh capacitor, a second diode, a first field effect transistor, a second field effect transistor, and an operational amplifier;

the anode of the second diode is connected to a second sleep signal input end of the feedback module, and the second sleep signal input end of the feedback module is used for inputting the second sleep signal; the cathode of the second diode, the first end of the third resistor and the base of the first field effect transistor are connected in common; the collector of the first field effect transistor, the first end of the fourth resistor and the grid of the second field effect transistor are connected in common; the second end of the fourth resistor, the source electrode of the second field effect transistor and the first end of the sixth capacitor are connected in common and connected to an internal voltage input end of the feedback module, and the internal voltage input end of the feedback module is used for inputting the internal voltage; the drain electrode of the second field effect transistor is connected with the power supply end of the operational amplifier; the output end of the operational amplifier is connected with the first end of the fifth resistor; a second end of the fifth resistor is connected with a second end of the seventh capacitor and connected to a detection voltage output end of the feedback module, and the detection voltage output end of the feedback module is used for outputting the detection voltage; the non-inverting input end of the operational amplifier is connected to a reference voltage source; the inverting input end of the operational amplifier is connected to the working voltage input end of the feedback module, and the working voltage input end of the feedback module is used for inputting the working voltage; and the grounding end of the operational amplifier, the second end of the third resistor, the second end of the sixth capacitor and the second end of the seventh capacitor are all connected with a power ground.

A second aspect of embodiments of the present application provides a driver including the driving circuit according to any one of the first aspect.

A third aspect of embodiments of the present application provides a motor apparatus including a drive motor and the drive circuit according to any one of the first aspect;

the driving motor is connected with the driving circuit and is configured to act according to the first pulse signal.

Compared with the prior art, the embodiment of the invention has the following beneficial effects: when the driving motor is in a non-working state, a standby signal is input to the main control module, the main control module respectively outputs a first dormancy signal to the driving module and outputs a second dormancy signal to the feedback module, so that the driving module is powered off under the action of inputting the first dormancy signal and stops outputting a first pulse signal to the driving motor, and the feedback module is powered off under the action of inputting the second dormancy signal and stops feeding back the working voltage of the driving motor to the main control module; therefore, the driving module and the feedback module are both in a power-off state when the driving motor is in a non-working state, energy consumption is avoided, and energy consumption of the driving circuit when the driving motor is in the non-working state is reduced.

Drawings

Fig. 1 is a first exemplary functional block diagram of a driving circuit provided in an embodiment of the present application;

fig. 2 is a schematic block diagram of a second example of a driving circuit provided in an embodiment of the present application;

fig. 3 is an exemplary circuit schematic diagram of a driving circuit according to an embodiment of the present disclosure.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

The driving circuit for driving the motor comprises a main control module, a driving module and a feedback module. When the driving motor needs to work, the main control module is powered on to work, and a second pulse signal and a third pulse signal are respectively output to the driving module when the main control module is powered on to work; the driving module outputs a first pulse signal to the driving motor according to the second pulse signal and the third pulse signal so that the driving motor works according to the first pulse signal; and meanwhile, when the main control module is electrified and operated, the feedback module is also electrified and operated, and when the feedback module is electrified and operated, the working voltage of the driving motor is fed back to the main control module, so that the main control module monitors the working condition of the driving motor according to the working voltage of the driving voltage.

Referring to fig. 1, an embodiment of the present application provides a driving circuit for driving a motor 200. The driving circuit includes a main control module 110, a driving module 120, and a feedback module 130.

The main control module 110 is configured to receive an external standby signal when powered on, and output a first sleep signal and a second sleep signal when the standby signal is input.

The driving module 120 is connected to the main control module 110, and is configured to power off when the first sleep signal is input, and stop outputting the first pulse signal to the driving motor 200.

And a feedback module 130 connected to the main control module 110 and configured to power off when the second sleep signal is input, and stop feeding back the operating voltage of the driving motor 200 to the main control module 110.

In this embodiment, when the driving motor 200 is not required to operate, that is, when the driving motor 200 is in a non-operating state, the external control device is operated to output a standby signal to the main control module 110. The main control module 110 respectively outputs a first sleep signal to the driving module 120 and a second sleep signal to the feedback module 130 when the standby signal is input. The driving module 120 is powered off and stops outputting the first pulse signal to the driving motor 200 under the action of inputting the first sleep signal; the feedback module 130 is powered off and stops feeding back the working voltage of the driving motor 200 to the main control module 110 under the action of inputting the second sleep signal; therefore, the driving module 120 and the feedback module 130 are both in the power-off state when the driving motor 200 stops working, and no energy consumption is generated, so that the energy consumption of the driving circuit when the driving motor 200 is in the non-working state is reduced.

The external control device can be a level signal output circuit formed by a key or a switch, and the level signal output circuit switches whether to output a standby signal according to external operation; wherein the standby signal can be high or low.

Referring to fig. 2, in an embodiment, the main control module 110 includes a main control component 112 and a voltage regulator component 111.

The voltage stabilizing component 111 is configured to step down the first input voltage to generate an internal voltage.

And a main control component 112 connected to the voltage stabilizing component 111, configured to perform power-on operation according to the internal voltage, and output a first sleep signal and a second sleep signal when the standby signal is input.

Accordingly, the feedback module 130 is respectively connected to the main control module 112 and the voltage regulator module 111, and configured to stop the power-on operation according to the internal voltage when the second sleep signal is input, stop detecting the operating voltage of the driving motor 200, and stop outputting the detected voltage to the main control module 112 according to the operating voltage.

In this embodiment, the voltage stabilizing component 111 steps down a first input voltage output by the external power source to generate an internal voltage, and outputs the internal voltage to the main control component 112 and the feedback module 130, so that the main control component 112 powers on according to the internal voltage and the feedback module 130 powers on according to the internal voltage. After the main control module 112 operates at the power-on state, when the main control module 112 inputs the standby signal, it respectively outputs the first sleep signal to the driving module 120 and outputs the second sleep signal to the feedback module 130, so that the driving module 120 and the feedback module 130 are both powered off and stop operating, and at this time, the internal voltage acting on the energy consumption components of the feedback module 130 is cut off, and therefore the internal voltage is not consumed on the feedback module 130, and the energy consumption of the feedback module 130 is reduced.

In one embodiment, the first pulse signal includes a first pulse voltage and a second pulse voltage.

The driving module 120 is further configured to detect a first current generated when the first pulse voltage is applied to the driving motor 200, detect a second current generated when the second pulse voltage is applied to the driving motor 200, and output a fault signal and power off when the first current is greater than a first preset current and/or the second current is greater than a second preset current.

The master control component 112 is further configured to respond according to the fault signal.

In the present embodiment, the first pulse signal includes a first pulse voltage and a second pulse voltage, and the first pulse voltage and the second pulse voltage supply power to both poles of the driving motor 200, respectively, so that the driving motor 200 operates according to the first pulse voltage and the second pulse voltage. The first pulse voltage generates a first current when applied to a first pole of the driving motor 200, and the second pulse voltage generates a second current when applied to a second pole of the driving motor 200. The driving module 120 detects the first current and the second current respectively, and outputs a fault signal to the main control module 112 when the first current is greater than the first preset current and/or the second current is greater than the second preset current, and powers off simultaneously. Therefore, when the first current and the second current of the driving motor 200 are abnormally increased, the driving module 120 feeds back the current abnormality problem of the driving motor 200 to the main control assembly 112, so as to monitor the operation state of the driving motor 200, and the driving module 120 is powered off when outputting a fault signal, so that the power supply to the driving motor 200 can be cut off, and the condition that the driving motor 200 is damaged due to abnormal working current is effectively avoided.

When the driving module 120 outputs the fault signal and is powered off at the same time, it can be understood that when the driving module 120 is in the power-on state, the driving module 120 stops outputting the fault signal (low level signal), and at this time, the driving module 120 outputs a high level signal; when the driving module 120 is in the power-off state, the driving module 120 outputs a fault signal (low level signal).

The main control module 112 may output an alarm signal when inputting a fault signal, or cut off its own power supply to stop working when inputting a fault signal, so as to respond to the fault signal.

In one embodiment, the driving module 120 is specifically configured to power on and operate according to the input second input voltage, and output a fault signal and power off when the second input voltage is less than a preset voltage; and detecting the operating temperature of the driving module 120, and outputting a fault signal and powering off when the operating temperature is greater than a preset temperature.

In this embodiment, the driving module 120 performs power-on operation according to a second input voltage output by the external power supply, and the driving module 120 detects the second input voltage, outputs a fault signal when the second input voltage is smaller than a preset voltage, and powers off when outputting the fault signal, so that whether the second input voltage meets the operation requirement of the driving module 120 can be detected, and the operation and the under-voltage state of the driving module 120 are avoided; meanwhile, the driving module 120 detects the working temperature of itself, and outputs a fault signal and powers off when the working temperature is higher than a preset temperature, so that the working temperature of the driving module 120 is monitored, and the driving module 120 is prevented from being damaged due to the fact that the driving module 120 works in an over-temperature state.

Referring to fig. 3, in an embodiment, the voltage regulator assembly 111 includes a linear voltage regulator chip U1, a first capacitor C1, a second capacitor C2, and a third capacitor C3.

The input terminal VIN of the linear regulator chip U1, the first terminal of the first capacitor C1, and the first terminal of the second capacitor C2 are commonly connected to the first input voltage VBAT input terminal of the regulator device 111, and the first input voltage VBAT input terminal of the regulator device 111 is used for inputting the first input terminal.

An output terminal VOUT of the linear regulator chip U1 is connected to the first terminal of the third capacitor C3 and is connected to an internal voltage output terminal of the voltage regulator assembly 111, and the internal voltage output terminal of the voltage regulator assembly 111 is used for outputting an internal voltage.

The second terminal of the first capacitor C1, the second terminal of the second capacitor C2, the second terminal of the third capacitor C3, and the ground GND1 of the linear regulator chip U1 are all connected to ground.

Referring to fig. 3, in one embodiment, the master assembly 112 includes a master chip U2.

The power supply terminal VDD of the main control chip U2 is connected to the internal voltage input terminal of the main control component 112, and the internal voltage input terminal of the main control component 112 is used for inputting an internal voltage; the first general input terminal PA1 of the master control chip U2 is connected to the input terminal of the standby signal CT1 of the master control module 112, and the input terminal of the standby signal CT1 of the master control module 112 is used for inputting the standby signal CT 1; the first general output terminal PB1 of the main control chip U2 is connected to the first sleep signal output terminal of the main control component 112, and the first sleep signal output terminal of the main control component 112 is configured to output a first sleep signal; the second general output terminal PB2 of the main control chip U2 is connected to a second sleep signal output terminal of the main control component 112, and the second sleep signal output terminal of the main control component 112 is configured to output a second sleep signal; a second universal input end PA2 of the main control chip U2 is connected to a fault signal input end of the main control assembly 112, and the fault signal input end of the main control assembly 112 is used for inputting a fault signal; a third general input end PA3 of the main control chip U2 is connected to a detection voltage input end of the main control component 112, and the detection voltage input end of the main control component 112 is used for inputting a detection voltage; a third general output end PB3 of the master control chip U2 is connected to an output end of a response signal BJ1 of the master control component 112, and an output end of a response signal BJ1 of the master control component 112 is used for outputting a response signal BJ 1; the second pulse first output end PWM1 of the master control chip U2 and the second pulse second output end PWM2 of the master control chip U2 are shared for outputting a second pulse signal; the third pulse first output end PWM3 of the master control chip U2 and the third pulse second output end PWM4 of the master control chip U2 are shared for outputting a third pulse signal; the ground terminal of the main control chip U2 is connected to power ground.

In one embodiment, the main control chip U2 is N32G032K6Q 7.

Referring to fig. 3, in an embodiment, the driving module 120 includes a driving chip U3, a first diode D1, a first resistor R1, a second resistor R2, a fourth capacitor C4, and a fifth capacitor C5.

The anode of the first diode D1 is connected to the second input voltage V12 input terminal of the driving module 120, and the second input voltage V12 input terminal of the driving module 120 is used for inputting the second input voltage V12; a power supply terminal VM of the driving chip U3, a first end of the fourth capacitor C4 and a cathode of the first diode D1 are connected in common; the gate energy storage terminal VCP of the driving chip U3 is connected to the second terminal of the fourth capacitor C4; the grounding end GND3 of the driving chip U3 is connected with the power ground; the first output terminal AOUT1 of the driver chip U3 is connected to the first output terminal AOUT2 of the first pulse voltage of the driver module 120, the second output terminal AOUT2 of the driver chip U3 is connected to the second output terminal of the first pulse voltage of the driver module 120, and the first output terminal of the first pulse voltage of the driver module 120 and the second output terminal of the first pulse voltage of the driver module 120 are used together for outputting a second pulse voltage; a third output terminal BOUT1 of the driving chip U3 is connected to the first output terminal of the second pulse voltage of the driving module 120, a fourth output terminal BOUT2 of the driving chip U3 is connected to the second output terminal of the second pulse voltage of the driving module 120, and the first output terminal of the second pulse voltage of the driving module 120 and the second output terminal of the second pulse voltage of the driving module 120 are used together for outputting the second pulse voltage; a first input terminal AIN1 of the driving chip U3 is connected to a first input terminal of the second pulse signal of the driving module 120, a second input terminal AIN2 of the driving chip U3 is connected to a second input terminal of the second pulse signal of the driving module 120, and the first input terminal of the second pulse signal of the driving module 120 and the second input terminal of the second pulse signal of the driving module 120 are commonly used for inputting the second pulse signal; the third input terminal BIN1 of the driving chip U3 is connected to the first input terminal of the third pulse signal of the driving module 120, the fourth input terminal BIN2 of the driving chip U3 is connected to the second input terminal of the third pulse signal of the driving module 120, and the first input terminal of the third pulse signal of the driving module 120 and the second input terminal of the third pulse signal of the driving module 120 are shared for inputting the third pulse signal; an error output terminal FAULT of the driver chip U3 is connected to a FAULT signal output terminal of the driver module 120, and the FAULT signal output terminal of the driver module 120 is configured to output a FAULT signal; a first detection end AISEN of the driving chip U3 is connected with a first end of a first resistor R1, a second end of the first resistor R1 is connected with a power ground, and a first detection end of the driving chip U3 is used for inputting a first current; the second detection end BISEN of the driving chip U3 is connected to the first end of the second resistor R2, the second end of the second resistor R2 is connected to the power ground, and the second detection end of the driving chip U3 is used for inputting a second current; the internal rectifying end VINT of the driving chip U3 is connected with the first end of the fifth capacitor C5; the SLEEP terminal SLEEP of the driver chip U3 is connected to the first SLEEP signal input terminal of the driver module 120, and the first SLEEP signal input terminal of the driver module 120 is used for inputting the first SLEEP signal; a second terminal of the fifth capacitor C5 is connected to power ground.

In one embodiment, the driver chip U3 is AT8833 CR.

Referring to fig. 3, in an embodiment, the feedback module 130 includes a third resistor R3, a fourth resistor R4, a fifth resistor, a sixth capacitor C6, a seventh capacitor C7, a second diode D2, a first fet Q1, a second fet Q2, and an operational amplifier U4.

The anode of the second diode D2 is connected to the second sleep signal input terminal of the feedback module 130, and the second sleep signal input terminal of the feedback module 130 is used for inputting a second sleep signal; the cathode of the second diode D2, the first end of the third resistor R3 and the base of the first field effect transistor Q1 are connected in common; the collector of the first field effect transistor Q1, the first end of the fourth resistor R4 and the gate of the second field effect transistor Q2 are connected in common; a second end of the fourth resistor R4, a source of the second fet Q2, and a first end of the sixth capacitor C6 are commonly connected to an internal voltage input end of the feedback module 130, where the internal voltage input end of the feedback module 130 is used for inputting an internal voltage; the drain electrode of the second field effect transistor Q2 is connected with the power supply end of the operational amplifier U4; the output end of the operational amplifier U4 is connected with the first end of the fifth resistor; a second end of the fifth resistor is connected to a second end of the seventh capacitor C7 and to a detection voltage output end of the feedback module 130, where the detection voltage output end of the feedback module 130 is used to output a detection voltage; the non-inverting input terminal of the operational amplifier U4 is connected to a reference voltage source; the inverting input terminal of the operational amplifier U4 is connected to the working voltage input terminal of the feedback module 130, and the working voltage input terminal of the feedback module 130 is used for inputting a working voltage; the ground terminal of the operational amplifier U4, the second terminal of the third resistor R3, the second terminal of the sixth capacitor C6, and the second terminal of the seventh capacitor C7 are all connected to ground.

The inverting input end of the operational amplifier U4 is connected to the driving motor 200 and is used for obtaining the working voltage of the driving motor 200, because the resistance of the detection resistor for obtaining the working voltage of the driving motor 200 is relatively small, the detection voltage directly obtained at two ends of the detection resistor is relatively small, and the detection and processing are difficult if the detection voltage is used as the working voltage, so the operational amplifier U4 amplifies the detection voltage of the driving motor 200 and the voltage value of the reference voltage source into the working voltage after comparison, and is more convenient for detection and subsequent processing. In addition, by adjusting the voltage value of the reference voltage source, the amplification factor of the operational amplifier U4 can be adaptively adjusted according to actual needs.

The following describes the driving circuit shown in fig. 3 with reference to the operation principle:

when the driving motor 200 is in a non-operating state, that is, the driving motor 200 does not need to operate, the external control device is operated to output the standby signal CT1 to the first general input terminal PA1 of the main control chip U2. When the standby signal CT1 is input to the main control chip U2, the first general output terminal PB1 of the main control chip U2 outputs a first sleep signal to the sleep terminal of the driving chip U3, and the second general output terminal PB2 of the main control chip U2 outputs a second sleep signal to the anode of the second diode D2. After the first sleep signal is input, the driver chip U3 stops powering up according to the second input voltage V12, and at this time, the second input voltage V12 does not consume energy on the driver chip U3. The second sleep signal (low level) acts on the base of the first fet Q1 through the second diode D2, the first fet Q1 is turned off, the internal voltage acts on the gate of the second fet Q2 through the fourth resistor R4, and the second fet Q2 is turned off, so that the operational amplifier U4 is no longer powered by the internal power source through the second fet Q2, the operational amplifier U4 stops operating, and the operational amplifier U4 no longer consumes energy. Therefore, when the driving motor 200 is in a non-working state, the driving chip U3 and the operational amplifier U4 do not consume energy any more, and the energy consumption of the driving circuit is reduced.

The present application further provides a driver including the driving circuit according to any of the above embodiments, and because the driver of the present embodiment includes the driving circuit according to any of the above embodiments, the driver of the present embodiment at least includes the corresponding advantageous effects of the driving circuit according to any of the above embodiments.

The embodiment of the application also provides a motor device, which comprises a driving motor 200 and a driving circuit as in any one of the above embodiments; the driving motor 200 is connected to the driving circuit and configured to operate according to the first pulse signal; because the motor device of the present embodiment includes the driving circuit of any of the above embodiments, the motor device of the present embodiment at least includes the corresponding advantages of the driving circuit of any of the above embodiments.

The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.