阅读说明：本技术 一种调光控制电路及其调光芯片 (Dimming control circuit and dimming chip thereof ) 是由 牟在鑫 贺志伟 于 2021-10-15 设计创作，主要内容包括：本申请提供一种调光控制电路及其调光芯片,该调光控制电路包括：峰值控制电压产生单元、限流控制单元以及控制逻辑单元；峰值控制电压产生单元用于采样负载电路的负载电压得到电压补偿信号,根据电压补偿信号生成补偿电压,并根据补偿电压和负载电压生成峰值控制电压；限流控制单元用于接收峰值控制电压,并在峰值控制电压达到预设的电压阈值时向控制逻辑单元发送断开驱动信号；控制逻辑单元用于根据断开驱动信号驱动负载电路中的功率控制器件断开,以在控制每个开关周期中负载电路中的电感的峰值电流大小,从而使得电感在每个充放电周期传送的电荷不受RLC谐振的影响,进而使得负载的调光输出电流呈线性变化,从而消除纹波。(The application provides a control circuit and chip of adjusting luminance thereof adjusts luminance, and this control circuit that adjusts luminance includes: the peak control voltage generating unit, the current limiting control unit and the control logic unit; the peak control voltage generating unit is used for sampling the load voltage of the load circuit to obtain a voltage compensation signal, generating compensation voltage according to the voltage compensation signal and generating peak control voltage according to the compensation voltage and the load voltage; the current limiting control unit is used for receiving the peak control voltage and sending a disconnection driving signal to the control logic unit when the peak control voltage reaches a preset voltage threshold; the control logic unit is used for driving a power control device in the load circuit to be switched off according to the switching-off driving signal so as to control the peak current of the inductor in the load circuit in each switching period, so that the electric charge transmitted by the inductor in each charging and discharging period is not influenced by RLC resonance, the dimming output current of the load is linearly changed, and ripples are eliminated.)

1. A dimming control circuit, comprising: a peak control voltage generating unit (10), a current limiting control unit (20) and a control logic unit (30);

the peak control voltage generating unit (10) is used for sampling the load voltage of the load circuit to obtain a voltage compensation signal, generating a compensation voltage according to the voltage compensation signal, and generating a peak control voltage according to the compensation voltage and the load voltage;

the current limiting control unit (20) is used for receiving the peak control voltage and sending a disconnection driving signal to the control logic unit (30) when the peak control voltage reaches a preset voltage threshold value;

the control logic unit (30) is used for driving a power control device in the load circuit to be disconnected according to the disconnection driving signal.

2. The dimming control circuit according to claim 1, wherein the peak control voltage generating unit (10) comprises a sampling control circuit (101) and a peak control voltage generating circuit (102), an input of the sampling control circuit (101) is configured to receive the load voltage, an output of the sampling control circuit (101) is connected to an input of the peak control voltage generating circuit (102), and an output of the peak control voltage generating circuit (102) is connected to an input of the current limiting control unit (20);

the sampling control circuit (101) is used for controlling the peak control voltage generation circuit (102) to sample the load voltage to obtain the voltage compensation signal after the power control device is closed;

the peak control voltage generation circuit (102) is configured to generate the compensation voltage from the voltage compensation signal and generate the peak control voltage from the compensation voltage and the load voltage.

3. The dimming control circuit according to claim 2, wherein the peak control voltage generating circuit (102) comprises a compensation voltage operational amplifier (L1), a compensation voltage controllable switch (M1), a first resistor (R1), a second resistor (R2) and a current mirror (P1), a non-inverting input terminal of the compensation voltage operational amplifier (L1) is connected to the output terminal of the sampling control circuit (101), an output terminal of the compensation voltage operational amplifier (L1) is connected to the control terminal of the compensation voltage controllable switch (M1), a first terminal of the compensation voltage controllable switch (M1) is connected to the first terminal of the first resistor (R1) and the inverting input terminal of the compensation voltage operational amplifier (L1), respectively, and a second terminal of the first resistor (R1) is grounded;

the second end of the compensation voltage controllable switch tube (M1) is respectively connected with the first end of the second resistor (R2) and the input end of a current limiting control unit (20) through the current mirror (P1), and the second end of the second resistor (R2) is used for receiving the load voltage.

4. The dimming control circuit according to claim 3, wherein the sampling control circuit (101) comprises a sampling signal generating sub-circuit (1011), a sampling controllable switch tube (M2) and an energy storage capacitor (C1), the sampling signal generating sub-circuit (1011) is connected to a control terminal of the sampling controllable switch tube (M2), a first terminal of the sampling controllable switch tube (M2) is connected to a second terminal of the second resistor (R2), a second terminal of the sampling controllable switch tube (M2) is respectively connected to a first terminal of the energy storage capacitor (C1) and a non-inverting input terminal of the compensation voltage operational amplifier (L1), and a second terminal of the energy storage capacitor (C1) is connected to a second terminal of the first resistor (R1);

the sampling signal generation sub-circuit (1011) is used for generating a sampling signal to control the conduction of the sampling controllable switch tube (M2) after the power control device is closed.

5. The dimming control circuit according to claim 1, wherein the current limiting control unit (20) is further configured to receive a dimming signal and adjust the preset voltage threshold according to the dimming signal to adjust a closing time of the power control device and a peak current of a load circuit, so as to achieve dimming.

6. The dimming control circuit according to claim 5, wherein the current limit control unit (20) comprises a current limit comparator (L2), a non-inverting input terminal of the current limit comparator (L2) being connected to the output terminal of the peak control voltage generation unit (10);

the inverting input end of the current-limiting comparator (L2) is used for receiving a peak threshold signal, the peak threshold signal is obtained by converting the dimming signal, and the peak threshold signal represents the preset voltage threshold;

the output of the current limiting comparator (L2) is connected to the control logic unit (30) to send a disconnect drive signal to the control logic unit (30) when the peak control voltage reaches a voltage threshold corresponding to the peak threshold signal.

7. The dimming control circuit according to claim 6, wherein the current limit control unit (20) further comprises a peak detection control circuit (201), the peak detection control circuit (201) being arranged between the non-inverting input of the current limit comparator (L2) and the output of the peak control voltage generating unit (10) for controlling the conduction state between the non-inverting input of the current limit comparator (L2) and the output of the peak control voltage generating unit (10).

8. The dimming control circuit according to claim 1, further comprising a demagnetization detection unit (40) and a load switching cycle control unit (50);

the demagnetization detection unit (40) is used for sending a demagnetization completion signal to the load switch cycle control unit (50) when the load current is reduced from the maximum value to 0;

the load switch period control unit (50) is used for sending a closing driving signal to the control logic unit (30) according to the demagnetization finishing signal;

the control logic unit (30) is used for controlling the power control device to close according to the closing driving signal.

9. The dimming control circuit of claim 1, wherein the compensation voltage is inversely related to a peak current of an inductance of the load circuit.

10. A dimming chip, comprising the dimming control circuit of any one of claims 1-9.

Technical Field

The application relates to the technical field of dimming control, in particular to a dimming control circuit and a dimming chip thereof.

Background

When the current smart dimming circuit adopts a discontinuous conduction mode (DCM mode) to dim a load (such as an LED) in a load circuit, a power control device in the load circuit is turned on and off. When the power control device is closed, the inductor stores electric energy, and the inductor current is gradually increased. After the power control device is disconnected, the inductor releases electric energy, and the inductor current is gradually reduced. When the inductor current decreases to 0, the load circuit generates RLC resonance since the power control device has not been closed.

RLC resonance can cause the initial values of the inductor currents in different switching periods to be inconsistent, that is, the electric charge quantity transferred to the load by the inductors in different switching periods is different under the same dimming condition, so that the load output current fluctuates in different switching periods under the same dimming condition, and further, the load output current shows nonlinear fluctuation change in the linear dimming process, and thus, a ripple phenomenon occurs.

Disclosure of Invention

An object of the present invention is to provide a dimming control circuit and a dimming chip thereof, so as to solve the above problems.

In a first aspect, the present invention provides a dimming control circuit, including: the peak control voltage generating unit, the current limiting control unit and the control logic unit; the peak control voltage generating unit is used for sampling the load voltage of the load circuit to obtain a voltage compensation signal, generating a compensation voltage according to the voltage compensation signal, and generating a peak control voltage according to the compensation voltage and the load voltage; the current limiting control unit is used for receiving the peak control voltage and sending a disconnection driving signal to the control logic unit when the peak control voltage reaches a preset voltage threshold; the control logic unit is used for driving a power control device in the load circuit to be switched off according to the switching-off driving signal.

In the dimming control circuit designed above, the peak control voltage generating unit generates the compensation voltage based on the voltage compensation signal of the sampled load voltage, then the load voltage and the compensation voltage are calculated to generate the peak control voltage, the current limiting control unit sends the turn-off driving signal when the peak control voltage reaches the preset voltage threshold, so that the control logic unit controls the power control device in the load circuit to turn off according to the turn-off driving signal, thereby controlling the peak current of the inductor in the load circuit through the compensation voltage in each switching period, further causing the compensation voltage to present the same change when the initial value of the inductor current changes relative to the previous period, thereby causing the peak current of the inductor to present the opposite change, and controlling the charge transferred by the inductor in the load circuit in each charging and discharging period not to be influenced by the RLC resonance, therefore, the dimming output current of the load is changed linearly, and the ripple phenomenon in the dimming process is eliminated.

In an alternative implementation of the first aspect, the peak control voltage generation unit includes a sampling control circuit and a peak control voltage generation circuit; the input end of the sampling control circuit is used for receiving the load voltage, the output end of the sampling control circuit is connected with the input end of the peak value control voltage generating circuit, and the output end of the peak value control voltage generating circuit is connected with the input end of the current limiting control unit; the sampling control circuit is used for controlling the peak control voltage generation circuit to sample the load voltage to obtain the voltage compensation signal after the power control device is closed; the peak control voltage generating circuit is used for generating the compensation voltage according to the voltage compensation signal and generating the peak control voltage according to the compensation voltage and the load voltage.

In an optional implementation manner of the first aspect, the peak control voltage generation circuit includes a compensation voltage operational amplifier, a compensation voltage controllable switch tube, a first resistor, a second resistor, and a current mirror, a non-inverting input terminal of the compensation voltage operational amplifier is connected to an output terminal of the sampling control circuit, an output terminal of the compensation voltage comparator is connected to a control terminal of the compensation voltage controllable switch tube, a first terminal of the compensation voltage controllable switch tube is connected to a first terminal of the first resistor and an inverting input terminal of the compensation voltage operational amplifier, respectively, and a second terminal of the first resistor is grounded; and the second end of the compensation voltage controllable switch tube is respectively connected with the first end of the second resistor and the input end of the current-limiting control unit through the current mirror, and the second end of the second resistor is used for receiving the load voltage.

In an optional implementation manner of the first aspect, the sampling control circuit includes a sampling signal generation sub-circuit, a sampling controllable switch tube, and an energy storage capacitor, the sampling signal generation sub-circuit is connected to a control end of the sampling controllable switch tube, a first end of the sampling controllable switch tube is connected to a second end of the second resistor, a second end of the sampling controllable switch tube is respectively connected to a first end of the energy storage capacitor and a non-inverting input end of the offset voltage operational amplifier, and a second end of the energy storage capacitor is connected to a second end of the first resistor; and the sampling signal generation sub-circuit is used for generating a sampling signal to control the conduction of the sampling controllable switch tube after the power control device is closed.

In an optional implementation manner of the first aspect, the current limit control unit is further configured to receive a dimming signal, and adjust the preset voltage threshold according to the dimming signal, so as to adjust a closing time of the power control device and a peak current of the load circuit, thereby implementing dimming.

In an optional implementation manner of the first aspect, the current limit control unit includes a current limit comparator, and a non-inverting input terminal of the current limit comparator is connected to an output terminal of the peak control voltage generation unit; the inverting input end of the current-limiting comparator is used for receiving a peak threshold signal, the peak threshold signal is obtained by converting the dimming signal, and the peak threshold signal represents the preset voltage threshold; and the output end of the current-limiting comparator is connected with the control logic unit so as to send a disconnection driving signal to the control logic unit when the peak control voltage reaches a voltage threshold corresponding to the peak threshold signal.

In an optional implementation manner of the first aspect, the current limit control unit further includes a peak detection control circuit, which is disposed between the positive input terminal of the current limit comparator and the output terminal of the peak control voltage generation unit, and is configured to control a conduction state between the positive input terminal of the current limit comparator and the output terminal of the peak control voltage generation unit.

In an optional implementation manner of the first aspect, the peak detection control circuit includes a peak detection signal generation sub-circuit and a peak detection controllable switch tube, the peak detection signal generation sub-circuit is connected to a control end of the peak detection controllable switch tube, a first end of the peak detection controllable switch tube is connected to an output end of the peak control voltage generation unit and a first end of the second resistor, respectively, and a second end of the peak detection controllable switch tube is connected to a non-inverting input end of the current-limiting comparator.

In an optional implementation manner of the first aspect, the dimming control circuit further includes a demagnetization detecting unit and a load switching period control unit; the demagnetization detection unit is used for sending a demagnetization completion signal to the load switch period control unit when the load current is reduced from the maximum value to 0; the switching period control unit is used for sending a closing driving signal to the control logic unit according to the demagnetization finishing signal; and the control logic unit is used for controlling the power control device to be closed according to the closing driving signal.

In an alternative embodiment of the first aspect, the compensation voltage is inversely related to a peak current of an inductance of the load circuit.

In an optional implementation manner of the first aspect, the control logic unit includes a control logic circuit and a driving circuit, an input end of the control logic circuit is connected to an output end of the current limiting control unit, an output end of the control logic circuit is connected to an input end of the driving circuit, and an output end of the driving circuit is connected to a control end of the power control device.

In a second aspect, the present invention provides a dimming chip, which includes the dimming control circuit described in any optional implementation manner of the first aspect.

In the dimming chip designed above, since the dimming chip includes the dimming control circuit according to any one of the optional embodiments of the first aspect, the dimming chip can prevent the charge transferred by the inductor in the load circuit in each charging and discharging cycle from being affected by the RLC resonance, so that the dimming output current of the load is linearly changed, and a ripple phenomenon in the dimming process is eliminated.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic diagram of a first structure of a dimming control circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic timing diagram of signals in a dimming control circuit according to an embodiment of the present disclosure;

fig. 3 is a second schematic structural diagram of a dimming control circuit according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram of a third structure of a dimming control circuit according to an embodiment of the present application;

fig. 5 is a fourth schematic structural diagram of a dimming control circuit according to an embodiment of the present application;

fig. 6 is a fifth structural schematic diagram of a dimming control circuit according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of a dimming chip according to an embodiment of the present application.

Icon: 1-a dimming chip; 4-a load circuit; 41-load working circuit; 42-a power control device; 43-a load detection circuit; 10-peak control voltage generation unit; 101-a sampling control circuit; 102-peak control voltage generation circuit; 1011-a sampled signal generating sub-circuit; 20-a current limit control unit; 201-peak detection control circuit; 2011-peak detect signal generation subcircuit; 30-a control logic unit; 301-control logic; 302-a driver circuit; 40-a demagnetization detection unit; 50-load switch cycle control unit; LED-light emitting diodes; an L-inductor; c-capacitance; c1-energy storage capacitor; q1-diode; rcs-resistance; r1 — first resistance; r2 — second resistance; M0-MOS tube; m1-compensation voltage controllable switch tube; m2-sampling controllable switch tube; m3-peak detection controllable switch tube; l1-offset voltage operational amplifier; l2-current limiting comparator; p1-current mirror; a 1-signal conversion unit.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

First embodiment

The present embodiment provides a dimming control circuit, which is used for dimming a load circuit, wherein the load circuit may be a load circuit 4 as shown in fig. 1, the load circuit 4 includes a load working circuit 41, a power control device 42 and a load detection circuit 43 connected in sequence, specifically, the load working circuit 41 may include a light emitting diode LED, an inductor L, a capacitor C and a diode Q1, the power control device 42 may be a MOS transistor M0 as shown in fig. 1, the load detection circuit 43 may be a resistor Rcs as shown in fig. 1, an anode of the LED is connected to a cathode of the diode Q1, a first end of the capacitor C and a power supply, a cathode of the LED is connected to a second end of the capacitor C and a first end of the inductor L, a second end of the inductor L is connected to an anode of the diode Q1, an anode of the diode Q1 is further connected to a drain of the MOS transistor M0, the source of the MOS transistor M0 is grounded via a resistor Rcs.

On the basis of the load circuit 4 having the above-described configuration, the dimming circuit according to the present invention dims the LEDs in the load operation circuit 41. It should be noted that the above-described load circuit 4 is only one specific implementation structure of the present load circuit, and the dimming circuit designed in the present application can perform dimming control on any load circuit currently operating in DCM mode.

The dimming circuit of this application design can make inductance L among the load circuit not receive the influence of RLC resonance at the electric charge that every charge-discharge cycle transmitted to make the output current of adjusting luminance of load be linear variation, and then eliminate the ripple. As shown in fig. 1, the dimming control circuit is designed to include: a peak control voltage generating unit 10, a current limit control unit 20, and a control logic unit 30.

The input end of the peak control voltage generating unit 10 is used for sampling the load voltage Vcs to obtain the voltage compensation signal Vc, the output end of the peak control voltage generating unit 10 is connected to the input end of the current limiting control unit 20, the output end of the current limiting control unit 20 is connected to the input end of the control logic unit 30, and the output end of the control logic unit 30 is connected to the control end of the power control device 42, i.e., the gate of the MOS transistor M0 in fig. 1. Based on the design of the load circuit 4, the input terminal of the peak control voltage generating unit 10 and the input terminal of the current limiting control unit 20 may be connected to the source of M0 of the MOS transistor, so as to sample the load voltage Vcs.

As shown in the timing chart of fig. 2, when the power control device 42, i.e., the MOS transistor M0, is closed, the inductor current in the inductor L gradually increases, the voltage across the resistor Rcs, i.e., the load voltage Vcs, gradually increases, the peak control voltage generating unit 10 may sample the load voltage Vcs after the power control device 42 is closed to obtain the voltage compensation signal Vc, generate the compensation voltage Vn according to the sampled voltage compensation signal Vc, generate the peak control voltage Vm according to the compensation voltage Vn and the load voltage Vcs, and transmit the generated peak control voltage Vm to the current limiting control unit 20.

As shown in the timing chart of fig. 2, the peak control voltage generating unit 10 may sample the load voltage Vcs at a fixed time after the power control device 42 is closed to obtain the voltage compensation signal Vc, so as to generate the compensation voltage Vn according to the voltage compensation signal Vc, where the fixed time may be any time period Tn between the closing of the power control device 42 and the non-opening, for example, the time period Tn may be a time period from a time point when the power control device 42 is closed to a time point when a preset time length ends, or may be a time period from any time point after the power control device 42 is closed to a time point when the preset time length ends, and the fixed time sampling time is short so that the voltage compensation signal Vc is a fixed value in the current sample.

The current limit control unit 20 is connected to the output terminal of the peak control voltage generating unit 10, the current limit control unit 20 receives the peak control voltage Vm, and after the peak control voltage Vm reaches a preset voltage threshold Vref, the current limit control unit 20 sends an off driving signal DK to the control logic unit 30.

The control logic unit 30 controls the power control device 42, i.e., the MOS transistor M0, to be turned off according to the turn-off driving signal DK, and since the inductor current is gradually increased after the power control device 42 is turned on, the inductor current is maximum and then gradually decreased when the control logic unit 30 controls the power control device 42 to be turned off.

As can be seen from the timing diagram of fig. 2, when ripple is generated in different switching periods, the initial values of the inductive currents are different, so that the initial values of the corresponding load voltages Vcs are also different, and the peak control voltage generating unit 10 in the present application samples the load voltages Vcs at a fixed time in each switching period to obtain the voltage compensation signal Vc, and when the initial values of the load voltages Vcs are different, the voltage compensation signal Vc obtained by the peak control voltage generating unit 10 by sampling at a fixed time is also different, so that the compensation voltages Vn generated by the peak control voltage generating unit 10 based on the voltage compensation signal Vc are also different, and further, when the initial values of the load voltages Vcs are different, the peak control voltages Vm transmitted to the current limiting control unit 20 are different.

In this scheme, when the peak control voltage Vm reaches the preset voltage threshold Vref, the power control device 42 is controlled to be turned off, and the peak control voltage Vm is generated by calculating the compensation voltage Vn and the load voltage Vcs, so that the following formula can be obtained:

Vref＝Vm＝Vn+Vcs＝Vn+I_pk*Rcs；

from the above equation, when the power control device is controlled to be off, the maximum inductor current is:

from the above formula, Vref is a preset voltage threshold, which is a fixed value, Rcs is also a fixed value, and therefore, the maximum value I of the inductor current_pkInversely related to the compensation voltage Vn.

Since the compensation voltage Vn is obtained based on the sampled voltage compensation signal Vc, the compensation voltage Vn and the voltage compensation signalOn the basis that the sign Vc is in positive correlation, the formula and the timing diagram are combined to obtain that when the initial value of the inductive current is reduced relative to the last switching period, the voltage compensation signal Vc obtained by sampling is reduced, so that the generated compensation voltage Vn and the peak control voltage Vm are reduced, the time for the peak control voltage Vm to reach the preset voltage threshold Vref is prolonged, namely, the time delay for turning off the power control device 42 is controlled, and the peak value I of the inductive current is promoted_pkIncreasing so that the amount of charge transferred by the inductor per switching period is not affected by RLC resonance (i.e., S0-S1-S2-S3 + S4 in the sequence diagram, where S represents the amount of charge transferred by the inductor during the switching period); similarly, when the initial value of the inductor current is increased relative to the previous switching period, the sampled voltage compensation signal Vc is increased, so that the generated compensation voltage Vn and the peak control voltage Vm are increased, the time for the peak control voltage Vm to reach the preset voltage threshold Vref is shortened, and the peak value I of the inductor current is promoted_pkThe inductance is reduced, so that the electric charge quantity transmitted by the inductance in each switching period is not influenced by RLC resonance, the dimming output current of the load is further promoted to linearly change, and the ripple phenomenon caused by RLC resonance in the dimming process is eliminated.

In the dimming control circuit designed above, the peak control voltage generating unit 10 generates the compensation voltage Vn based on the voltage compensation signal Vc obtained by the sampled load voltage Vcs, then calculates the load voltage Vcs and the compensation voltage Vn to generate the peak control voltage Vm, the current limiting control unit 20 sends the off driving signal DK when the peak control voltage Vm reaches the preset voltage threshold Vref, so that the control logic unit 30 controls the power control device 42 in the load circuit 4 to be turned off according to the off driving signal DK, thereby controlling the peak current of the inductor L in the load circuit 4 according to the compensation voltage Vn in each switching period, further making the compensation voltage present the same change when the initial value of the inductor current changes relative to the previous period, thereby making the peak current of the inductor present opposite changes, and further controlling the charge transferred by the inductor in the load circuit in each charging and discharging period to be not influenced by the resonance RLC, therefore, the dimming output current of the load is changed linearly, and the ripple phenomenon in the dimming process is eliminated.

As a possible implementation, the peak control voltage generating unit 10 may implement the function of sampling the load voltage Vcs at a fixed time to obtain the voltage compensation signal Vc and generate the compensation voltage Vn and the peak control voltage Vm by the following specific structure.

As shown in fig. 3, the peak control voltage generating unit 10 includes: a sampling control circuit 101 and a peak control voltage generating circuit 102, wherein the sampling control circuit 101 controls the peak control voltage generating circuit 102 to sample the load voltage Vcs at the fixed time to obtain a voltage compensation signal Vc, and the peak control voltage generating circuit 102 generates a compensation voltage Vn according to the sampled voltage compensation signal Vc and generates a peak control voltage Vm according to the compensation voltage Vn and the load voltage Vcs.

The sampling control circuit 101 includes a sampling signal generating sub-circuit 1011, a sampling controllable switch tube M2 and an energy storage capacitor C1, and the peak control voltage generating circuit 102 includes a compensation voltage operational amplifier L1, a compensation voltage controllable switch tube M1, a first resistor R1, a second resistor R2 and a current mirror P1.

The sampling signal generation sub-circuit 1011 is connected with the control end of the sampling controllable switch tube M2, the first end of the sampling controllable switch tube M2 is used for receiving a load voltage Vcs, the second end of the sampling controllable switch tube M2 is respectively connected with the positive phase input end of the compensation voltage operational amplifier L1 and the first section of the energy storage capacitor C1, the output end of the compensation voltage operational amplifier L1 is connected with the control end of the compensation voltage controllable switch tube M1, the first end of the compensation voltage controllable switch tube M1 is respectively connected with the first end of the first resistor R1 and the negative phase input end of the compensation voltage operational amplifier L1, and the second end of the first resistor R1 is connected with the second end of the energy storage capacitor C1 and grounded; the second end of the compensation voltage controllable switch tube M1 is connected to the first end of the second resistor R2 and the input end of the current limiting control unit 20 through the current mirror P1, respectively, and the second end of the second resistor R2 receives the load voltage Vcs. For convenience of illustration, the compensation voltage controllable switch M1 and the sampling controllable switch M2 in fig. 3 are illustrated as PMOS transistors, and in practical application, they may also be NMOS transistors, or may also be other types of switch transistors, such as Insulated Gate Bipolar Transistors (IGBTs).

In the peak control voltage generating circuit 102 with the above design, the sampling signal generating sub-circuit 1011 sends a sampling signal to the sampling controllable switch tube M2 at a fixed time to control the conduction of the sampling controllable switch tube M2, so that the positive phase input end of the compensation voltage operational amplifier L1 receives the load voltage Vcs at the fixed time, thereby obtaining the voltage compensation signal Vc, where the fixed time may be a time when the power control device is turned on or any time between the turning-on and the turning-off of the power control device.

The compensation voltage operational amplifier L1 clamps the voltage compensation signal Vc sampled from the non-inverting input terminal to the first terminal of the compensation voltage controllable switch tube M1, so that a current I0 is formed in a branch of the first resistor R1 and the compensation voltage controllable switch tube M1, and the current I0 is Vc/R1.

The current I0 is transmitted to a current mirror P1, and if the current mirror proportion of the current mirror P1 is K, the current mirror outputs a compensation current I1 ═ K × I0 ═ K × Vc/R1, the compensation current I1 is transmitted to a second resistor R2, and a compensation voltage Vn is formed on the second resistor R2; and the second end of the second resistor R2 receives the load voltage Vcs, so that the first end of the second resistor R2 outputs the peak control voltage Vm generated by combining the compensation voltage Vn with the load voltage Vcs.

As a possible embodiment, the current limit control unit 20 may also receive a peak threshold signal, the peak threshold signal is obtained by scaling the dimming signal, specifically, as shown in fig. 3, 4, 5 or 6, the dimming control circuit further includes a signal conversion unit a1, an input terminal of the signal conversion unit a1 receiving the dimming signal, the output terminal of the signal conversion unit a1 is connected to the current limit control unit 20, the signal conversion unit a1 converts the dimming signal into a peak threshold signal and transmits the peak threshold signal to the current limit control unit 20, the peak threshold signal may characterize the preset voltage threshold Vref, such that the peak threshold signal and thus the preset voltage threshold may be varied by varying the dimming signal, and the on-time of the power control device 42 and the peak current of the inductor L can be adjusted by changing the preset voltage threshold, thereby realizing dimming.

The current limit control unit 20 can realize the aforementioned function of generating the off driving signal through a specific structure, as shown in fig. 4, the current limit control unit 20 includes a current limit comparator L2, a non-inverting input terminal of the current limit comparator L2 is connected to the first terminal of the second resistor R2, so as to receive the peak control voltage Vm transmitted by the first terminal of the second resistor R2; the inverting input terminal of the current-limiting comparator L2 is used for receiving the peak threshold signal, and specifically, the inverting input terminal of the current-limiting comparator L2 is connected to the output terminal of the signal conversion unit a1 so as to receive the peak threshold signal output by the signal conversion unit a 1; the output of the current limiting comparator L2 is connected to the control logic unit 30.

The current-limiting comparator L2 outputs a turn-off driving signal DK when the peak control voltage Vm received at the non-inverting input terminal reaches the preset voltage threshold Vref represented by the peak threshold signal received at the inverting input terminal, so that the control logic unit 30 controls the power control device 42 to turn off according to the turn-off driving signal DK.

As a possible implementation, as shown in fig. 5, the current limiting control unit 20 may further include a peak detection control circuit 201, where the peak detection control circuit 201 includes a peak detection signal generating sub-circuit 2011 and a peak detection controllable switch M3, the peak detection signal generating sub-circuit 2011 is connected to the control terminal of the peak detection controllable switch M3, the first terminal of the peak detection controllable switch M3 is connected to the first terminal of the second resistor R2, and the second terminal of the peak detection controllable switch M3 is connected to the non-inverting input terminal of the current limiting comparator L2.

The peak detection control circuit 201 configured as described above is configured to control a conduction state between the positive phase input terminal of the current-limiting comparator L2 and the second resistor R2, and when the current needs to be conducted, the peak detection signal generation sub-circuit 2011 sends a conduction signal to the control terminal of the peak detection controllable switch tube M3, so as to control the conduction of the peak detection controllable switch tube M3, and further cause a line between the positive phase input terminal of the current-limiting comparator L2 and the first terminal of the second resistor R2 to be conducted, so that the positive phase input terminal of the current-limiting comparator L2 receives the peak control voltage Vm.

As a specific implementation manner, the load voltage Vcs is likely to fluctuate during the closing phase of the power control device 42, and on the basis of this, the peak detection control circuit 201 may control the line conduction between the non-inverting input terminal of the current-limiting comparator L2 and the first terminal of the second resistor R2 after a preset time period after the power control device 42 is closed.

In an alternative embodiment of this embodiment, as shown in fig. 6, the dimming control circuit further includes a demagnetization detecting unit 40 and a load switching period control unit 50, the control logic unit 30 includes a control logic circuit 301 and a driving circuit 302, the demagnetization detecting unit 40 sends a demagnetization completing signal to the load switching period control unit 50 when the load current is decreased from maximum to 0, and the load switching period control unit 50 sends a closing driving signal to the control logic circuit 301 according to the demagnetization completing signal, so that the control logic circuit 301 controls the driving circuit 302 to drive the power control device to close according to the closing driving signal. It should be noted here that any conventional implementation manner may be adopted for the demagnetization detection unit 40, the load switch cycle control unit 50, the control logic circuit 301, and the driving circuit 302, and the demagnetization detection unit 40, the load switch cycle control unit 50, and the control logic unit 30 in combination control the closing time point of the power control device 42 may be controlled by the control logic of the existing closing time point.

Second embodiment

The present application provides a dimming chip, as shown in fig. 7, the dimming chip 1 includes the dimming control circuit described in any optional embodiment of the first embodiment.

In the dimming chip 1 designed as above, since the dimming chip 1 includes the dimming control circuit in the first embodiment, the dimming chip 1 can prevent the charge transferred by the inductor L in the load circuit 4 in each charging and discharging cycle from being affected by the RLC resonance, so that the dimming output current of the load changes linearly, and the ripple phenomenon during dimming is eliminated.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.

In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.