阅读说明：本技术 基于金属氧化物半导体场效应晶体管（mosfet）的电压调节器电路 (Voltage regulator circuit based on Metal Oxide Semiconductor Field Effect Transistor (MOSFET) ) 是由 B·J·格里菲斯 于 2020-07-08 设计创作，主要内容包括：基于金属氧化物半导体场效应晶体管(MOSFET)的电压调节器电路包括第一电阻器、第二电阻器和第一MOSFET。第一MOSFET的第一栅极端子连接到第一电阻器的第二端子和第二电阻器的第一端子。第一MOSFET的第一漏极端子连接到第二电阻器的第二端子和电压调节器电路的第一输出端子。第一MOSFET经由第一电阻器在第一MOSFET的第一栅极端子处接收输入电源电压。基于输入电源电压的改变,第一MOSFET在第一输出端子处提供第一恒定输出电压。(A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) -based voltage regulator circuit includes a first resistor, a second resistor, and a first MOSFET. The first gate terminal of the first MOSFET is connected to the second terminal of the first resistor and the first terminal of the second resistor. A first drain terminal of the first MOSFET is connected to a second terminal of the second resistor and to a first output terminal of the voltage regulator circuit. The first MOSFET receives an input supply voltage at a first gate terminal of the first MOSFET via a first resistor. The first MOSFET provides a first constant output voltage at the first output terminal based on changes in the input supply voltage.)

1. A voltage regulator circuit comprising:

a first resistor;

a second resistor; and

a first Metal Oxide Semiconductor Field Effect Transistor (MOSFET),

wherein a first gate terminal of the first MOSFET is connected to a second terminal of the first resistor and a first terminal of the second resistor,

wherein a first drain terminal of the first MOSFET is connected to a second terminal of the second resistor and a first output terminal of the voltage regulator circuit, an

Wherein the first MOSFET is configured to:

receiving an input supply voltage at a first gate terminal of the first MOSFET via the first resistor, an

Providing a first constant output voltage at the first output terminal based on a change in the input supply voltage.

2. The voltage regulator circuit of claim 1, wherein

The first MOSFET is an N-type MOSFET, and

the first MOSFET is further configured to provide negative feedback.

3. The voltage regulator circuit of claim 1, wherein

A ratio of a resistance value of the first resistor and a resistance value of the second resistor is defined, an

The first MOSFET is further configured to receive the input supply voltage at the first gate terminal based on the defined ratio.

4. The voltage regulator circuit of claim 1, further comprising:

a second MOSFET; and

a third resistor, wherein

A second gate terminal of the second MOSFET is connected to the first output terminal of the first MOSFET and the first terminal of the third resistor, an

A second drain terminal of the second MOSFET is connected to a second terminal of the third resistor and a second output terminal of the voltage regulator circuit.

5. The voltage regulator circuit of claim 4, wherein the first source terminal of the first MOSFET and the second source terminal of the second MOSFET are grounded.

6. The voltage regulator circuit of claim 4, wherein the second MOSFET is an N-type MOSFET and is configured to:

receiving the first constant output voltage at a second gate terminal of the second MOSFET; and

providing a second constant output voltage at the second output terminal based on the change in the input supply voltage.

7. The voltage regulator circuit of claim 4, further comprising a fourth resistor connected between the first output terminal and a first terminal of the third resistor.

8. The voltage regulator circuit of claim 4, further comprising:

an operational amplifier;

a third MOSFET (metal-oxide-semiconductor field effect transistor),

a fourth MOSFET, and

a fifth resistor, wherein

A negative input terminal of the operational amplifier is connected to a second output terminal of the voltage regulator circuit,

an output terminal of the operational amplifier is connected to a fourth gate terminal of the fourth MOSFET, an

A positive input terminal of the operational amplifier is connected to a third output terminal of the voltage regulator circuit, a fourth drain terminal of the fourth MOSFET, and a first terminal of the fifth resistor.

9. The voltage regulator circuit of claim 8, wherein the third MOSFET is an N-type MOSFET and the fourth MOSFET is a P-type MOSFET configured to receive the input supply voltage at a fourth source terminal of the fourth MOSFET.

10. The voltage regulator circuit of claim 8, wherein

A third gate terminal of the third MOSFET is connected to the second terminal of the fifth resistor and the third drain terminal of the third MOSFET, an

A third source terminal of the third MOSFET is grounded.

11. The voltage regulator circuit of claim 10, wherein the operational amplifier is configured to:

comparing a second constant output voltage at the second output terminal to a voltage reference at a third output terminal of the voltage regulator circuit; and

controlling generation of a voltage reference at a third output terminal of the voltage regulator circuit based on the comparison, wherein the generated voltage reference is constant based on a change in the input supply voltage.

12. The voltage regulator circuit of claim 11, wherein the generated voltage reference is constant based on changes in temperature around the voltage regulator circuit.

13. The voltage regulator circuit of claim 8, wherein the third MOSFET and the fifth resistor are connected in parallel, and wherein a third gate terminal of the third MOSFET is connected to a third output terminal of the voltage regulator circuit and a first terminal of the fifth resistor.

14. The voltage regulator circuit of claim 13, wherein the parallel connection between the third MOSFET and the fifth resistor is configured to provide a constant output current based on the input supply voltage and changes in temperature around the voltage regulator circuit.

15. A voltage regulator circuit comprising:

a first resistor;

a second resistor; and

a first metal oxide semiconductor field effect transistor MOSFET, wherein

A first gate terminal of the first MOSFET is connected to a first terminal of the first resistor and a second terminal of the second resistor,

a first drain terminal of the first MOSFET is connected to a first terminal of the second resistor and a first output terminal of the voltage regulator circuit, an

The first MOSFET is configured to:

receiving an input supply voltage at a first source terminal of the first MOSFET, an

Providing a first constant output voltage at the first output terminal based on a change in the input supply voltage.

16. The voltage regulator circuit of claim 15, wherein the first MOSFET is a P-type MOSFET and the second terminal of the first resistor is connected to ground.

17. The voltage regulator circuit of claim 15, further comprising:

a second MOSFET; and

a third resistor, wherein

A second gate terminal of the second MOSFET is connected to the first output terminal of the first MOSFET and the second terminal of the third resistor, an

A second drain terminal of the second MOSFET is connected to a first terminal of the third resistor and a second output terminal of the voltage regulator circuit.

18. The voltage regulator circuit of claim 17, wherein the second MOSFET is a P-type MOSFET and is configured to:

receiving the input supply voltage at a second source terminal of the second MOSFET; and

providing a second constant output voltage at the second output terminal based on the change in the input supply voltage.

19. A voltage reference generation circuit comprising:

a voltage regulator circuit, comprising:

a first resistor for a first electric power source,

a second resistor, and

a first metal oxide semiconductor field effect transistor MOSFET, wherein

A first gate terminal of the first MOSFET is connected to a second terminal of the first resistor and a first terminal of the second resistor, an

A first drain terminal of the first MOSFET is connected to a second terminal of the second resistor and a first output terminal of the voltage regulator circuit, an

The first MOSFET is configured to:

receiving an input supply voltage at a first gate terminal of the first MOSFET via the first resistor; and

providing a first constant output voltage at the first output terminal based on a change in the input supply voltage; and

an operational amplifier;

a second MOSFET;

a third MOSFET; and

a third resistor, wherein

A negative input terminal of the operational amplifier is connected to a first output terminal of the voltage regulator circuit,

an output terminal of the operational amplifier is connected to a third gate terminal of the third MOSFET, an

A positive input terminal of the operational amplifier is connected to the output terminal of the voltage reference generation circuit, a third drain terminal of the third MOSFET, and a first terminal of the third resistor.

20. The voltage reference generation circuit of claim 19, wherein the first MOSFET and the second MOSFET are N-type MOSFETs, and wherein the third MOSFET is a P-type MOSFET configured to receive the input supply voltage at a third source terminal of the third MOSFET.

21. The voltage reference generation circuit of claim 19, wherein

A second gate terminal of the second MOSFET is connected to a second terminal of the third resistor and a second drain terminal of the second MOSFET, an

The second source terminal of the second MOSFET is grounded.

22. The voltage reference generation circuit of claim 19, wherein the operational amplifier is configured to:

comparing a first constant output voltage at the first output terminal to a voltage reference at an output terminal of the voltage reference generation circuit; and

controlling generation of a voltage reference at an output terminal of the voltage reference generation circuit based on the comparison, wherein the generated voltage reference is constant based on a change in the input supply voltage.

23. The voltage reference generation circuit of claim 22 wherein the generated voltage reference is constant based on changes in temperature around the voltage reference generation circuit.

Technical Field

Various embodiments of the present disclosure relate to voltage regulation. More particularly, various embodiments of the present disclosure relate to Metal Oxide Semiconductor Field Effect Transistor (MOSFET) based voltage regulator circuits.

Background

Advances in the field of analog and digital circuits have increased the utilization of voltage regulator circuits in different applications. Typically, a voltage regulator circuit includes bipolar transistors to provide a regulated output voltage. In some cases, bipolar transistor-based voltage regulator circuits provide less accuracy in output regulation with respect to variations in input supply voltage or temperature.

Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of the described systems with certain aspects of the present disclosure, as set forth in the remainder of the present application and with reference to the drawings.

Disclosure of Invention

A MOSFET-based voltage regulator circuit provided substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

These and other features and advantages of the present disclosure will be understood by reference to the following detailed description of the disclosure and the accompanying drawings, in which like reference numerals refer to like parts throughout.

Drawings

Fig. 1A is a first schematic diagram of an example MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure.

Fig. 1B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 1A, according to an embodiment of the present disclosure.

Fig. 2A is a schematic diagram of an example MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure.

Fig. 2B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 2A, according to an embodiment of the present disclosure.

Fig. 2C is a schematic diagram of the MOSFET-based voltage regulator circuit of fig. 2A, according to an embodiment of the disclosure.

Fig. 3 is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A connected with an operational amplifier, according to an embodiment of the disclosure.

Fig. 4A is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 3, according to an embodiment of the present disclosure.

Fig. 4B is a graph illustrating a change in output voltage based on a change in temperature around the MOSFET-based voltage regulator circuit of fig. 3, according to an embodiment of the present disclosure.

Fig. 5 is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A connected with an operational amplifier to provide a constant output current based on changes in input supply voltage and changes in temperature, according to an embodiment of the present disclosure.

Fig. 6A is a graph illustrating a change in output current based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 5, according to an embodiment of the present disclosure.

Fig. 6B is a graph of changes in output current based on changes in temperature of the MOSFET-based voltage regulator circuit of fig. 5, according to an embodiment of the present disclosure.

Fig. 7A is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A based on changes in temperature to provide a constant output voltage in an embodiment of the disclosure.

Fig. 7B is a graph illustrating a change in output voltage based on a change in temperature of the MOSFET-based voltage regulator circuit of fig. 7A, according to an embodiment of the present disclosure.

Fig. 8A is a schematic diagram of an example MOSFET-based voltage regulator circuit including a plurality of cascaded stages according to an embodiment of the disclosure.

Fig. 8B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 8A, according to an embodiment of the present disclosure.

Fig. 9A, 9B, 9C and 9D are exemplary schematic diagrams of a P-type MOSFET based voltage regulator circuit according to an embodiment of the present disclosure.

Fig. 10 is a flow chart illustrating an exemplary operation of a MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure.

Detailed Description

The embodiments described below may be found in the disclosed Metal Oxide Semiconductor Field Effect Transistor (MOSFET) based voltage regulator circuits. Exemplary aspects of the present disclosure provide unipolar transistor (i.e., MOSFET) -based voltage regulator circuits that may be used in various applications requiring low power consumption, less circuit complexity, and low silicon area, as compared to typical voltage regulator circuits that may be based on bipolar transistors. The disclosed MOSFET-based voltage regulator circuit may be configured to utilize negative feedback of the MOSFETs to improve stability of the disclosed voltage regulator circuit. The disclosed voltage regulator circuit may implement voltage regulation on changes in the input supply voltage of the voltage regulator circuit. Further, the disclosed voltage regulator circuit may achieve improved voltage regulation over changes in input supply voltage or temperature by utilizing multiple MOSFETs. Additionally, the disclosed MOSFET-based voltage regulator circuit may further enable voltage regulation over changes in temperature around the voltage regulator circuit by including an operational amplifier circuit.

Fig. 1A is a first schematic diagram of an example MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure. Referring to fig. 1A, a voltage regulator circuit 102 is shown. The voltage regulator circuit 102 may include an input terminal 104, a first resistor 106 (also denoted as "R1"), a second resistor 108 (also denoted as "R2"), a first MOSFET 110 (also denoted as "Q1"), and a first output terminal 112. The first MOSFET 110 may be an N-type MOSFET (or NMOS). Input terminal 104 of voltage regulator circuit 102 may be connected to a first terminal 106A of a first resistor 106.

According to an embodiment, the first gate terminal 110A of the first MOSFET 110 may be connected to the second terminal 106B of the first resistor 106 and the first terminal 108A of the second resistor 108. A first drain terminal 110B of the first MOSFET 110 may be connected to a second terminal 108B of the second resistor 108 and a first output terminal 112 of the voltage regulator circuit 102. The first source terminal 110C of the first MOSFET 110 may be grounded. According to an embodiment, the first resistor 106 may be connected in series with the second resistor 108. According to an embodiment, the ratio of the resistance value of the first resistor 106 to the resistance value of the second resistor 108 may be a defined ratio. In an embodiment, the resistance value of the first resistor 106 and the resistance value of the second resistor 108 may be based on the number of MOSFETs used in the voltage regulator circuit 102 and the channel length and width of the MOSFETs (e.g., the first MOSFET 110). For example, for a single MOSFET in the voltage regulator circuit 102, such as the first MOSFET 110, with a channel length (L) of 10 μm and a channel width (W) of 9 μm, the resistance value of the first resistor 106 may be 3.9K ohms and the resistance value of the second resistor 108 may be 7K ohms.

The voltage regulator circuit 102 may be configured to receive an input supply voltage (also denoted as "Vin") at an input terminal 104. The first MOSFET 110 may be configured to receive an input supply voltage Vin at a first gate terminal 110A of the first MOSFET 110 via a first resistor 106 (also denoted as "R1"). The first MOSFET 110 may also be configured to receive an input supply voltage Vin at the first gate terminal 110A based on a defined ratio. The first MOSFET 110 may also be configured to provide negative feedback and function or operate as a negative feedback amplifier.

According to an embodiment, the first MOSFET 110 may be further configured to provide a first constant output voltage at the first output terminal 112 based on a change in the input supply voltage Vin. In some embodiments, the voltage regulator circuit 102 may be configured to output a first constant output voltage at the first output terminal 112 based on a defined ratio of the resistance values of the first resistor 106 and the second resistor 108.

For example, as the input supply voltage Vin at the input terminal 104 of the voltage regulator circuit 102 increases, the current flow between the input terminal 104 and the first gate terminal 110A through the first resistor 106 may also increase. This may further increase the input voltage received at the first gate terminal 110A of the first MOSFET 110, wherein the increase of the input supply voltage may be based on the increase of the input supply voltage Vin and the defined ratio of the first resistor 106 to the second resistor 108.

According to an embodiment, an increase of the input supply voltage at the first gate terminal 110A above a defined gate threshold voltage may switch on the first MOSFET 110 in a pull-down configuration and may output a constant voltage at the drain terminal 110B of the first MOSFET 110. Thus, the voltage regulator circuit 102 may provide a first constant output voltage at the first output terminal 112. The output voltage at the drain terminal 110B or the first output terminal 112 may remain constant even if the input supply voltage Vin at the input terminal 104 changes (increases or decreases within a certain voltage range once the first MOSFET 110 is turned on). In some embodiments, the first constant output voltage may be a desired voltage required by the voltage regulator circuit 102. Thus, the first MOSFET 110 may be used to achieve voltage regulation resulting from the first constant output voltage provided by the voltage regulator circuit 102 over changes in the input supply voltage Vin.

In some embodiments, a second MOSFET circuit may be cascaded with the voltage regulator circuit 102 to provide a second constant output voltage. A second MOSFET circuit in cascade with the voltage regulator circuit 102 may be used to achieve additional voltage regulation. For example, a second MOSFET circuit in cascade with the voltage regulator circuit 102 is described in further detail in fig. 2A. In some other embodiments, multiple MOSFET circuits may be cascaded with the voltage regulator circuit 102 to achieve additional voltage regulation.

According to an embodiment, the voltage regulator circuit 102 may be connected with an operational amplifier to achieve a constant output voltage in response to changes in temperature around the voltage regulator circuit 102. The voltage regulator circuit 102, coupled to the operational amplifier, is described in further detail in fig. 3, for example. In some other embodiments, the voltage regulator circuit 102 may include a P-type MOSFET instead of an N-type MOSFET (such as the first MOSFET 110). The voltage regulator circuit 102 including the P-type MOSFET is described in further detail in fig. 9A, 9B, 9C, and 9D.

Fig. 1B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 1A, according to an embodiment of the present disclosure. FIG. 1B is explained in conjunction with elements from FIG. 1A. Referring to fig. 1B, a first graph 100 is shown. The first graph 100 indicates the input supply voltage (also denoted as Vin in volts on the X-axis) and the output voltage (in mV on the Y-axis) of the voltage regulator circuit 102. The input supply voltage Vin and output voltage values depicted at fig. 1A may be exemplary experimental or simulation data determined from the voltage regulator circuit 102, and may not be construed as limiting the present disclosure.

It can be observed from the first graph 100 that as the input supply voltage Vin (supplied at the input terminal 104) increases from 0.8V to 1.0V, the output voltage (output at the first output terminal 112) of the voltage regulator circuit 102 increases from 566mV to 582.5 mV. Furthermore, it may be observed that as the input supply voltage Vin increases from 1.0V to 1.3V, the voltage regulator circuit 102 may provide an almost constant output voltage as the output voltage at the first output terminal 112 of the voltage regulator circuit 102. In other words, for a 300mV change in the input supply voltage Vin, the change in the output voltage is approximately less than 1.0 mV. Accordingly, the voltage regulator circuit 102 may provide a constant output voltage (i.e., a first constant output voltage) at the first output terminal 112 based on changes in the input supply voltage Vin within a particular voltage range of 1.0V to 1.3V, as shown in the first graph 100.

Fig. 2A is a schematic diagram of an example MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure. Fig. 2A is explained in conjunction with elements from fig. 1A and 1B. Referring to fig. 2A, a first voltage regulator circuit 202 is shown that may be similar to the voltage regulator circuit 102 of fig. 1. The first voltage regulator circuit 202 may include an input terminal 204, a first resistor 206 (also denoted as "R1"), a second resistor 208 (also denoted as "R2"), a first MOSFET 210 (also denoted as "Q1"), and a first output terminal 212. The connections and functions of the first resistor 206, the second resistor 208, and the first MOSFET 210 may be similar to the first resistor 106, the second resistor 108, and the first MOSFET 110 of fig. 1A.

Referring to fig. 2A, further illustrated are a third resistor 214 (also denoted as "R3"), a second MOSFET 216 (also denoted as "Q2"), a second output terminal 218, and a second voltage regulator circuit 220. The second voltage regulator circuit 220 may include the first voltage regulator circuit 202, a third resistor 214, a second MOSFET 216, and a second output terminal 218. The second voltage regulator circuit 220 may be a MOSFET-based voltage regulator circuit (as depicted in fig. 1A) that includes two MOSFETs. According to an embodiment, the second MOSFET 216 may be an N-type MOSFET. The second MOSFET 216 may be cascaded with the first voltage regulator circuit 202.

The second gate terminal 216A of the second MOSFET 216 may be connected to the first output terminal 212 of the first MOSFET 210 and the first terminal 214A of the third resistor 214. The first output terminal 212 of the first MOSFET 210 may be an output terminal of the first voltage regulator circuit 202. A second drain terminal 216B of the second MOSFET 216 may be connected to a second terminal 214B of the third resistor 214 and a second output terminal 218 of a second voltage regulator circuit 220. The first source terminal 210C of the first MOSFET 210 and the second source terminal 216C of the second MOSFET 216 may be grounded, as shown in fig. 2A.

According to an embodiment, the first MOSFET 210 may be configured to receive an input supply voltage Vin at a first gate terminal 210A of the first MOSFET 210 via a first resistor 206. The first MOSFET 210 may also be configured to provide a first constant output voltage at the first output terminal 212 based on changes in the input supply voltage Vin, as depicted in fig. 1A. The second MOSFET 216 may be configured to receive the first constant output voltage at a second gate terminal 216A of the second MOSFET 216. The second MOSFET 216 may also be configured to provide negative feedback and function or operate as a negative feedback amplifier. The negative feedback provided by the second MOSFET 216 may improve the stability of the output at the second output terminal 218 of the second voltage regulator circuit 220. The second MOSFET 216 may be further configured to provide a second constant output voltage at the second output terminal 218 based on changes in the input supply voltage Vin. For example, based on an increase in the input supply voltage Vin at the input terminal 204, the first voltage regulator circuit 202 may provide a first constant output voltage at the first output terminal 212 and the third resistor 214. The first constant output voltage may be received at the second gate terminal 216A of the second MOSFET 216. If the first constant output voltage received at the second gate terminal 216A increases beyond the threshold gate voltage of the second MOSFET 216, the second MOSFET 216 may be turned on and operated in a pull-down configuration. In the on-state, the voltage drop at the second drain terminal 216B and the second output terminal 218 of the second MOSFET 216 may be substantially constant.

The second voltage regulator circuit 220 may be configured to provide a second constant output voltage at the second output terminal 218 even when there is a change (i.e., an increase or decrease) in the input supply voltage Vin at the input terminal 204 once the second MOSFET 216 may be turned on. The change in the output voltage at the second output terminal 218 may be minimal compared to the change in the input supply voltage Vin once the second MOSFET 216 may be in an on state. According to an embodiment, a resistance value of the third resistance of the third resistor 214 may be defined such that the second gate terminal 216A may receive an appropriate voltage from the first output terminal 212 to turn on the second MOSFET 216. A second MOSFET 216 in cascade with the first voltage regulator circuit 202 may be used to achieve additional voltage regulation on the first constant output voltage at the first output terminal 212 by the output of the second constant output voltage at the second output terminal 218.

Fig. 2B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 2A, according to an embodiment of the present disclosure. Fig. 2B is explained in conjunction with elements from fig. 2A. Referring to fig. 2B, a second graph 200 is shown. The second graph 200 indicates the input supply voltage (also denoted as Vin in volts on the X-axis) and the output voltage (in mV on the Y-axis) of the second voltage regulator circuit 220. The output voltage may be output at the second output terminal 218. The input supply voltage Vin and output voltage values depicted at fig. 2A may be exemplary experimental or simulation data determined from the second voltage regulator circuit 220 and may not be construed as limiting the present disclosure.

It may be observed from the second graph 200 that as the input supply voltage Vin (i.e., supplied at the input terminal 104) increases from 0.8V to 1.0V, the output voltage of the second voltage regulator circuit 220 (i.e., output at the second output terminal 218) increases from 387.25mV to 388.25mV (e.g., for example). Further, it may be observed that as the input supply voltage Vin increases from 1.0V to 1.6V, the second voltage regulator circuit 220 may provide an almost constant output voltage as the output voltage at the second output terminal 218. In other words, for a change of 600mV (i.e., 1.0V to 1.6V) of the input supply voltage Vin, the change of the output voltage is between 388.25mV to 387.25 mV. In other words, for a 600mV change in the input supply voltage Vin, the change in the output voltage may be 1.0 mV. Thus, the second voltage regulator circuit 220 may provide two or dual voltage adjustments (i.e., providing a 1.0mV change in output over a range of 600mV changes in input) as compared to the first voltage regulator circuit 202 or the voltage regulator circuit 102 (i.e., providing a 1.0mV change in output over a range of 300mV changes in input).

Fig. 2C is a schematic diagram of the MOSFET-based voltage regulator circuit of fig. 2A, according to an embodiment of the disclosure. Referring to fig. 2C, a second voltage regulator circuit 220 as described in fig. 2A is shown. The second voltage regulator circuit 220 may also include a fourth resistor 222 (also denoted as "R4"). The fourth resistor 222 may be connected in series with the third resistor 214. The first output terminal 212 may be connected with a first terminal 222A of a fourth resistor 222. The second gate terminal 216A of the second MOSFET 216 may be connected to the second terminal 222B of the fourth resistor 222 and the first terminal 214A of the third resistor 214.

The second MOSFET 216 may be configured to receive the first constant output voltage at a second gate terminal 216A of the second MOSFET 216 via a fourth resistor 222. The resistance value of the fourth resistor 222 may be defined such that the second gate terminal 216A may receive an appropriate voltage from the first output terminal 212 to turn on the second MOSFET 216. According to an embodiment, the operation of the second voltage regulator circuit 220 including the fourth resistor 222 in fig. 2C may be the same as the first voltage regulator circuit 202 as described in fig. 2A, and may not affect the operating range of the second voltage regulator circuit 220.

Fig. 3 is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A connected with an operational amplifier, according to an embodiment of the disclosure. Fig. 3 is described in conjunction with elements from fig. 1A and 2A. Referring to fig. 3, a voltage regulator circuit 302 is shown. The voltage regulator circuit 302 may correspond to the second voltage regulator circuit 220 of fig. 2A. The voltage regulator circuit 302 may include an input terminal 304, a first resistor 306 (also denoted as "R1"), a second resistor 308 (also denoted as "R2"), a first MOSFET 310 (also denoted as "Q1"), a first output terminal 312, a third resistor 314 (also denoted as "R3"), a second MOSFET 316 (also denoted as "Q2"), and a second output terminal 318. The first resistor 306, the second resistor 308, the first MOSFET 310, the third resistor 314, and the second MOSFET 316 may be similar in connection and function to the first resistor 206, the second resistor 208, and the first MOSFET 210, the third resistor 214, and the second MOSFET 216, respectively, of fig. 2A.

Referring to fig. 3, operational amplifier 320, positive input terminal 320A of operational amplifier 320, negative input terminal 320B of operational amplifier 320, and output terminal 320C of operational amplifier 320 are also shown. Also shown are a third MOSFET 322 (also denoted as "Q3"), a fourth MOSFET 324 (also denoted as "Q4"), a fifth resistor 326 (also denoted as "R5"), and a third output terminal 328. The voltage regulator circuit 302 may be connected to an operational amplifier 320. The combination of the voltage regulator circuit 302 and the operational amplifier 320 is referred to as a voltage reference generation circuit or a third voltage regulator circuit 300. The third output terminal 328 may be an output terminal of the voltage reference generation circuit.

According to an embodiment, the voltage regulator circuit 302 may be configured to receive an input supply voltage Vin at an input terminal 304. Negative input terminal 320B of operational amplifier 320 may be connected to second output terminal 318 of voltage regulator circuit 302. The positive input terminal 320A of the operational amplifier 320 may be connected to the third output terminal 328 of the voltage reference generating circuit, the fourth drain terminal 324B of the fourth MOSFET 324, and the first terminal 326A of the fifth resistor 326. The output terminal 320C of the operational amplifier 320 may be connected to a fourth gate terminal 324A of a fourth MOSFET 324.

According to an embodiment, the third MOSFET 322 may be an N-type MOSFET and the fourth MOSFET 324 may be a P-type MOSFET. The fourth MOSFET 324 may be configured to receive the input supply voltage Vin at a fourth source terminal 324C of the fourth MOSFET 324. According to an embodiment, the fourth MOSFET 324 may function as a current mirror circuit of the voltage reference generating circuit. According to an embodiment, the third gate terminal 322A of the third MOSFET 322 may be connected to the second terminal 326B of the fifth resistor 326 and the third drain terminal 322B of the third MOSFET 322. The third MOSFET 322 may be configured to provide negative feedback and function or operate as a negative feedback amplifier. As shown in fig. 3, the third source terminal 322C of the third MOSFET 322 may be grounded.

Operational amplifier 320 may be configured to compare the second constant output voltage received at second output terminal 318 to a voltage reference at a third output terminal 328 of the voltage reference generation circuit (or third voltage regulator circuit 300). The operational amplifier 320 may also be configured to control generation of a voltage reference at the third output terminal 328 based on the comparison. The generated voltage reference may be constant based on changes in the input supply voltage Vin. For example, the operational amplifier 320 may be configured to control the generation of the voltage reference such that the number of generated voltage references at the third output terminal 328 may be substantially constant even when the input supply voltage Vin varies within a certain range. The voltage reference obtained at the third output terminal 328 may be a desired voltage that may be required by the voltage reference generation circuit as a combination of the voltage regulator circuit 302 and the operational amplifier 320.

According to an embodiment, the generated voltage reference may be further constant based on a change in temperature around the voltage reference generation circuit (or the third voltage regulator circuit 300). The voltage reference generation circuit may utilize an operational amplifier 320 and a fourth MOSFET 324 (i.e., a current mirror circuit) to generate a constant voltage reference at a third output terminal 328 over changes in temperature. For example, the operational amplifier 320 may control the generation of the constant voltage reference at the third output terminal 328 even if the temperature around the voltage reference generation circuit changes. In some embodiments, the operational amplifier 320 may be configured to provide negative feedback to generate a constant voltage reference at the third output terminal 328 with better regulation than the second constant output voltage at the second output terminal 318 and the first constant output voltage at the first output terminal 312.

In some embodiments, the third voltage regulator circuit 300 or the voltage reference generation circuit may include only one MOSFET-based voltage regulator circuit (e.g., voltage regulator circuit 102 as described in fig. 1A), the operational amplifier 320, the third MOSFET 322, the fourth MOSFET 324, and the fifth resistor 326, without utilizing the second MOSFET 316 and the third resistor 314. In this case, the first output terminal 312 of the voltage regulator circuit 302 may be directly connected to the negative input terminal 320B of the operational amplifier 320. In some other embodiments, a plurality of MOSFETs may be cascaded with the second output terminal 318 of the voltage regulator circuit 302.

Fig. 4A is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 3, according to an embodiment of the present disclosure. Fig. 4A is explained in conjunction with elements from fig. 3. Referring to fig. 4A, a third graph 400A is shown. A third graph 400A indicates the input supply voltage (also denoted Vin in volts on the X-axis) and the output voltage (also denoted Vout in volts on the Y-axis) of the third voltage regulator circuit 300. The output voltage may be output at a third output terminal 328. The input supply voltage Vin and output voltage values depicted at fig. 4A may be exemplary experimental or simulation data determined from the third voltage regulator circuit 300 and may not be construed as limiting the present disclosure.

It can be observed from the third graph 400A that the output voltage of the third voltage regulator circuit 300 (i.e., output at the third output terminal 328) increases from 0V to 0.45V as the input supply voltage Vin (i.e., supplied at the input terminal 304) increases from 0.06V to 0.90V. Further, it may be observed that as the input supply voltage Vin increases from 0.90V to 1.20V, the third voltage regulator circuit 300 may provide an almost constant output voltage (e.g., 0.45V) as the output voltage at the third output terminal 328. As shown in fig. 4A, there may be a 0.5% change in the output voltage in response to a change in the input supply voltage from 0.90V to 1.20V. Thus, the third voltage regulator circuit 300 may provide better voltage regulation than the voltage regulator circuits depicted in fig. 1A and 2A.

Fig. 4B is a graph of changes in output voltage based on changes in temperature around the MOSFET-based voltage regulator circuit of fig. 3, according to an embodiment of the present disclosure. Fig. 4B is explained in conjunction with elements from fig. 3 and 4A. Referring to fig. 4B, a fourth graph 400B is shown. The fourth graph 400B indicates the temperature (in degrees celsius on the X-axis) and the output voltage (also expressed as Vout in volts on the Y-axis) of the third voltage regulator circuit 300. The temperature and output voltage values depicted at fig. 4B may be exemplary experimental or simulation data determined from the third voltage regulator circuit 300 and may not be construed as limiting the present disclosure.

It can be observed from the fourth graph 400B that as the temperature increases from-40 degrees celsius to 120 degrees celsius, the output voltage of the third voltage regulator circuit 300 (i.e., output at the third output terminal 328) decreases from 0.469V to 0.464V, and then increases from 0.464V to 0.467V. In other words, it can be observed from fig. 4A that there may be a 1.03% change in output voltage based on a change in temperature from-40 degrees celsius to 120 degrees celsius. Accordingly, the third voltage regulator circuit 300 may be configured to output an almost constant output voltage based on a change in temperature around the third voltage regulator circuit 300, as shown in the fourth graph 400B in fig. 4B.

Fig. 5 is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A connected with an operational amplifier to provide a constant output current based on changes in input supply voltage and changes in temperature, according to an embodiment of the present disclosure. Fig. 5 is described in conjunction with elements from fig. 1A, 2A, and 3. Referring to fig. 5, a fourth voltage regulator circuit 500 is shown including a second voltage regulator circuit 502, the second voltage regulator circuit 502 may correspond to the voltage regulator circuit 302 of fig. 3 or the second voltage regulator circuit 220 of fig. 2A. The second voltage regulator circuit 502 may include an input terminal 504, a first resistor 506 (also denoted as "R1"), a second resistor 508 (also denoted as "R2"), a first MOSFET 510 (also denoted as "Q1"), a first output terminal 512, a third resistor 514 (also denoted as "R3"), a second MOSFET 516 (also denoted as "Q2"), and a second output terminal 518. The first resistor 506, the second resistor 508, the first MOSFET 510, the third resistor 514, and the second MOSFET 516 may be similar in connection and function to the first resistor 206, the second resistor 208, the first MOSFET 210, the third resistor 214, and the second MOSFET 216, respectively, of fig. 2A.

Referring to fig. 5, an operational amplifier 520, a third MOSFET 522 (also denoted as "Q3"), a fourth MOSFET 524 (also denoted as "Q4"), a fifth resistor 526 (also denoted as "R5"), a fifth MOSFET 528 (also denoted as "Q5"), and a fourth output terminal 530 are also shown. The operational amplifier 520, the third MOSFET 522, and the fourth MOSFET 524 may be connected and function similar to the operational amplifier 320, the third MOSFET 322, and the fourth MOSFET 324 of fig. 3A, respectively. The second voltage regulator circuit 502 may be connected with an operational amplifier 520. Fourth output terminal 530 may be an output terminal of fourth voltage regulator circuit 500.

As shown in fig. 5, the negative input terminal 520B of the operational amplifier 520 may be connected to the second output terminal 518 of the second voltage regulator circuit 502. The positive input terminal 520A of the operational amplifier 520 may be connected to a fourth drain terminal 524B of the fourth MOSFET 524 and a third drain terminal 522B of the third MOSFET 522. The output terminal 520C of the operational amplifier 520 may be connected to the fourth gate terminal 524A of the fourth MOSFET 524 and the fifth gate terminal 528A of the fifth MOSFET 528. A fourth output terminal 530 of the fourth voltage regulator circuit 500 may be connected to a fifth drain terminal 528B of a fifth MOSFET 528, as shown in fig. 5.

According to an embodiment, the third MOSFET 522 may be an N-type MOSFET. The fourth MOSFET 524 and the fifth MOSFET 528 may be P-type MOSFETs. The fourth MOSFET 524 may be configured to receive the input supply voltage Vin at a fourth source terminal 524C of the fourth MOSFET 524. Similarly, the fifth MOSFET 528 may be configured to receive the input supply voltage Vin at a fifth source terminal 528C of the fifth MOSFET 528. The fourth MOSFET 524 may function as or as a current mirror circuit for the fourth voltage regulator circuit 500, and the third MOSFET 522 may be connected in parallel with the fifth resistor 526. As shown in fig. 5, the third gate terminal 522A of the third MOSFET 522 may be connected with the first terminal 526A of the fifth resistor 526. The second terminal 526B of the fifth resistor 526 and the source terminal 522C of the third MOSFET 522 may be connected to ground.

According to an embodiment, the parallel connection of the third MOSFET 522 and the fifth resistor 526 may be configured to provide a constant output current based on a change in the input supply voltage Vin. In some embodiments, the parallel connection of the third MOSFET 522 and the fifth resistor 526 may be further configured to provide a constant output current based on changes in temperature around the fourth voltage regulator circuit 500. A constant output current may be provided at the fourth output terminal 530. Therefore, based on the parallel connection of the third MOSFET 522 and the fifth resistor 526; and a fourth MOSFET 524 (current mirror circuit), the fourth voltage regulator circuit 500 may provide a constant output current at the fourth output terminal 530 regardless of changes in the input supply voltage Vin and temperature, as depicted in fig. 6A-6B.

Fig. 6A is a graph illustrating a change in output current based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 5, according to an embodiment of the present disclosure. Fig. 6A is explained in conjunction with elements from fig. 5. Referring to fig. 6A, a fifth graph 600A is shown. A fifth graph 600A indicates the input supply voltage (also denoted Vin in volts on the X-axis) and the output current (also denoted Iout in uA on the Y-axis) of the fourth voltage regulator circuit 500. The input supply voltage Vin and the output current value depicted at fig. 6A may be exemplary experimental or simulation data determined from the fourth voltage regulator circuit 500 and may not be construed as limiting the present disclosure.

It can be observed from the fifth graph 600A that the output current of the fourth voltage regulator circuit (i.e. output at the fourth output terminal 530) increases from 0uA to 80uA when the input supply voltage Vin increases from 0.06V to 0.90V. Further, it may be observed that as the input supply voltage Vin increases from 0.90V to 1.20V, the fourth voltage regulator circuit 500 may provide an almost constant output current, which is approximately 80uA by way of example. As shown in fig. 6A, there may be a variation of 0.68% in the output current based on a change in the input power voltage Vin from 0.90V to 1.20V. Accordingly, the fourth voltage regulator circuit 500 may be configured to output a substantially constant output current in response to changes in the input supply voltage Vin, as shown in the fifth graph 600A.

Fig. 6B is a graph of changes in output current based on changes in temperature of the MOSFET-based voltage regulator circuit of fig. 5, according to an embodiment of the present disclosure. Fig. 6B is explained in conjunction with elements from fig. 5. Referring to FIG. 6B, a sixth graph 600B is shown. A sixth plot 600B indicates the temperature (in degrees celsius on the X-axis) and output current (also expressed as Iout in uA on the Y-axis) of the fourth voltage regulator circuit 500. The temperature and output current values depicted at fig. 6B may be exemplary experimental or simulation data determined from the fourth voltage regulator circuit 500 and may not be construed as limiting the present disclosure.

From the sixth plot 600B, it can be observed that as the temperature increases from-40 degrees celsius to 120 degrees celsius, the output current (i.e., output at the fourth output terminal 530) first decreases from 81.80uA to 81.37uA, and then increases from 81.37uA to 81.70 uA. In other words, it can be observed from fig. 6B that there may be a 0.51% variation in the output current based on a change in temperature from-40 degrees celsius to 120 degrees celsius. Accordingly, the fourth voltage regulator circuit 500 may be configured to output a nearly constant output current based on changes in temperature, as shown in the sixth graph 600B.

Fig. 7A is a schematic diagram of the example MOSFET-based voltage regulator circuit of fig. 2A providing a constant output voltage based on changes in temperature, according to an embodiment of the disclosure. Fig. 7A is described in conjunction with elements from fig. 1A, 2A, 3, and 5. Referring to fig. 7A, a fifth voltage regulator circuit 700A is shown including a second voltage regulator circuit 702, the second voltage regulator circuit 702 may correspond to the voltage regulator circuit 302 of fig. 3 or the second voltage regulator circuit 220 of fig. 2A. Similar to fig. 2A, 3, and 5, the second voltage regulator circuit 702 may include an input terminal 704, a first resistor 706 (also denoted as "R1"), a second resistor 708 (also denoted as "R2"), a first MOSFET 710 (also denoted as "Q1"), a first output terminal 712, a third resistor 714 (also denoted as "R3"), a second MOSFET 716 (also denoted as "Q2"), and a second output terminal 718. The connection and operation of the second voltage regulator circuit 702 may be the same as the second voltage regulator circuit 220, as described in fig. 2A.

Referring to fig. 7A, a third MOSFET 720 (also denoted as "Q3"), a fourth MOSFET 722 (also denoted as "Q4"), a fourth resistor 724 (also denoted as "RT"), and a third output terminal 726 are also shown. The third MOSFET 720 and the fourth MOSFET 722 may be N-type MOSFETs. A second output terminal 718 of the second voltage regulator circuit 702 may be connected to a gate terminal 720A of a third MOSFET 720. The source terminal 720C of the third MOSFET 720 may be coupled to ground (i.e., grounded). The first terminal 724A of the fourth resistor 724 may be configured to receive the input supply voltage Vin. The gate terminal 722A of the fourth MOSFET 722 may be connected with the second terminal 724B of the fourth resistor 724. The fourth MOSFET 722 may be configured to provide negative feedback. The third output terminal 726 may be connected to a source terminal 722C of the fourth MOSFET 722 and a drain terminal 720B of the third MOSFET 720.

As described in fig. 2A, based on the operation of the first MOSFET 710 and the second MOSFET 716, the fifth voltage regulator circuit 700A may be configured to receive an input supply voltage Vin at an input terminal 704 and provide a constant second output voltage at a second output terminal 718. The fifth voltage regulator circuit 700A may be further configured to provide a third constant output voltage at the third output terminal 726 in response to a change in temperature around the fifth voltage regulator circuit 700A and a resistance value of the fourth resistor 724.

Fig. 7B is a graph of changes in output voltage based on changes in temperature of the MOSFET-based voltage regulator circuit of fig. 7A, according to an embodiment of the present disclosure. Fig. 7B is explained in conjunction with elements from fig. 7A. Referring to fig. 7B, a seventh graph 700B is shown. A seventh graph 700B indicates the temperature (in degrees celsius on the X-axis) and the output voltage (in mV on the Y-axis) of the fifth voltage regulator circuit 700A of fig. 7A. The temperature and output voltage values depicted at fig. 7B may be exemplary experimental or simulation data determined from the fifth voltage regulator circuit 700A and may not be construed as limiting the present disclosure.

As can be observed from the seventh graph 700B, in the case of the resistance value where RT ═ 0, the output voltage decreases as the temperature increases. Further, it may be observed that in case the resistance value of RT is a defined value (i.e. RT ═ 1x), the output voltage may be constant, since the fifth voltage regulator circuit 700A may provide a constant output voltage at the third output terminal 726 based on a change in temperature around the fifth voltage regulator circuit 700A. Further, from fig. 7B, it can be observed that in the case where the resistance value of RT is twice the defined value (i.e., RT — 2 ×), then the output voltage may increase based on a change in the temperature around the fifth voltage regulator circuit 700A.

Fig. 8A is a schematic diagram of an example MOSFET-based voltage regulator circuit including a plurality of cascaded stages according to an embodiment of the disclosure. Fig. 8A is described in conjunction with elements from fig. 1A, 2A, 3, and 5. Referring to fig. 8A, a sixth voltage regulator circuit 800A is shown, the sixth voltage regulator circuit 800A including a voltage regulator circuit 802 similar to the voltage regulator circuit 102 of fig. 1. The voltage regulator circuit 802 may be configured to receive an input supply voltage Vin at an input terminal 804 and output a first constant output voltage based on changes in the input supply voltage Vin, as described in fig. 1. The voltage regulator circuit 802 may implement a variation of 1mV as an output voltage with a 300mV change of the input supply voltage Vin, as shown in fig. 1A.

According to fig. 8A, the first output terminal 812 of the voltage regulator circuit 802 may be further connected to a first circuit 814. The first circuit 814 may include a third resistor 816 (also denoted as "R3"), a second MOSFET 818 (also denoted as "Q2"), and a second output terminal 820. A first terminal 816A of the third resistor 816 may be connected with the first output terminal 812. The gate terminal 818A of the second MOSFET 818 may be connected to the first output terminal 812 and the first terminal 816A of the third resistor 816. The voltage regulator circuit 802 connected with the first circuit 814 may be configured to output a second constant output voltage at the second output terminal 820 based on changes in the input supply voltage Vin. The combination of voltage regulator circuit 802 and first circuit 814 is similar to second voltage regulator circuit 220 described in fig. 2A. The combination may provide a second constant output voltage at the second output terminal 820. The second constant output voltage may vary by 1mV based on changes in the input supply voltage within a 600mV range, as described in fig. 2B. Thus, the second constant output voltage may be an additional regulated voltage compared to the first constant output voltage provided by the voltage regulator circuit 802.

According to an embodiment, the second output terminal 820 of the first circuit 814 may be further connected to a second circuit 822. The second circuit 822 may include a fourth resistor 824 (also denoted as "R4"), a third MOSFET 826 (also denoted as "Q3"), and a third output terminal 828. A first terminal 824A of a fourth resistor 824 (also denoted as "R4") may be connected with the second output terminal 820. A gate terminal 826A of the third MOSFET 826 may be connected with the second output terminal 820 and a first terminal 824A of the fourth resistor 824. As shown in fig. 8A, the first circuit 814 is similar in connection and function to the second circuit 822. The second circuit 822 may be configured to output a third constant output voltage at the third output terminal 828 based on a change in the input supply voltage Vin. The second circuit 822 may be used to implement additional voltage regulation compared to that provided by the voltage regulator circuit 802 connected with the first circuit 814. For example, the voltage regulation provided by the second circuit 822 in cascade with the first circuit 814 and the voltage regulator circuit 802 may be twice the voltage regulation provided by the combination of the first circuit 814 and the voltage regulator circuit 802.

According to an embodiment, the second circuit 822 may be further cascaded with a similar regulating circuit or stage as shown in fig. 8A. With each stage, the sixth voltage regulator circuit 800A may increase output voltage regulation based on changes in the input supply voltage within a particular range. For example, the nth circuit shown in fig. 8A may provide 2 for the input supply voltage Vin as compared to the first constant output voltage provided by the voltage regulator circuit 802^NConstant output voltage that varies by multiple volts. Thus, the larger the number of MOSFET-based voltage regulator circuits, the better the voltage regulation or the generation of a constant voltage reference for a wider range of variations in input supply voltage and temperature.

Fig. 8B is a graph illustrating a change in output voltage based on a change in input supply voltage of the MOSFET-based voltage regulator circuit of fig. 8A, according to an embodiment of the present disclosure. Fig. 8B is explained in conjunction with elements from fig. 8A. Referring to fig. 8B, an eighth graph 800B is shown. An eighth graph 800B indicates the input supply voltage (also denoted as Vin in volts on the X-axis) and the output voltage of the second circuit 822 of fig. 8A (in mV on the Y-axis). The output voltage may be output at a third output terminal 828. The input supply voltage Vin and output voltage values depicted at fig. 8B may be exemplary experimental or simulation data determined from the second circuit 822 and may not be construed as limiting the present disclosure.

It can be observed from the eighth graph 800B that as the input supply voltage Vin (i.e., supplied at the input terminal 804) increases from 0.8V to 1.0V, the output voltage of the second circuit 822 increases from 343.3mV to 343.8mV, for example. Further, it can be observed that as the input supply voltage Vin increases from 1.0V to 1.6V, the second circuit 822 can provide an almost constant output voltage (as a third constant output voltage) that is between 343.8mV to 343.5 mV. In other words, the change in the output voltage of the second circuit 822 is 0.30mV for a 600mV change in the input supply voltage Vin. Accordingly, the voltage regulator circuit 802 in cascade with the first circuit 814 and the second circuit 822 may be configured to output an almost constant output voltage based on a change in the input power supply voltage Vin within a certain range, as shown in the eighth graph 800B. As shown in fig. 1B, 2B, and 8B, as the number of MOSFET circuits cascaded with the voltage regulator circuit 102 of fig. 1 (or the voltage regulator circuit 802 of fig. 8A) increases, the change of the output voltage based on the change of the input power supply voltage Vin decreases. Thus, as the number of MOSFET circuits cascaded with the voltage regulator circuit 102 of fig. 1 increases, improved voltage regulation or voltage reference generation may be achieved.

Fig. 9A, 9B, 9C and 9D are exemplary schematic diagrams of a P-type MOSFET based voltage regulator circuit according to an embodiment of the present disclosure. Referring to fig. 9A, a voltage regulator circuit 902 is shown. The voltage regulator circuit 902 may include an input terminal 904, a first MOSFET 906 (also denoted as "Q1"), a first resistor 908 (also denoted as "R1"), a second resistor 910 (also denoted as "R2"), and a first output terminal 912.

According to an embodiment, the first MOSFET 906 may be a P-type MOSFET (or PMOS). A first source terminal 906C of the first MOSFET 906 may be connected with the input terminal 904 and may be configured to receive an input supply voltage Vin. The gate terminal 906A of the first MOSFET 906 may be connected with a first terminal 908A of a first resistor 908 and a second terminal 910B of a second resistor 910. The first output terminal 912 may be connected with the drain terminal 906B of the first MOSFET 906 and the first terminal 910A of the second resistor 910. A second terminal 908B of the first resistor 908 may be connected to ground. According to an embodiment, a ratio of the resistance value of the first resistor 908 and the resistance value of the second resistor 910 may be defined. In an embodiment, the resistance value of the first resistor 908 and the resistance value of the second resistor 910 may be based on the number of MOSFETs used in the voltage regulator circuit 902, the channel length and the channel width of the MOSFETs (e.g., the first MOSFET 906). The voltage regulator circuit 902 may be configured to receive an input supply voltage Vin at a first source terminal 906C of the first MOSFET 906. The first MOSFET 906 may also be configured to operate in a pull-up configuration and may provide a first constant output voltage or a regulated output voltage at the first output terminal 912 based on changes in the input supply voltage Vin, as described in detail in fig. 1A for an N-type MOSFET voltage regulator circuit.

Referring to fig. 9B, a voltage regulator circuit 902 is shown connected to a first circuit 914. The first circuit 914 may include a second MOSFET 916 (also denoted as "Q2"), a third resistor 918, and a second output terminal 920. The second MOSFET 916 may be a P-type MOSFET. The source terminal 916C of the second MOSFET 916 may be configured to receive an input supply voltage Vin. Gate terminal 916A of second MOSFET 916 may be connected with first output terminal 912 of voltage regulator circuit 902 and second terminal 918B of third resistor 918. The second output terminal 920 may be connected with the drain terminal 916B of the second MOSFET 916 and the first terminal 918A of the third resistor 918. The second MOSFET 916 may be configured to receive the first constant output voltage from the first output terminal 912 at the gate terminal 916A. According to an embodiment, the second MOSFET 916 may also be configured to operate in a pull-up configuration and may provide a second constant output voltage at the second output terminal 920 based on a change in the input supply voltage Vin. The voltage regulator circuit 902 may be cascaded with the first circuit 914 to enable additional voltage regulation over changes in the input supply voltage Vin compared to the first constant output voltage provided by the voltage regulator circuit 902, as described in detail in fig. 2A for the N-type MOSFET based second voltage regulator circuit 220.

Referring to fig. 9C, a voltage regulator circuit 902 is shown in cascade with a first circuit 914 and a second circuit 922. The second circuit 922 may include a third MOSFET 924 (also denoted as "Q3"), a fourth resistor 926 (also denoted as "R4"), and a third output terminal 928. The third MOSFET 924 can be a P-type MOSFET. The source terminal 924C of the third MOSFET 924 may be configured to receive the input supply voltage Vin. A gate terminal 924A of the third MOSFET 924 may be connected with the second output terminal 920 of the first circuit 914 and a second terminal 926B of a fourth resistor 926. The third output terminal 928 may be connected to the drain terminal 924B of the third MOSFET 924 and the first terminal 926A of the fourth resistor 926. The third MOSFET 924 may be configured to receive the second constant output voltage from the second output terminal 920, operate in a pull-up configuration, and provide a third constant output voltage at the third output terminal 928 based on a change in the input supply voltage Vin. The voltage regulator circuit 902 may be cascaded with the first circuit 914 and the second circuit 922 to achieve additional voltage regulation over changes in the input supply voltage, as compared to the output voltage provided by the combination of the voltage regulator circuit 902 cascaded with the first circuit 914.

Referring to fig. 9D, a voltage regulator circuit 900 is shown in which a plurality of P-type MOSFET based voltage regulator circuits are cascaded similar to the N-type MOSFET based cascaded voltage regulator circuit depicted in fig. 8A. The voltage regulation of the output voltage increases as the input supply voltage Vin changes at each stage of the cascaded voltage regulator circuit shown in fig. 9D.

Fig. 10 is a flow chart illustrating an exemplary operation of a MOSFET-based voltage regulator circuit, according to an embodiment of the present disclosure. Fig. 10 is described in conjunction with elements from fig. 1A, 1B, 2A, 2B, 2C, 3, 4A, 4B, 5, 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B, 9C, and 9D. Referring to fig. 10, a flow chart 1000 is shown. The operations of the flow diagram may be performed by the voltage regulator circuit 102. Operations may begin at 1002 and proceed to 1004.

At 1004, an input supply voltage Vin may be received at a first gate terminal 110A of the first MOSFET 110 via the first resistor 106. The first MOSFET 110 may be configured to receive an input supply voltage Vin at a first gate terminal 110A of the first MOSFET 110. The first MOSFET 110 may be an N-type MOSFET. For example, the connections of the voltage regulator circuit 102 are shown and described in FIG. 1A.

At 1006, based on a change in the input supply voltage Vin, a first constant output voltage may be provided at the first output terminal 112. The first MOSFET 110 may be configured to provide a first constant output voltage at a first output terminal 112. For example, the operation of the first MOSFET 110 providing the first constant output voltage is described in fig. 1A and 1B.

At 1008, a first constant output voltage may be received at the second gate terminal 216A of the second MOSFET 216. The second MOSFET 216 may be configured to receive the first constant output voltage at a second gate terminal 216A of the second MOSFET 216. The second MOSFET 216 may be an N-type MOSFET. The voltage regulator circuit 102 including the second MOSFET 216 may correspond to the second voltage regulator circuit 220 of fig. 2A. The connection and operation of the second voltage regulator circuit 220 is shown and described, for example, in fig. 2A.

At 1010, based on the change in the input supply voltage Vin, a second constant output voltage may be provided at the second output terminal 218. The second MOSFET 216 may be configured to provide a second constant output voltage at a second output terminal 218. For example, the operation of the second MOSFET 216 providing the second constant output voltage is described in fig. 2A and 2B. Voltage regulation using two MOSFETs may be improved voltage regulation compared to voltage regulation using a single MOSFET. Control may pass to an end.

Exemplary aspects of the present disclosure may include a voltage regulator circuit 102, the voltage regulator circuit 102 including a first resistor 106 (also denoted as "R1"), a second resistor 108 (also denoted as "R2"), and a first Metal Oxide Semiconductor Field Effect Transistor (MOSFET)110 (also denoted as "Q1"). A first gate terminal of the first MOSFET 110 may be connected to a second terminal of the first resistor 106 and a first terminal of the second resistor 108. A first drain terminal of the first MOSFET 110 may be connected to a second terminal of the second resistor 108 and a first output terminal 112 of the voltage regulator circuit 102. The first MOSFET 110 may be configured to receive an input supply voltage at a first gate terminal of the first MOSFET 110 via a first resistor 106. The first MOSFET 110 can be further configured to provide a first constant output voltage at the first output terminal 112 based on changes in the input supply voltage.

According to an embodiment, the first MOSFET 110 may be an N-type MOSFET. The first MOSFET 110 can also be configured to provide negative feedback. A ratio of the resistance value of the first resistor 106 and the resistance value of the second resistor 108 may be defined. The first MOSFET 110 can also be configured to receive an input supply voltage at the first gate terminal based on a defined ratio. According to an embodiment, the voltage regulator circuit 102 may also include a second MOSFET 216 (also denoted as "Q2") and a third resistor 214 (also denoted as "R3"). A second gate terminal of the second MOSFET 216 may be connected to a first output terminal of the first MOSFET 110 and a first terminal of the third resistor 214. A second drain terminal of the second MOSFET 216 may be connected to a second terminal of the third resistor 214 and to a second output terminal 218. The first source terminal of the first MOSFET 110 and the second source terminal of the second MOSFET 216 may be grounded. The second MOSFET 216 may be an N-type MOSFET. The second MOSFET 216 may be configured to receive the first constant output voltage at a second gate terminal of the second MOSFET 216. The second MOSFET 216 may also be configured to provide a second constant output voltage at the second output terminal 218 based on changes in the input supply voltage. The voltage regulator circuit 102 may also include a fourth resistor 222 connected between the first output terminal 212 and a first terminal of the third resistor 214.

According to an embodiment, the voltage regulator circuit 102 may also include an operational amplifier such as operational amplifier 320, a third MOSFET 322 (also denoted as "Q3"), a fourth MOSFET 324 (also denoted as "Q4"), and a fifth resistor (such as the fourth resistor 326 in fig. 3). The negative input terminal of operational amplifier 320 may be connected to a second output terminal of voltage regulator circuit 102. The output terminal of the operational amplifier 320 may be connected to a fourth gate terminal of the fourth MOSFET 324. A positive input terminal of the operational amplifier 320 may be connected to a third output terminal of the voltage regulator circuit 102, a fourth drain terminal of the fourth MOSFET 324, and a first terminal of the fifth resistor. The third MOSFET 322 may be an N-type MOSFET, and the fourth MOSFET 324 may be a P-type MOSFET configured to receive the input supply voltage at a fourth source terminal of the fourth MOSFET 324. A third gate terminal of the third MOSFET 322 may be connected to a second terminal of the fifth resistor and a third drain terminal of the third MOSFET 322. The third source terminal of the third MOSFET 322 may be connected to ground.

The operational amplifier 320 may be configured to compare the second constant output voltage at the second output terminal to a voltage reference at a third output terminal of the voltage regulator circuit 102. The operational amplifier 320 may also be configured to control generation of a voltage reference at the third output terminal of the voltage regulator circuit 102 based on the comparison. The generated voltage reference may be constant based on changes in the input supply voltage. The generated voltage reference may be constant based on changes in temperature around the voltage regulator circuit 102. According to an embodiment, the third MOSFET 322 and the fifth resistor may be connected in parallel. A third gate terminal of the third MOSFET 322 may be connected to a third output terminal of the voltage regulator circuit and a first terminal of a fifth resistor. The parallel connection between the third MOSFET 322 and the fifth resistor may be configured to provide a constant output current based on changes in the input supply voltage and the temperature around the voltage regulator circuit 102.

The present disclosure may be realized in hardware or a combination of hardware and software. The present disclosure may be realized in a centralized fashion in at least one computer system or in a distributed fashion where different elements are spread across several interconnected computer systems. A computer system or other apparatus adapted for carrying out the methods described herein may be suitable. The combination of hardware and software can be a general purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein. The present disclosure may be implemented in hardware comprising a portion of an integrated circuit that also performs other functions.

The present disclosure may also be embedded in a computer program product, which comprises all the features enabling the implementation of the methods described herein, and which-when loaded in a computer system-is able to carry out these methods. In the present context, a computer program means any expression, in any language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: A) conversion to another language, code or notation; B) replication takes place in different physical forms.

While the disclosure has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the disclosure. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the disclosure without departing from the scope thereof. Therefore, it is intended that the disclosure not be limited to the particular embodiments disclosed, but that the disclosure will include all embodiments falling within the scope of the appended claims.