阅读说明：本技术 具有低折射率和低水蒸气穿透率的湿气阻挡膜 (Moisture barrier film with low refractive index and low water vapor transmission rate ) 是由 吴文豪 陈志坚 任东吉 于 2019-07-10 设计创作，主要内容包括：本公开内容的实施方式大体涉及有机发光二极管装置,并且更特别涉及用于OLED装置的湿气阻挡膜。OLED装置包括薄膜封装结构和/或薄膜晶体管。湿气阻挡膜被用来作为薄膜封装结构中的第一阻挡层和薄膜晶体管中的钝化层和/或栅极绝缘层。湿气阻挡膜包括氮氧化硅材料,氮氧化硅材料具有小于约1.5的低折射率、小于约5.0×10～(-5)g/m～(2)/天的低水蒸气穿透率和小于约8％的低氢含量。(Embodiments of the present disclosure generally relate to organic light emitting diode devices, and more particularly, to moisture barrier films for OLED devices. The OLED device includes a thin film encapsulation structure and/or a thin film transistor. The moisture barrier film is used as a first barrier layer in a thin film encapsulation structure and a passivation layer and/or a gate insulating layer in a thin film transistor. The moisture barrier film includes a silicon oxynitride material having a low refractive index, small of less than about 1.5At about 5.0X 10 ‑5 g/m 2 Low water vapor transmission per day and low hydrogen content of less than about 8%.)

1. A thin film encapsulation structure, comprising:

a first barrier layer comprising a silicon oxynitride material having a refractive index of about 1.46 to about 1.48, less than about 5.0 x 10^-5g/m²A water vapor transmission rate per day and a hydrogen content of less than about 8%;

a buffer layer disposed on the first barrier layer; and

a second barrier layer disposed on the buffer layer.

2. The thin film encapsulation structure of claim 1, wherein the second barrier layer comprises the same material as the first barrier layer.

3. The thin film encapsulation structure of claim 1, wherein the second barrier layer comprises a different material than the first barrier layer.

4. The thin film encapsulation structure of claim 1, wherein the first barrier layer has a thickness of about 0.5 microns to about 3 microns.

5. The film encapsulation structure of claim 1, wherein

The silicon oxynitride material has a percent change in thickness of about 104% to about 106% at 85 degrees celsius and 85% relative humidity.

6. A thin film transistor includes

A gate electrode;

a gate insulating layer disposed over the gate, the gate insulating layer comprising a silicon oxynitride material having a refractive index of less than about 1.46 to about 1.48, less than about 5.0 x 10^-5g/m²A water vapor transmission rate per day and a hydrogen content of less than about 6%;

a semiconductor layer disposed over the gate insulating layer;

a drain electrode disposed over the semiconductor layer;

a source disposed adjacent to the drain; and

a passivation layer disposed over the drain electrode, the source electrode, and the semiconductor layer.

7. The thin film transistor of claim 6, wherein the passivation layer comprises the silicon oxynitride material having a refractive index of about 1.46 to about 1.48, less than about 5.0 x 10^-5g/m²Water vapor transmission rate per day and a hydrogen content of less than about 6%.

8. The thin film transistor of claim 7, wherein

The passivation layer is deposited by a plasma enhanced chemical vapor deposition process at a temperature of less than about 300 degrees Celsius, or

The silicon oxynitride material has a percent change in thickness of about 104% to about 106% at 85 degrees celsius and 85% relative humidity.

9. The thin film transistor of claim 7, wherein the silicon oxynitride material of the gate insulating layer is combined with a layer comprising silicon oxide to form a bilayer.

10. The thin film transistor of claim 9, wherein the double layer of the silicon oxynitride material is disposed adjacent to the gate electrode and the layer comprising silicon oxide is disposed adjacent to the semiconductor layer, the drain electrode, and the source electrode.

11. The thin film transistor of claim 7, wherein the silicon oxynitride material of the passivation layer is combined with a layer comprising silicon oxide to form a bilayer.

12. The thin film transistor of claim 11, wherein the silicon oxide-comprising layer of the bi-layer is disposed adjacent to the semiconductor layer, the drain electrode, and the source electrode, and the silicon oxynitride material is disposed on the silicon oxide-comprising layer.

13. A display device, comprising:

a light emitting device;

a cover layer disposed over the light emitting device; and

a film encapsulation structure disposed over the cover layer, the film encapsulation structure comprising:

a first barrier layer disposed over the capping layer, the first barrier layer comprising a silicon oxynitride material, the silicon oxynitride materialThe silicon material has a refractive index of about 1.46 to about 1.48, less than about 5.0 x 10^-5g/m²A water vapor transmission rate per day and a hydrogen content of less than about 8%;

a buffer layer disposed on the first barrier layer; and

a second barrier layer disposed on the buffer layer.

14. The display device of claim 13, wherein

The light-emitting device is an organic light-emitting diode device, or

The second barrier layer comprises the same material as the first barrier layer.

15. The display device of claim 13, wherein the silicon oxynitride material has a percent change in thickness of about 104% to about 106% at 85 degrees celsius and 85% relative humidity.

Technical Field

Embodiments of the present disclosure relate generally to Organic Light Emitting Diode (OLED) devices and, more particularly, to moisture barrier films for OLED devices.

Background

OLED structures are used in the manufacture of television screens, computer monitors, mobile phones, other handheld devices, and the like, for displaying information. Recently, OLED displays have received high attention in display applications due to their faster response time, larger viewing angle, higher contrast, lighter weight, lower power consumption, and adaptability to flexible substrates, for example, as compared to Liquid Crystal Displays (LCDs).

OLED structures may have a limited lifetime characterized by reduced electroluminescent (electroluminescence) efficiency and increased drive voltage. The main reason for the degradation of the OLED structure is the formation of non-emissive (non-emissive) dark spots due to moisture or oxygen ingress. For this reason, OLED structures are typically encapsulated with an organic layer sandwiched between multiple inorganic layers that act as moisture barriers. However, such a package structure may cause interference between layers, resulting in optical loss of about 30% or more.

Accordingly, there is a need for an improved encapsulation structure for OLED structures.

Disclosure of Invention

Embodiments of the present disclosure relate generally to organic light emitting diode devices and, more particularly, to moisture for OLED devicesA barrier film. The OLED device includes a thin film encapsulation structure and/or a thin film transistor. The moisture barrier film is used as a first barrier layer in a thin film encapsulation structure and a passivation layer and/or a gate insulating layer in a thin film transistor. The moisture barrier film comprises a silicon oxynitride (silicon oxynitride) material having a low refractive index (refractive index) of less than about 1.5, less than about 5.0 x 10^-5g/m²A low water vapor transmission rate per day and a low hydrogen content of less than about 8% (hydrogen content).

In one embodiment, the thin film encapsulation structure includes a first barrier layer including a silicon oxynitride material having a refractive index of about 1.46 to about 1.48, less than about 5.0 x 10^-5g/m²Water vapor transmission rate per day and a hydrogen content of less than about 8%. The buffer layer is disposed on the first barrier layer, and the second barrier layer is disposed on the buffer layer.

In another embodiment, a thin film transistor includes a gate electrode, a gate insulating layer disposed over the gate electrode, the gate insulating layer including a silicon oxynitride material having a refractive index of about 1.46 to about 1.48, less than about 5.0 x 10^{- 5}g/m²Water vapor transmission rate per day and a hydrogen content of less than about 6%. The semiconductor layer is disposed over the gate insulating layer, the drain electrode is disposed over the semiconductor layer, the source electrode is disposed adjacent to the drain electrode, and the passivation layer is disposed over the drain electrode, the source electrode, and the semiconductor layer.

In yet another embodiment, a display device includes a light emitting device, a cover layer disposed over the light emitting device, and a thin film encapsulation structure disposed over the cover layer. The thin film encapsulation structure comprises a first barrier layer arranged on the covering layer, wherein the first barrier layer comprises silicon oxynitride material with a refractive index of about 1.46 to about 1.48 and less than about 5.0 x 10^-5g/m²Water vapor transmission rate per day and a hydrogen content of less than about 8%. The buffer layer is disposed on the first barrier layer, and the second barrier layer is disposed on the buffer layer.

Drawings

So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.

Fig. 1 is a sectional view of a plasma enhanced chemical vapor deposition apparatus (plasma enhanced chemical vapor deposition apparatus) according to an embodiment.

Fig. 2 is a cross-sectional view of a display device on which a thin film encapsulation structure is disposed according to an embodiment.

Fig. 3A to 3B illustrate schematic cross-sectional views of thin film transistors for display devices according to various embodiments.

To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is to be understood that elements and features of one embodiment may be beneficially incorporated in other embodiments without additional recitation.

Detailed Description

Embodiments of the present disclosure generally relate to organic light emitting diode devices and, more particularly, to moisture barrier films for OLED devices. The OLED device includes a thin film encapsulation structure and/or a thin film transistor. The moisture barrier film is used as a first barrier layer in a thin film encapsulation structure and a passivation layer and/or a gate insulating layer in a thin film transistor. The moisture barrier film comprises a silicon oxynitride material having a low refractive index of less than about 1.5, less than about 5.0 x 10^-5g/m²Low water vapor transmission per day and low hydrogen content of less than about 8%.

FIG. 1 is a schematic cross-sectional view of a Plasma Enhanced Chemical Vapor Deposition (PECVD) apparatus 101 that may be used to perform the operations described herein. The PECVD apparatus 101 includes a chamber 100 in which one or more films may be deposited on a substrate 120. The chamber 100 generally includes a plurality of walls 102, a bottom 104, and a showerhead 106, the plurality of walls 102, bottom 104, and showerhead 106 collectively defining a processing volume. The processing volume may be a vacuum environment. A substrate support 118 is disposed within the processing volume. The substrate 120 may be moved into and out of the chamber 100 through the slit valve opening 108 to access the processing volume. The substrate support 118 may be coupled to the actuator 116 to raise and lower the substrate support 118. The lift pins 122 are movably disposed through the substrate support 118 to move the substrate 120 to or from the substrate receiving surface. The substrate support 118 may also include a heating and/or cooling assembly 124 to maintain the substrate support 118 at a desired temperature. The substrate support 118 may also include a Radio Frequency (RF) return band 126 to provide an RF return path at the edge of the substrate support 118.

The showerhead 106 is coupled to the backing plate 112 by a fastening mechanism 150. The showerhead 106 may be coupled to the backing plate 112 by one or more fastening mechanisms 150 to help avoid sag (sag) of the showerhead 106 and/or control straightness (straightness)/curvature (curvature) of the showerhead 106.

A gas source 132 is coupled to the backing plate 112 to provide gas to the processing region between the showerhead 106 and the substrate 120 through gas passages in the showerhead 106. A vacuum pump 110 is coupled to the chamber 100 to maintain the process volume at a desired pressure. The RF source 128 is coupled to the backing plate 112 and/or to the showerhead 106 through a match network 190 to provide RF current to the showerhead 106. The RF current creates an electric field (electric field) between the showerhead 106 and the substrate support 118 such that a plasma may be generated from the gas between the showerhead 106 and the substrate support 118.

A remote plasma source 130, such as an inductively coupled (inductively coupled) remote plasma source 130, may also be coupled between the gas source 132 and the backing plate 112. Between processing multiple substrates, a cleaning gas may be provided to the remote plasma source 130 to generate a remote plasma. Radicals (radials) from the remote plasma may be provided to the chamber 100 to clean various components of the chamber 100. The cleaning gas may be further energized (excited) by an RF source 128 provided to the showerhead 106.

The showerhead 106 may also be coupled to the backing plate 112 by a showerhead hanger 134. In one embodiment, showerhead hanger 134 is a flexible metal skirt (skirt). Showerhead hanger 134 may have a lip 136 and showerhead 106 may rest on lip 136. The backing plate 112 may be disposed on an upper surface of a ledge 114 to seal the chamber 100 to form a vacuum environment, the ledge 114 being coupled to the chamber walls 102.

Fig. 2 is a schematic cross-sectional view of a display device 200 according to an embodiment, on which a Thin Film Encapsulation (TFE) structure 214 is disposed on the display device 200. The display device 200 includes a substrate 202. The substrate 202 may be made of a silicon-containing material, glass, polyimide (polyimide), or plastic, such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN). The light emitting device 204 is disposed on the substrate 202. The light emitting device 204 may be an OLED structure or a quantum-dot (quantum-dot) structure. A contact layer (not shown) may be disposed between the light emitting device 204 and the substrate 202, and the contact layer is in contact with the substrate 202 and the light emitting device 204.

A cover layer 206 is disposed over the light emitting devices 204 and the substrate 202. The capping layer 206 may have a refractive index of about 1.7 to about 1.8. A thin metal layer (not shown) may be disposed over the capping layer 206. A first barrier layer 208 is disposed on the capping layer 206 or thin metal layer. A buffer layer 210 is disposed on the first barrier layer 208. The second barrier layer 212 is disposed on the buffer layer 210. The first barrier layer 208, the buffer layer 210, and the second barrier layer 212 include a TFE structure 214. The first barrier layer 208 and the second barrier layer 212 are moisture barrier films or layers.

The TFE structure 214 may have a thickness of about 2 microns (μm) to about 10 microns, for example, about 4 microns. Buffer layer 210 has a thickness from about 2 microns to about 5 microns. The first barrier layer 208 and the second barrier layer 212 may each have a thickness of about 0.5 microns to about 3 microns. For example, the first barrier layer 208 and the second barrier layer 212 may each have a thickness of about 1 micron, and the buffer layer 210 may have a thickness of about 2 microns. The first barrier layer 208 and the second barrier layer 212 may comprise the same material, or the first barrier layer 208 and the second barrier layer 212 may comprise different materials. Further, the first barrier layer 208 and the second barrier layer 212 may have the same thickness, or the first barrier layer 208 and the second barrier layer 212 may have different thicknesses.

The buffer layer 210 may include an organic material having a refractive index of about 1.5. The buffer layer 210 may include an organosilicon compound (organosilicon compounds), such as plasma-polymerized hexamethyldisiloxane (pp-HMDSO), fluorinated plasma-polymerized hexamethyldisiloxane (pp-HMDSO: F), and Hexamethyldisilazane (HMDSN). Alternatively, the buffer layer 210 may be a polymer material composed of hydrocarbon compounds (hydrocarbons). The polymer material may have C_xH_yO_zWherein x, y and z are integers. In one embodiment, the buffer layer 210 may be selected from the group consisting of polyacrylate (polyacrylate), parylene (parylene), polyimide (polyimide), polytetrafluoroethylene (polytetrafluoroethylene), copolymer of fluorinated ethylene propylene (copolymer of fluorinated ethylene propylene), perfluoroalkoxy copolymer resin (perfluoroalkoxy copolymer resin), copolymer of ethylene and tetrafluoroethylene (copolymer of ethylene and tetrafluoroethylene), and parylene (parylene). In one particular example, the buffer layer 210 is a polyacrylate or parylene.

The first barrier layer 208 comprises a material comprising silicon oxynitride (SiON). The SiON material of first barrier layer 108 has a refractive index of less than about 1.5 at 632 nanometers (nm), e.g., about 1.46 to about 1.48, and has a relative humidity (relative humidity) of less than about 5.0 x 10 at 40 degrees celsius and 100 percent^-5g/m²Water vapor transmission rate per day (WVTR). The SiON material of the first buffer layer 108 has a composition of an O/Si ratio of about 1.70 to about 2.15 and an N/Si ratio of about 0.01 to about 0.05 as measured by X-ray photoelectron spectroscopy (XPS). The SiON material of the first barrier layer 208 further has about 2.15g/cm as measured by XPS³To about 2.20g/cm³A density of, for example, about 2.18g/cm³. The SiON material of the first barrier layer 208 has less than about 8% hydrogen (hydrogen; H) as measured by Hydrogen Forward Scattering (HFS)₂) The composition of (1). When using Fourier transform infrared spectrometer (Fourier)An er-transform-induced specroscope; FTIR), the SiON material of the first barrier layer 208 has about 1050cm^-1To about 1080cm^-1The Si-O-Si absorption peak position of (a). In addition, the SiON material of the first barrier layer 208 has a percent change in thickness (thickness change) of about 104% to about 106% at 85 degrees celsius and 85% relative humidity (i.e., saturated). In some embodiments, the second barrier layer 212 may comprise the same material as the first barrier layer 208 (i.e., a SiON film having the properties and composition described above).

Each layer of the TFE structure 214 may be deposited using a PECVD process and apparatus, such as PECVD apparatus 101 of FIG. 1. In some embodiments, each layer of the TFE structure 214 may be deposited using a Chemical Vapor Deposition (CVD) process and apparatus or an Atomic Layer Deposition (ALD) process and apparatus. Each layer of TFE structure 214 may be deposited in a single PECVD chamber (e.g., chamber 100 of fig. 1). Cleaning of the PECVD chamber may be performed between cycles to minimize contamination risks. The advantages of single chamber processing are reduced cycle time and reduced number of chambers (and equipment cost) using multi-chamber processing.

In one embodiment, the TFE structure 214 is formed by placing the substrate 202 including the light emitting device 204 within a chamber, such as the chamber 100 of fig. 1. The cap layer 206 may be deposited on the light emitting device 204 in a PECVD chamber or the cap layer 206 may already be deposited on the light emitting device when the substrate is placed in the chamber. In the chamber, a first barrier layer 208 is deposited on the cap layer 206 by a PECVD process. The PECVD process used to deposit the first barrier layer 208 may include introducing a silicon-containing precursor and a nitrogen-containing precursor into the PECVD chamber at less than about 100 degrees celsius.

In one embodiment, the first barrier layer 208 is SiON and SiH₄Gas, N₂O gas, NH₃Gas, N₂Gas and H₂Gases are introduced into the chamber to deposit the SiON first barrier layer 208. NH (NH)₃Gas and SiH₄The flow rate ratio of the gas is about 0.9 to 1.1, N₂O gas and SiH₄The flow ratio of the gas is about 15.5 to 16.5, N₂Gas and SiH₄The flow ratio of the gas is about 8.4 to 8.5, H₂The flow ratio of the gas to the total flow ratio (total flow ratio) is between about 0.13 and 0.16, and N₂The flow ratio of O gas to total flow ratio is between about 0.23 and 0.36. The chamber pressure is between about 0.13 Torr and about 0.14 Torr, and the power density is between about 4.5mW/mm²To about 6.5mW/mm²。

In the chamber, a buffer layer 210 is deposited by a PECVD process over the first barrier layer 208. Because the precursors used for the deposition process are different, a purge step is performed after the deposition of the first barrier layer 208 and before the deposition of the buffer layer 210. After the buffer layer 210 is deposited, another cleaning step is performed. The second barrier layer 212 is deposited over the buffer layer 210, and the second barrier layer 212 may be deposited under the same processing conditions as the first barrier layer 208.

Using a material having a first barrier layer 208 (the first barrier layer 208 comprising SiON having a low refractive index of less than about 1.5, less than about 5.0 x 10^-5g/m²Low WVTR and less than about 8% low H/day₂Content) of TFE 214 makes the first barrier layer 208 a reliable barrier in transparent or flexible display devices that are moisture sensitive, hydrogen bond (H bond) sensitive, and/or hydrogen oxygen bond (OH bond) sensitive. Furthermore, the first barrier layer 208 having the above-mentioned properties reduces light loss by about 10% compared to a silicon nitride (silicon nitride) film, and helps to prevent moisture and/or hydrogen diffusion from occurring within the display device, further avoiding TFE 214 failure.

Fig. 3A-3B are schematic cross-sectional views of Thin Film Transistors (TFTs) 300, 350, respectively, for use in display devices, according to various embodiments. The TFT 300 of FIG. 3A and the TFT 350 of FIG. 3B are the same; whereas the gate insulating layer 306 of the TFT 300 of fig. 3A is a single layer, the gate insulating layer 306 of the TFT 350 of fig. 3B is a dual layer (dual layer), and the passivation layer 310 of the TFT 300 of fig. 3A is a single layer, but the passivation layer 310 of the TFT 350 of fig. 3B is a dual layer. The TFT 300 of fig. 3A and the TFT 350 of fig. 3B each include a substrate 302. The substrate 302 may be made of a silicon-containing material, glass, polyimide, or plastic, such as PET or PEN. A gate 304 is disposed on the substrate 302. The gate 304 may include copper (copper), tungsten (tungsten), tantalum (tantalum), aluminum (aluminum), etc. A gate insulating layer 306 is disposed over the gate 304 and the substrate 302.

A semiconductor layer 308 is disposed over the gate insulating layer 306. The semiconductor layer 308 may include a metal oxide semiconductor material such as Indium Gallium Zinc Oxide (IGZO), a metal oxynitride semiconductor material such as amorphous silicon (amorphous silicon), crystalline silicon (crystalline silicon), and polycrystalline silicon (polysilicon), or silicon. A drain 312 and a source 314 are disposed on the semiconductor layer 308. The drain 312 is spaced apart from and adjacent to the source 314. The drain 312 and source 314 may each comprise copper, tungsten, tantalum, aluminum, or the like. A passivation layer 310 is disposed over the semiconductor layer 308, the drain electrode 312, and the source electrode 314. The passivation layer 310 and the gate insulating layer 306 are moisture barrier films or layers.

The passivation layer 310 and the gate insulating layer 306 may each independently include the same material as the first barrier layer 208 of fig. 2. The passivation layer 310 and/or the gate insulating layer 306 are at least partially composed of a material including silicon oxynitride (SiON). The SiON material of the passivation layer 310 and/or the gate insulating layer 306 has a refractive index of less than about 1.5 at 632 nanometers, e.g., about 1.46 to about 1.48, and has a refractive index of less than about 5.0 x 10 at 40 degrees celsius and 100% relative humidity^-5g/m²WVTR/day. The SiON material of the passivation layer 310 and/or the gate insulating layer 306 has a composition of an O/Si ratio of about 1.70 to about 2.15 and an N/Si ratio of about 0.01 to about 0.05 as measured by XPS. The SiON material of the passivation layer 310 and/or the gate insulating layer 306 further has about 2.15g/cm as measured by XPS³To about 2.20g/cm³The density of (c). The SiON material of the passivation layer 310 and/or the gate insulating layer 306 has about 1050cm when measured by FTIR^-1To about 1080cm^-1The Si-O-Si absorption peak position of (a). Further, the SiON material of the passivation layer 310 and/or the gate insulating layer 306 has a percent change in thickness of about 104% to about 106% at 85 degrees celsius and 85% relative humidity (i.e., saturated).

The SiON material of the passivation layer 310 and/or the gate insulating layer 306 has a composition of less than about 8% hydrogen as measured by HFS. In one embodiment, the SiON material of the passivation layer 310 has a composition of about less than 6% hydrogen measured as HFS, and the SiON material of the gate insulating layer 306 has a composition of about less than 5% hydrogen measured as HFS. The passivation layer 310 and the gate insulating layer 306 may include SiON materials having the above-described properties and compositions, respectively, or only one of the passivation layer 310 or the gate insulating layer 306 may include a SiON material having the above-described properties and compositions.

Fig. 3A shows a single layer of gate insulation layer 306 and a single layer of passivation layer 310. The single layer gate insulating layer 306 and the single layer passivation layer 310 may each independently include SiON. Fig. 3B shows a bi-layer gate insulation layer 306 and a bi-layer passivation layer 310. In the TFT 350 of FIG. 3B, the gate insulating layer 306 includes a layer 306A comprising SiON and a layer 306B comprising silicon oxide (SiOx). A layer 306A of gate insulating layer 306 comprising SiON is disposed on substrate 302 and gate 304 and in contact with substrate 302 and gate 304. The layer 306B including SiOx of the gate insulating layer 306 is provided between the semiconductor layer 308 and the layer 306A including SiON, and is in contact with the semiconductor layer 308 and the layer 306A including SiON. The passivation layer 310 of the TFT 350 of fig. 3B includes a layer 310A including SiOx and a layer 310B including SiON. A layer 310A of passivation layer 310 comprising SiOx is disposed on semiconductor layer 308, drain electrode 312, and source electrode 314. The layer 310B of the passivation layer 310 including SiON is disposed on the layer 310A including SiOx.

The passivation layer 310 and the gate insulating layer 306 may be formed by the same PECVD process as the first barrier layer 208 of fig. 2. In some embodiments, the passivation layer 310 and the gate insulating layer 306 may be formed by CVD or ALD processes. The PECVD process used to deposit the passivation layer 310 and/or the gate insulation layer 306 may include introducing a silicon-containing precursor and a nitrogen-containing precursor into a PECVD chamber, such as the chamber 100 of fig. 1. In some embodiments, the passivation layer 310 is deposited at less than about 300 degrees celsius and the gate insulation layer 306 is deposited at less than about 100 degrees celsius. In one embodiment, the passivation layer 310 and the gate insulating layer 306 are SiON and SiH, respectively₄Gas, N₂O gas, NH₃Gas, N₂Gas and H₂Gases are introduced into the chamber to deposit the SiON passivation layer 310 and the SiON gate insulating layer 306. The gate insulation layer 306 is deposited first, followed bySemiconductor layer 308, followed by passivation layer 310. The chamber may be purged between each layer deposition.

For both the passivation layer 310 and the gate insulating layer 306, NH₃Gas and SiH₄The flow ratio of the gas is about 0.9 to 1.1, N₂O gas and SiH₄The flow ratio of the gas is about 15.5 to 16.5, N₂Gas and SiH₄The flow ratio of the gas is about 8.4 to 8.5, H₂The flow ratio of the gas to the total flow ratio is between about 0.13 and 0.16, and N₂The flow ratio of O gas to total flow ratio is between about 0.23 and 0.36. The chamber pressure is between about 0.13 Torr and about 0.14 Torr, and the power density is between about 4.5mW/mm²To about 6.5mW/mm²。

Using a passivation layer 310 and/or a gate insulating layer 306 (the passivation layer 310 and/or the gate insulating layer 306 comprising SiON having a low index of refraction of less than about 1.5, less than about 5.0 x 10^-5g/m²Low WVTR and less than about 8% low H/day₂Content) of the TFTs 300, 350 makes the passivation layer 310 and/or the gate insulating layer 306a reliable barrier layer in a transparent or flexible display device, which is a device sensitive to moisture, hydrogen bonding, and/or hydrogen-oxygen bonding. The passivation layer 310 and/or the gate insulating layer 306 having the above-mentioned properties reduce light loss by about 10% compared to a silicon nitride film, and help prevent moisture and/or hydrogen diffusion from occurring in the display device, further preventing the characteristics of the TFTs 300, 350 from being unnecessarily shifted.

Also, use of a composition having a low refractive index of less than about 1.5, less than about 5.0 x 10^-5g/m²Low WVTR and less than about 8% low H/day₂The amount of the passivation layer 310 and/or the gate insulating layer 306 causes less variation in positive bias temperature stress (positive bias temperature stress), negative bias temperature stress (negative bias temperature stress), and negative bias temperature illumination stress (negative bias temperature stress). Accordingly, when the passivation layer 310 and/or the gate insulating layer 306 having the above-mentioned properties are integrated in the TFTs 300, 350, the passivation layer 310 and/or the gate insulating layer 30 having the above-mentioned properties6 enable better bias stability (bias stability) and lower start-up voltages (turn-on voltages).

Thus, the moisture barrier film is used as the first barrier layer (including having a low refractive index of less than about 1.5, less than about 5.0 x 10) in TFE^-5g/m²Low WVTR and less than about 8% low H/day₂SiON content) or passivation layer and/or gate insulating layer (including having a low refractive index of less than about 1.5, less than about 5.0 x 10) in a TFT^-5g/m²Low water vapor transmission WVTR per day and low H of less than about 8%₂SiON content) makes these layers reliable barrier layers in transparent or flexible display devices, which are moisture sensitive, hydrogen bond sensitive, and/or hydroxyl bond sensitive devices. Furthermore, the moisture barrier layers each having the above-mentioned properties reduce light loss by about 10% compared to the silicon nitride film, and help prevent moisture and/or hydrogen diffusion from occurring within the display device, further avoiding TFE failure and unnecessary shifting of the characteristics of the TFT.

While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.