阅读说明：本技术 具有修复缺陷读出通道并提供进一步的行噪声抑制功能和相应行噪声抑制方法的可扩展修复方案的cmos光学传感器 (CMOS optical sensor with scalable repair scheme for repairing defective readout channels and providing further row noise suppression functionality and corresponding row noise suppression method ) 是由 约瑟·安吉尔·塞戈维亚·德拉托雷 拉斐尔·多明格斯·卡斯特罗 安娜·冈萨雷斯·马克斯 拉斐尔· 于 2020-05-15 设计创作，主要内容包括：一种CMOS光学传感器包括备用读出通道,以替换在制造过程结束时发现有缺陷的读出通道。这些备用读出通道以分别具有m个备用读取通道的备用组G-(m1)、G-(m2)、G-(m3)的形式在光学传感器的宽度(对应于行方向)上调度,m是至少等于1的整数。每个备用组是插入在分别具有n个默认读出通道的两个连续的默认组G-(n1)和G-(n2)之间,并且耦合装置SW1被配置为替换默认组中有缺陷的默认读出通道以及该组中位于有缺陷的一个默认读出通道和关注的默认组旁边的备用组之间的任何默认读出通道。有利地,对于当前被选定用于对该行中每个像素进行CDS读取的行Row-(i),通过由A个备用读出通道中的每一个对模拟DC参考信号进行采样,并平均所获得的A个值Sp-(k),从所实现的修复方案中未使用的A个备用读出通道获得行噪声电平VRN-(i)。然后从当前选定行的每个像素数字信号S-(i,j)输出中减去行参考值VRN-(i),以最终获得具有行噪声抑制的信号值d-(i,j)。(A CMOS optical sensor includes a spare read channel to replace a read channel found to be defective at the end of the manufacturing process. These spare read channels are in spare groups G with m spare read channels each m1 、G m2 、G m3 Is scheduled over the width of the optical sensor (corresponding to the row direction), m being at least equal to 1An integer number. Each spare group is inserted in two consecutive default groups G having n default read channels respectively n1 And G n2 And the coupling means SW1 is configured to replace a defective default sense channel in the default set and any default sense channels in the set that are located between the defective one of the default sense channels and the spare set next to the default set of interest. Advantageously, for the Row currently selected for CDS reading of each pixel in the Row i By sampling the analog DC reference signal by each of the a spare read channels and averaging the obtained a values Sp k Obtaining the row noise level VRN from the A spare read channels not used in the implemented repair scheme i . Then, the digital signal S is obtained from each pixel of the currently selected row i,j Subtracting the row reference value VRN from the output i To finally obtain a signal value d with line noise suppression i,j 。)

1. A CMOS optical sensor, comprising: a pixel array (1), said pixel array (1) comprising P rows and N columns of pixels, P and N being integers, wherein said pixels belonging to the same column are connected to respective column conductors; and readout circuitry (2), the readout circuitry (2) being coupled to the N column conductors of the pixel array to output a digital pixel value (S) for each pixel in a selected row_i,j) Wherein said readout circuit comprises:

a.N default read channels (RoC)₁To RoC_N) Each respective column conductor (Col) of the pixel array (1)_j) Corresponding to a default read channel; and M spare read channels (RoCsp)₁To RoCsp₃) Wherein M is<N，

b. The N + M read channels are arranged in a repeating pattern sequence in a row direction in groups, one being a default group of N consecutive default read channels, and then one being a spare group of M consecutive spare read channels, N and M being integers, N/N being an integer greater than 1; and M/M is an integer greater than 1, an

c.N switching circuits SW1, one for each column conductor of the pixel array, each switching circuit configured to electrically connect a respective one of the N column conductors to one readout channel of the readout circuit selected from: a default channel (RoC-D) of the column conductor, a first alternate readout channel to the left of the default readout conductor (RoC-L), a second alternate readout channel to the right of the default readout conductor (RoC-R),

wherein the readout circuit is configured to setThe first switch circuit SW1 is set to be in the default group (Gn)₂) Including a defective sense channel, applying one of a left shift coupling mode or a right shift coupling mode, wherein the left shift coupling mode selects the first, left replacement sense channel as the defective sense channel from the default set (RoC)₁₁) Starting down to the first readout path (RoC)₉) Wherein the right-shifting coupling mode selects the second, right-side replacement sense channel as a defective sense channel from the default set (RoC)₁₅) Starting up to the nth read channel (RoC)₁₆) Of each of said readout channels of said default set.

2. The optical sensor of claim 1, wherein m-1 and the first, left alternate readout channel in each first switching circuit is the next readout channel to the left of the default readout channel and the second, right alternate readout channel is the next readout channel to the right of the default readout channel.

3. The optical sensor of claim 1, wherein m >1, wherein the replacement mode is based on m groups, and the first, left replacement read-out channels in each first switching circuit are read-out channels at m ranks further to the left of the default read-out channel, and the second, right replacement read-out channels are read-out channels at m ranks further to the right of the default read-out channel.

4. Optical sensor according to claim 3, wherein the default group (Gn) is₁) Each subset of m default read channels (SS)₁、SS_u) The associated m first switches SW1 pass through the same logic command (C)_10.1) And (4) configuring.

5. The optical sensor of any one of claims 1 to 4, wherein n is at least equal to 8.

6. The optical sensor of claim 3 or 4, wherein m is at least equal to 4.

7. The optical sensor of any one of claims 1 to 6, further comprising:

-an analog DC voltage reference bus (B)_DC) Which extends in the row direction over the width of the read-out circuit, an

-second switch circuits (SW2), one for each spare sense channel, each of the second switch circuits selectively connecting the respective spare sense channel to the reference bus (B) when not selected by any first switch circuit (SW1)_DC)，

Wherein the N and M readout channels are all configured to implement Correlated Double Sampling (CDS), and the readout circuit further implements a digital row noise suppression function and is configured for deriving from a digital signal (Sp) obtained from the spare readout channel₁) Calculating an average row noise value (RN)_i) Said spare sense channel being operatively coupled to said DC reference bus by said second switch circuit (SW2) and not selected by any of said first switches (SW 1); and for a currently selected Row (Row) provided from the readout channel operatively coupled to a respective column conductor of the array through the first switch circuit (SW1)_i) The average row noise value is subtracted from each of the pixel values.

8. The optical sensor according to claim 7, comprising a third switching circuit (403) configured to be in a currently selected Row (Row)_i) Applies an analog DC voltage reference to the DC reference bus (B) in time prior to the CDS read phase in the readout channel_DC)。

9. The optical sensor of claim 8, further comprising an output line (405) distributed over the third switching circuit (403) and the reference bus (B)_DC) A institute ofThe reference bus (B)_DC) A buffer (404) over the length of (a).

10. The optical sensor of any one of claims 7 to 9, wherein the analog DC voltage reference is set to correspond to a middle value of an analog-to-digital conversion range implemented in the readout circuit.

11. The optical sensor of any one of claims 7 to 10, comprising a digital-to-analog conversion circuit (401) which delivers the analog DC voltage reference.

12. The optical sensor of any one of claims 1 to 11, wherein each of the first and second switch circuits is configured by a respective programmable shift register.

13. The optical sensor of any one of claims 1 to 12, wherein the analog-to-digital conversion in each readout channel is operated by an analog-to-digital converter adapted to the readout channel.

14. The optical sensor of any one of claims 1 to 12, wherein the analog-to-digital conversion in each readout channel is operated by an analog-to-digital converter shared by the readout channels.

15. The reading method in the optical sensor with temporal row noise according to claim 7, comprising:

-switching the analog DC reference voltage to the DC reference bus,

-for each selected Row (Row) of said pixel array_i) And repeating the following steps:

a. reading the signal on each of the column conductors and outputting a sampled digital pixel value (S) via a respective readout channel selected by the first switch (SW1)_i,j)；

b. Reading the signal on the DC reference bus and through each of the spare sense channels selected by the second switch (SW2)Outputting a row noise value (Sp)₁)；

c. Calculating the currently selected Row (Row) from the Row noise values_i) Average voltage reference value (RN)_i)；

d. From each of said digital pixel values (S)_i,j) Subtracting the average voltage reference value (RN)_i)；

e. Outputting a resulting digital pixel value (d) with lower noise for the currently selected row_i,j)。

16. The method of reading of claim 15, comprising setting the analog DC reference voltage to a middle value of an analog-to-digital conversion range.

Technical Field

The present disclosure relates to optical sensors, and more particularly, to CMOS optical sensors having internal means for repairing defective readout channels.

Background

As is well known in the art, an optical sensor comprises an array of pixels, the pixels being arranged in rows and columns, each pixel in a column being coupled to a respective column conductor by a selection transistor to allow it to be read by a respective readout channel of a readout circuit. The readout circuitry includes as many readout channels as there are columns of pixels in the array and is basically configured to be able to read one selected row of pixels at a time. The term "read-out channel" is a generic term specifying a circuit for reading out a column of pixels of an array, the circuit comprising at least one preamplifier (charge or voltage amplifier) whose input is connected to a respective column conductor and whose output is applied to a sample-and-hold circuit which supplies an analog sample to be converted to an analog-to-digital converter (ADC). The ADC may be part of the readout channel, the output of which is then a digital value; alternatively, the ADC is shared by at least one set of column conductors, and then the output of the readout channel is an analog signal applied to the ADC according to the column code sequence. As is well known in the art.

Optical sensors are increasingly used, especially CMOS sensors, because of their low manufacturing cost, high electronic integration capability (semiconductor technology), low operating voltage, low power consumption, and high speed processing capability, among others.

Many applications of CMOS optical sensors require large pixel arrays to meet the increasing demand for large fields of view and/or high resolution, which leads to miniaturization based on finer geometry semiconductor technology, where the pixel pitch can be reduced. As a result, the risk of manufacturing defects increases, which is a manufacturing cost issue and/or an image quality issue.

Manufacturing defects may in particular be caused by dust particles during the lithography step and may result in different parts or elements of the optical sensor being found to be defective. In practice, defects are detected and located by optical inspection and/or electrical and operational testing at the end of the manufacturing process, and may include, for example (which is meant to be not limited to): short circuit, open circuit, impedance mismatch, etc.

The effect on the operation of the optical sensor may vary greatly depending on which element is defective. For example, in the case where a defective element is located inside a pixel (which means an element of a pixel structure), when a captured image is digitally processed, the defect may be ignored, or corrected according to interpolation based on a neighborhood pixel by a post-processing step. However, when a defect occurs on a functional element shared by a large number of pixels (e.g., a readout channel associated with a column of pixels of an array), then the defect is much more noticeable in the captured image and can degrade image quality; furthermore, post-processing corrections become more difficult and less efficient, at the same time increasing costs in terms of time, resources and power consumption.

For these reasons, the known art provides optical sensors with an integrated repair device coupled between the column conductors (pixel array) and the readout channels (readout circuitry) that is capable of operatively coupling the column conductors to either the default readout channels or the redundant channels. Basically, at least one redundant sense channel and a plurality of default sense channels are provided in the sensor circuit, and a switching device is associated with each column conductor of the array to operatively connect each column conductor to its default sense channel or to a redundant sense channel. Such a repair solution is described, for example, in US 2006/00261255. However, for large arrays, the repair circuitry should be able to repair all and any defective sense channels at any location without unduly complicating the column decoding scheme and without unduly increasing the surface area.

US2009/0108177 proposes a repair circuit based on a packet replacement read channel. In particular, a set of default read-out channels can be replaced by an adjacent set, and the set replacement process is propagated in the row direction from one set to another until the last set of default read-out channels in the read-out circuit is replaced by a spare set located next to it. By providing a spare set on each side of the assembly formed by all default read channels, the proposed repair circuit is able to isolate and replace two default read channel sets, each found to contain at least one defective channel, one by shifting the sets in the left direction and the other by shifting the sets in the right direction. However, this solution requires a selection circuit that depends on the number of columns of each group to be shifted and that is located within the width of one or both groups based on the defective channel. A more flexible solution is needed to easily accommodate large arrays of different sizes. Furthermore, the proposed solution should be advantageously applicable to the stitching techniques used in advanced IC manufacturing.

CMOS optical sensors also suffer from noise problems. The noise level determines the lowest illumination level that the sensor can fairly detect. In various application areas of optical sensors, the capture conditions may vary greatly, from bright to dark environments, objects in your field of view being close or far, etc. The repeated demand of the market presents optical sensors with a wide dynamic range and capable of detecting weak signals. The noise level determines the lowest illumination level that the sensor can fairly detect. The electronic components of the pixel structure (photodiode or photogate and transistor), the readout circuitry (transistor, logic gate, amplifier), and the row selection sequence used to capture (scan) the image are all sources of noise, generating Fixed Pattern Noise (FPN), and limiting the signal-to-noise ratio and dynamic range of the sensor, thus limiting the temporal low frequency noise of the captured quality image. The fixed spatial noise is caused by the technological dispersion of the characteristics of the electronic components (photodiodes, transistors, amplifiers) depending on the technology and the manufacturing process. It can be defined as the difference between the signals from two pixels receiving the same amount of light. Temporal noise is a random, low frequency noise originating from different sources. Temporal noise includes, among others, thermal noise, shot noise, and flicker noise (1/f noise) originating from pixels; but also row noise from the readout circuitry and the switching sequence, which noise is based on the row. Larger arrays are typically obtained by small geometry techniques. However, it is well known that the shorter the channel length of a MOS transistor, the more important the low frequency noise it generates.

Several methods of reducing the noise level are known to be implemented at the level of the readout circuit. Among these methods, the widely used correlated double sampling (denoted by its acronym "CDS") can remove thermal noise (KT/C) by sensing a pixel twice to subtract a reset level of the pixel from a signal level (analog or digital) of the pixel to generate a pixel value. The CDS reduces both FPN and 1/f noise, and a better noise reduction effect is achieved by the true CDS obtained when the reset level is first sensed, which is not always possible, depending on the pixel structure and driving method (especially rolling or global shutter mode). The pseudo CDS refers to sampling a signal level before a reset level. However, the CDS does not deal with row noise generated by the readout sequencing process. Another known noise reduction method, which may be combined with true or false CDS, involves subtracting an offset signal (analog) or offset value (digital), where the offset signal or value represents the dark current generated in the pixel. Dark current is generated by the charge accumulated in the photosensitive element (photodiode or photogate) of a pixel in the absence of incident light, which varies from pixel to pixel (due to the technological dispersion of the characteristics of the electronic devices on the array). Dark current is a current other than the current generated in response to light incident on the pixel and requires accurate measurement, especially for weak signals (low incident light). Dark current reduction techniques are typically based on supplemental black pixels (shielding light) provided on at least one side of the pixel array and are used to provide an offset value (average) that is subtracted from each pixel value, whether in an analog or digital manner. Note that this approach may help to reduce row noise if the subtraction is done digitally (meaning a read-out conversion of black pixel values). However, since the black pixels are located at one side of the pixel array, the dispersion of the characteristics of the pixels in the array cannot be completely represented except for the occupied area, and especially when applied to a large pixel array, the preparation of an average value as an offset value from several or all of the black pixels cannot completely compensate for such a side effect. Further, if the offset value is subtracted in an analog manner, row noise due to readout conversion is not handled.

Disclosure of Invention

An aspect of the invention is related to repairing the readout channel by a scalable scheme that easily accommodates any size pixel array and is easily configured or programmed in each sensor device after the defect is located.

Another aspect of the invention is directed to reducing temporal row noise caused by readout circuitry and also reducing visible pattern noise in large arrays of optical sensors. More specifically, the present invention seeks to propose a new temporal row noise reduction method that takes into account the row-wise noise variation along the width of the readout row, which the applicant has found to be a non-negligible variation, especially in large array optical sensors.

Another aspect of the invention is directed to the same circuit that occupies negligible additional area to achieve the above-described repair and row noise reduction aspects.

The invention then relates to a CMOS optical sensor comprising: an array of pixels comprising P rows and N columns of pixels, P and N being integers, wherein the pixels belonging to the same column are connected to respective column conductors; and readout circuitry coupled to the N column conductors of the pixel array to output a digital pixel value for each pixel in a selected row.

According to the invention, the readout circuit comprises:

a.N default readout channels, one for each respective column conductor of the pixel array; and M spare sense channels, where M < N,

b. the N + M read channels are arranged in a repeating pattern sequence in a row direction in groups, one being a default group of N consecutive default read channels, and then one being a spare group of M consecutive spare read channels, N and M being integers, N/N being an integer greater than 1; and M/M is an integer greater than 1; and

c.N switching circuits, one for each column conductor of the pixel array, each switching circuit configured to electrically connect a respective one of the N column conductors to a readout channel of the readout circuit selected from: a default channel for the column conductor, a first alternate sense channel to the left of the default sense conductor, a second alternate sense channel to the right of the default sense conductor,

wherein the sense circuit is configured to set the first switching circuit such that one of a shift left coupling mode or a shift right coupling mode is applied when a defective sense channel is included in a default group, wherein the shift left coupling mode selects the first, left replacement sense channel as a replacement for each of the sense channels of the default group starting with the defective sense channel of the default group down to the first sense channel, wherein the shift right coupling mode selects the second, right replacement sense channel as a replacement for each of the sense channels of the default group starting with the defective sense channel of the default group up to the nth sense channel.

When m is 1, the first, left alternate read channel in each first switching circuit is the next read channel to the left of the default read channel, and the second, right alternate read channel is the next read channel to the right of the default read channel.

When m >1, the replacement mode is based on m groups, and the first, left-hand replacement read-out channels in each first switching circuit are read-out channels at m ranks further to the left of the default read-out channel, and the second, right-hand replacement read-out channels are read-out channels at m ranks further to the right of the default read-out channel.

Advantageously, the optical sensor further comprises:

-an analog DC voltage reference bus extending in the row direction over the width of the readout circuit, an

-second switching circuits, one for each spare sense channel, each of the second switching circuits selectively connecting the respective spare sense channel to the reference bus when not selected by any first switching circuit,

wherein the N and M readout channels all implement correlated double sampling, and the readout circuit further implements a digital row noise suppression function and is configured for calculating an average row noise value from digital signals obtained from the spare readout channel, the spare readout channel being operatively coupled to the DC reference bus through the second switching circuit and not selected through any of the first switches; and for subtracting the average row noise value from each of the pixel values of a currently selected row provided by the readout channels operatively coupled to the respective column conductors of the array by the first switching circuit.

Preferably, the analogue DC reference voltage is set to a value in the middle of the analogue to digital conversion range and is advantageously provided by a programmable DAC converter provided in the optical sensor.

The invention also relates to a low noise reading method in such an optical sensor.

Further characteristics and advantages of the invention will now be described, by way of non-limiting examples and embodiments, with reference to the accompanying drawings, in which:

fig. 1 shows a general block diagram of an optical sensor in an exemplary embodiment comprising one analog-to-digital converter shared by the readout channels of the readout circuit;

fig. 2 is a variant of fig. 1, in which each readout channel comprises its own analog-to-digital converter;

fig. 3 shows a schematic diagram of a readout circuit according to a first exemplary embodiment of the present invention comprising a repair circuit with spare readout channels dispersed among the default readout channels, one spare readout channel per n default readout channels, for an optical sensor with an analog-to-digital conversion arrangement as shown in fig. 2 included in each readout channel, and showing a row noise reduction level based on unused spare readout channels;

FIG. 4 is a schematic diagram of a line noise reduction process according to the invention;

FIG. 5 shows in the schematic diagram of FIG. 3 the correlation coupling and row noise reduction operation in the case where two defective default sense channels are replaced, in accordance with the principles of the present invention;

FIG. 6 shows an example of a read channel selection circuit and programming tool suitable for use in a repair circuit according to a first embodiment of the invention;

fig. 7 shows a schematic diagram of a repair circuit and row noise reduction stages according to a second exemplary embodiment of the present invention, providing m >1 spare sense channels every n default sense channels;

FIG. 8 shows an example implementation of generating and distributing an analog DC reference on a reference bus through a distributed buffer in the row direction and associated selection circuitry that couples the reference bus only to unused spare sense channels in accordance with the row noise reduction aspect of the present invention;

figure 9 shows a simplified timing diagram of the CDS read-out sequence in an optical sensor comprising a spare read-out channel and a selection circuit to simultaneously implement the repair function and the row noise reduction function according to the invention.

Detailed Description

Fig. 1 and 2 show the main circuit elements of a CMOS optical sensor. The only difference between the two figures is whether the analog-to-digital conversion circuit is shared by all pixels (fig. 1) or by pixels in the same column only (fig. 2). Note that other configurations are possible, for example, pixels of a column subset may share the same ADC. Furthermore, especially when the optical sensor has a large array (which means thousands of rows and columns), the usual technique is to provide two readout circuits, one at the bottom of the column and the other at the top of the column, to achieve fast speed. Everything that will be said about the invention applies to any of these different configurations, and in particular also to the configurations of fig. 1 and 2.

Fig. 1 and 2 show a basic CMOS optical sensor. Note that the term CMOS actually applies to the electronic circuits surrounding the pixel array, in particular the read-out circuit and the decoder. The pixels use MOS elements (including photodiodes or photogates as photosensitive elements) and MOS transistors to at least assume the selection function of the pixels in the array, read it, and then speak of passive pixels. The pixels are preferably active pixels, generally referred to as APS pixels and APS sensors. This means that the pixel structure comprises more than one transistor, in particular X transistors, wherein X is equal to or larger than 3. The structures are 3T, 4T, 5T or more. These XT structures enable control of different operating modes of the pixels, in particular: the integral (linear, logarithmic) of the pixel may be in rolling or global shutter mode, with electron multiplication effects, etc.; and a read mode: CDS, binding, etc. The X transistors of the XT pixel structure may be used in their entirety for one pixel, or may share some transistors with other pixels.

The sensor comprises pixels organized in an array 1 having a pixel structure substantially consisting of a photosensitive element (photodiode, photogate) and a transistor (MOS). Array 1 includes P rows (Row)₁To Row_P) And column N (Col)₁To Col_N) A pixel (P, N is an integer greater than 1). The pixel is denoted as PX_i,jWhere i is an integer equal to 1 to P, representing the rank of the row in the column direction; j is an integer equal to 1 to N, representing the rank of the column in the row direction. Pixels arranged in the same column are coupled to corresponding column conductors in the N columns of the array. Pixels arranged in the same row are controlled by respective ones of P row select lines of the array. With large arrays, N and P may be equal to several thousand, for example, about 8000.

The readout circuit 2 for reading the pixels of the array comprises N readout channels RoC₁To RoC_NEach sense channel RoC_j(j is an integer equal to 1 to N) is coupled to a column conductor (Col) of the same rank j in the array 1, so as to be able to generate at the output of the readout channel a signal representative of the illumination level received by a selected pixel in the corresponding column. The term "coupled" means connected directly or through any coupling element.

In fig. 1, the output of the readout channel is an analog signal: each output is sent in turn to a flash ADC (analog to digital converter) 3 for digital conversion under the control of a column decoder 5. In fig. 2, the output of the readout channels is a digital signal, each readout channel containing its own ADC.

The readout channel typically includes a sample and hold circuit to obtain an analog sample signal representative of the illumination level of the selected pixel, which is then digitized. In view of the high capacitance of the upstream column conductors, an amplifier is typically provided before the sample and hold circuit for loading purposes. In case multiple readout channels (fig. 1) share an ADC, an output amplifier may also be provided to load the output line conductor 7 between the readout channel and the ADC.

The ordering of the pixels and the readout circuitry is done by an addressing circuit comprising a row decoder 4 to select one row at a time in turn in the readout sequence of the array, and a column decoder 5 to forward the signals delivered by each readout channel to the ADC converter 3 (fig. 1) or the data shift register 6 (fig. 2) in turn. Finally, the digital DATA information DATA of the captured image is sent to the digital processor DSP for further processing, including post-processing for enhancing image quality and application specific processing. The DSP may be fully or partially integrated in the optical sensor integrated circuit. This means that some post-processing operations may be done inside the optical sensor, including for example statistical calculations on the data stream, such as histograms, while other application operations are done in an application DSP outside the optical sensor.

The decoding circuits 4 and 5 operate on appropriate clock signals generated by a sequencing circuit (not shown) which generates all the signals required to control the integration order of the pixels and the pixel reading order of each captured frame, in particular to control the row and column decoders. This is a well-known technique.

In practice, the readout channel typically implements CDS, which means that two samples are obtained from each pixel. The CDS subtraction between the reset signal and the information signal is obtained before (in an analog manner) or during the analog-to-digital conversion. For example, for a linear ramp based ADC, a counter is used that is configured to assume an up-count mode for one sample and a down-count mode for another sample. The resulting signal is particularly free of fixed pattern noise and kTC noise generated at the pixel.

The present invention will now be explained in detail in the following description with reference to fig. 3 to 9. It may be implemented in any CMOS optical sensor having the general features explained above with respect to fig. 1 and 2. Note that the invention is not limited to a particular ADC converter type, but is generally applicable to any type of ADC (ramp with single or double slope, SAR, sigma delta, etc.); and is not limited to the configuration shown in fig. 1 and 2, N readout channels share one ADC (fig. 1), or one ADC per channel (fig. 2).

According to the invention, a CMOS optical sensor comprises a RoCsp like in FIG. 3₁Such spare sense channels to replace sense vias found to be defective at the end of the manufacturing processAnd (4) carrying out the following steps. These spare read channels are in spare groups G_m1、G_m2、G_m3Are distributed over the width (corresponding to the row direction) of the optical sensor, each group comprising m spare read-out channels, m being an integer at least equal to 1, each spare group being interposed between two consecutive default groups respectively comprising n default read-out channels. For example, in FIG. 3, spare group G_m1Inserted in two default groups Gn₁And Gn₂In the meantime. In practical terms, this insertion of spare channels among the default readout channels is possible because the width of the readout channels is smaller than the pixel pitch of the array, and the total number of spare readout channels is only a fraction of the total number of default readout channels. For example: if 1 spare read channel is added every 32, the read channel pitch needs to be reduced by 3%. In the case of an 8K pixel array, with 8192 columns, this means that there are 256 spare readout channels.

At the end of the manufacturing process, if any of the default read channels in the default set is found to be defective, the coupling means is configured to replace the defective default read channel and any default read channels located between the defective one of the default read channels and a spare set next to the default set of interest, preferably the closest spare set (in the default set) with respect to the location or rank of the defective read channel. In its entirety, this assumes that the defective spare sense channel is itself defect-free, but in practice, in large arrays, the probability of the spare sense channel being defective is very low (far fewer spare sense channels than the default channel). Furthermore, it is still possible to use a side spare group, as will become apparent from the following description.

Depending on whether the spare set comprises only one spare read channel or more than one read channel, the alternatives are either on a one-to-one basis (first embodiment) or in groups comprising m default read channels (second embodiment). This will be explained in detail below.

According to another aspect of the invention, the spare sense channels that remain unused (after the repair step for defective sense channels) are used to sample the analog DC reference signal from the reference bus and convert it to digital, as well asThe pixels in the currently selected row of the array are read. This enables just passing the Row for the Row from the selected Row_iAny data signal S of the pixel of_i,jThe same readout electronics and drive scheme, the DC reference values (numbers) from the respective readout channel and ADC are obtained from each spare readout channel. In particular, the CDS reading applies the same way, which in effect enables a value to be obtained that represents the row noise level of the currently selected row. Let us call this value the row reference value VRN_iWhich is the average of the DC reference values obtained from each unused spare read channel, as follows: VRN_i＝∑Sp_kWhere A is the number of unused spare channels and k is an integer equal to 1 to A, corresponds to the rank of the A unused spare channels, where the reference row direction is, for example, the left-to-right direction in the plane of the drawing of FIG. 3.

Then Row from the currently selected Row_iEach pixel of the digital signal S_i,jSubtracting the row reference value VRN from the output_iTo finally obtain a low noise signal value d_i,jWhere row noise is suppressed or finally reduced.

This row noise suppression process is summarized in fig. 4. It requires at least one unused spare read channel, but this is the case in practice. A new DC reference is then obtained at each newly selected row, the reference being derived from each pixel signal S_i,jIs subtracted to provide a low noise signal d_i,j. This row noise suppression procedure is performed because, in addition to taking into account the vertical variation of the row noise, the row noise variation (horizontal variation) over the row length, which is not negligible in practice, is also taken into account by calculating a new reference value at each newly selected row. The latter is caused by the dispersion of spare read channels (or spare groups) over the length of the rows. Finally, it is well known that row noise in the pixel signal reduces the square root of a, where a is the number of spare readout channels used to generate the reference value.

Note that the DC reference signal for this row noise suppression is actually a DC analog voltage, the level of which is determined according to the ADC range, within the conversion range of the ADC, preferably in the middle range, so that the row noise estimate coincides with the ADC conversion range.

Any application can be easily applied in any sensor by providing a programmable register associated with a DAC, preferably located inside the sensor itself, to generate the specified analog voltage. This and other further details regarding how the DC reference signal is generated will be detailed in the following description.

Before this, however, the repair process will now be described in detail with reference to various embodiments of the invention.

First embodiment

Fig. 3 shows a first embodiment of the invention. Note that the pixel array 1 is not shown in detail, only the column conductors Col are shown, in order to improve the readability of the figure₁To Col_NRespectively, which are each operatively coupled to a respective readout channel of the readout circuit 2.

We will first describe the repair means and then the row noise suppression means.

Maintenance device

According to a first embodiment of the invention the read-out circuit 2 comprises spare read-out channels and configurable coupling means to enable coupling of a column conductor to its default read-out channel or to a different read-out channel according to a repair mode defined on the basis of the number and location of defective channels found.

The spare read channel is inserted among the default read channels based on one spare read channel every n default read channels. In other words, each spare group consists of a single spare read channel, the default read channels are grouped in a sequence of n consecutive read channels, the group Gn being given in fig. 3₁、Gn₂And Gn₃Wherein n is 8. Note that n-8 is used only for illustration in a reduced space of the drawing. In fact, n will generally be larger, e.g., equal to 32. This is for comparison with the statistical data of the number of defective read channels for a given technology. The 1/128 ratio is realistic for today's large array CMOS sensors.

In this example, the rows are from left to right in the figureConvention for increasing column rank towards, first default group Gn₁Comprising n first column conductors Col₁To Col₈(ii) a A second Gn₂Comprising n successive column conductors Col₉To Col₁₆... Then at Gn₁And Gn₂Includes a spare read channel RoCsp₁First spare group Gm₁(ii) a At Gn₂And Gn₃Includes a spare read channel RoCsp₂Another spare group Gm of₂And so on. Note that in practice it is not necessary to have the first default group Gn₁First default read column RoC₁The spare group is set on the left side of (c), and it is not necessary to read the column RoC at the last default_N(belongs to the last default group Gn_N/n) The right side of (a) is provided with a spare group.

N switch circuits SW1 act as multiplexing elements to couple each of the N column conductors of array 1 to a selected one of the three readout channels of readout circuit 2, i.e., for a given column conductor:

a. a default sense channel RoC-D, typically coupled with a given column conductor;

b. a first alternate read channel RoC-L next to the left (in the row direction) default read channel, which may be a "default" or "spare" type read channel depending on the rank of the default read channel in its default set,

c. a second alternate read channel RoC-R next to the right (in the row direction) default read channel, which may be a "default" or "spare" type read channel depending on the rank of the default read channel in its default set.

Note that a read channel "next" to a right (or left) read channel refers to a read channel next in the right row direction (or left row direction).

Consider the default group Gn shown in FIG. 3₂Column conductor Col in (1)_j。

Its default read channel RoC-D is RoC_j。

Its first alternative read channel RoC-L is "Default "type RoC_j-1Because RoC in FIG. 3_jNot the default group Gn₂The first channel (at the first rank in the left row direction). Gn₂Is RoC₉，RoC₉The "left" sense channel RoC-L of is Gn₁And Gn₂RoCsp of the spare read channel in between₁。

Similarly, its second alternate read channel RoC-R is of the "default" type RoC_j+1Because of RoC_jNot Gn₂The last channel in (at n-rank in the right row direction). Gn₂Is RoC₁₆，RoC₁₆The "right" sense channel RoC-R of (A) is Gn₂And Gn₃RoCsp of the spare read channel in between₂。

Fig. 5 illustrates a repair mode that incorporates a default group Gn₂With passages moving to the right and left, and then using the position of Gn respectively₂Two spare read channels on the left and right. In this example, Gn is found₂Two default read channels RoC₁₁And RoC₁₅Has the defect that they are respectively Gn₂Read channels at medium rank 3 and rank 7. These defective channels are represented by waveforms in the figure.

Gn according to the above principle₂The repair protocol was applied as follows:

-RoC₁₅up to RoC₁₆Second replacement read channels RoC-R, respectively, replaced with them, RoC, respectively, of replacement RoC15₁₆And replacement RoC₁₆RoCsp of₂(ii) a This corresponds to a right-shifted coupling mode.

-RoC₁₁Down to RoC₉Respectively replaced by their "left" sense channels RoC-L, respectively replacement RoC₁₁RoC (g)₁₀Replacement RoC₁₁RoC (g)₉And replacement RoC₉RoCsp of₁(ii) a This corresponds to a left-shifted coupling mode.

-RoC₁₂Up to RoC₁₄Not replaced, they are the operative read channels of their respective column conductors. This corresponds to the defaultThe coupled mode of (1).

In practice, coupling each column conductor to a respective readout channel among three possibilities is achieved by configuring the switching circuit SW1 (analog multiplexer): the input of each first switch SW1 is connected to the end of a respective column conductor and the switch is configured to route the input to one of the three outputs RoC-L, RoC-D and RoC-R. This means that the logic commands on the three "basic" switches in each switch SW1 can only take 3 combinations: "010" which corresponds to default output RoC-D (see Gn and Gn)₂RoC4 and RoC 5); "100", which corresponds to the left-shift coupling mode, enables the RoC-L output (see Gn and Gn)₂RoC in₉To RoC₁₁An associated switch); or "001", which corresponds to the right-shift coupling mode, enabling RoC-R output (see and Gn)₂RoC in₁₅And RoC¹⁶An associated switch). Then, one two-bit logic signal is sufficient to program/configure one of the three combinations in each switch circuit SW1, as shown in the decoding table TAB1 in fig. 6. In this example, shift register Set-SW1 is associated with a plurality of logic circuits, each of which generates a Set of switching signals to control one of the switching circuits SW 1. The 2 bits of the shift register generate a command set [ Sel-L, Sel-R and Sel-R]Adapted to respective switching circuits SW1, e.g. and RoC₁An associated switching circuit. In practice, the shift register is a set of basic shift registers that generate N command sets [ Sel-L, Sel-R and Sel-R ] by connecting N switch circuits SW1 in series]。

These first switches SW1 are on the input side of the readout circuit 2. On the output side, the column decoder is able to implement a decoder process that takes into account the coupling mode implemented by the switch circuit SW 1. This means that the column decoder will successively select N readout channels for each image frame, i.e. N channels are operative for reading N pixels in each row. Alternatively, the column decoder will select each readout channel (default and spare) implemented in circuit 2 in turn, and the DSP will sort out the correct data according to the coupling mode implemented.

Although fig. 3 and 5 show a readout circuit in which each readout channel has its own ADC, so that the output is a digital output for sequential transmission to the DSP (fig. 2) via the data shift register 6, the same applies to the case where the analog output is applied sequentially for conversion to a flash ADC (fig. 1).

However, as shown in FIGS. 3 and 5, the switch circuits SW1' that implement the reverse routing function of the input first switch SW1 may be implemented in actuality (rather than by the software set forth in the preceding paragraph), each of which returns the output carried by the RoC-L or RoC-R alternate channel to the corresponding default output signal line. The input commands to the corresponding circuits SW1 and SW1' are identical, which limits the requirements in a configurable/programmable device that configures the switch circuit. For example, if the left output (RoC-L) is selected at the input by one SW1 circuit, then the left input (Roc-L) is selected at the output by a corresponding one SW1' circuit. This representation in hardware facilitates the definition of the entire repair scheme. Yet another aspect of the invention is also conveniently explained for descriptive purposes when the active noise suppression function is advantageously implemented based on an unused alternate sense channel, where the unused device is not selected for repair purposes in the coupling mode of SW 1. However, as mentioned above, in practice all these routing aspects of the output of the sense channels of the sense circuit can be easily managed by the column decoder and/or the DSP processor, and the invention is not limited to hardware implementations of data routing at the output of the sense circuit but also applies to software implementations.

Line noise suppression

The general principle is shown in fig. 3, while the row noise suppression process is detailed in fig. 4, fig. 5 showing a practical case where some spare read-out channels are used for repair, and the remaining spare read-out channels may be used for the row noise suppression function according to the invention. According to the present invention, a coupling mode (SW1) using a spare sense channel is determined and implemented when a sensor integrated circuit has been tested and a defective sense column is identified. It is then first determined how many spare read channels are unused (step 300, fig. 4). This gives the number a of spare read channels remaining, and the location (address) of these a spare read channels. Note that in practice a will never be zero and the a remaining spare read channels may be sparse in row length. We can assign them a rank k, increasing from 1 to a in the row right direction (by convention).

These A spare read channels are used for application to the reference bus B_DCThe analog DC reference voltage DC _ ref is sampled. This is obtained by a second switching circuit SW2 comprising one multiplexing element for each spare sense channel, a reference bus B extending in the row direction over the length of the sense circuit 2_DCAnd (4) coupling. For each spare sense channel, the corresponding SW2 multiplexing element is only activated when the spare sense channel is not being used for repair (via SW 1). At the output of the alternate path, a switch SW2 'is shown, switch SW2' causing the signal carried by the alternate path to be carried as a standby signal to the row noise suppression stage when the alternate path is not being used in the repair mode. SW2' is in exactly the same state as SW2 (which means that the same logical command is applied to set both). But as explained above. Such a hardware representation may not be necessary because the DSP is able to classify the data signal based on the repair pattern reflected by the configuration (setting) of SW 1.

Because the spare sense channel implements exactly the same sensing operation as the default channel, the value representing the analog DC reference voltage obtained at the output of the spare sense channel is the CDS value, which quantifies the row noise level of the currently selected row. In other words, in the alternate readout path for sampling the DC voltage reference, the SHr and SHs signals (fig. 9) "sample" the exact same signal, and the subtraction between the two samples corresponds to the row noise level. In other words: the subtraction between two samples produces one actual sample of the line time noise.

Then, Row Row is selected for each newly selected Row in the readout circuit_iThe readout operation 100 (fig. 4) performed is suitable for reading pixel values in a selected row, but is also suitable for coupling operatively to the reference bus B_DCEach of the a spare sense channels of (a) reads the signal value Sp_k. This includes sample-and-hold with successive samples of the reference level and the signal levelOperation 100.1, and analog-to-digital conversion 100.2 in each readout channel (fig. 2) or performed by a flash ADC shared by the channels (fig. 1). Row for the currently selected Row_iIncludes pixel DATA _ pix { S }_i,j}_j＝1,…NAnd spare DATA DATA _ spare { Sp_k}_k＝1,…AAre CDS values (meaning the subtraction of the reference level and the signal level).

In step 200.1 (FIG. 4), the DATA _ spare { Sp } is applied throughout the spare DATA set_k}_k＝1,…AUpper calculation of Sp_kAverage of the digital values, thus obtaining the currently selected Row_iRow noise value RN_i. This averaging can reduce horizontal line noise variation (randomly) by the square root of a.

At step 200.2, Row is then selected for the currently selected Row_iFrom the pixel DATA stream DATA _ pix { S_i,j}_j＝1,…NEach pixel value S of_i,jSubtracts the row noise value RN_iTo thereby obtain a low noise value d_i,jAs previously described.

The processes 100 and 200 are then repeated for each new row of the array until all P rows have been read.

In fig. 3, all three illustrated spare sense channels are available, which results in their spare signal Sp₁、Sp₂、Sp₃Can be used to calculate the currently selected Row Row_iAverage row noise level VRN_i. In FIG. 5, some spare sense channels are used for repair (selected in SW1), so their outputs are not used for the row suppression process: that is why RoCsp₁And RoCsp₂The reason why the output of (c) is scratched out in the figure. Only the reserved spare channel RoCsp is shown₃Output standby signal Sp₁. Tag 1 is used to mark that it is the first alternate signal available for row noise suppression, with the convention adopted in this specification.

Note that in fig. 3 and 5, all the processes starting from the digital conversion within the readout channel are digital. In particular, process step 200.1 (evaluation RN)_i) And 200.2 (line noise subtraction) can be achieved by integrating the logicsThe editing circuit is either completed by the DSP (located inside or outside the sensor). Furthermore, when the ADCs are single as shown in fig. 1, the processing steps 200.1 and 200.2 occur after the ADCs and can then be done on-chip or off-chip by the DSP.

Now with respect to the DC analog reference voltage sampled by the a spare sense channels according to the invention, as already explained, the sense circuit 2 comprises a bus B_DCWhich extends in the row direction to cover the entire set of read-out channels. The bus B_DCAn analog DC reference voltage is transmitted. In practice, the value of the analog DC reference voltage is determined to correspond to the mid-range of the analog-to-digital converter of the readout circuit, which corresponds to the optimal condition for effective row noise suppression. In a practical example, the analog DC reference voltage may be set to the same voltage as the pixel common mode voltage, typically between 2.2V and 1.6V in 3.3V CIS technology. The analog DC reference voltage need not be generated by a very expensive bandgap source. Any voltage source, preferably integrated into the optical sensor, is convenient.

However, it is desirable to be able to easily adjust the voltage level in each optical sensor. Furthermore, it is desirable to reference bus B before the sampling phase of each currently selected row_DCA quiet DC signal is obtained. Since otherwise the noise in the DC reference voltage would generate row time noise since it is sampled by the spare sense channel used for this purpose.

Fig. 8 illustrates a preferred embodiment 400 of generating and applying a DC analog reference voltage DC ref to a reference bus, which addresses these various aspects.

It comprises a digital-to-analog converter DAC401, which makes it easy to compare the voltage reference value (digital code) V _ ref in the parameter register of the optical sensor_DCProgramming is performed and the required analog DC reference voltage DC ref is generated by the DAC. Then, an operational amplifier 402 (output looped back at its inverting input) with high drive capability and operating as a follower is used to apply a DC reference DC _ ref from the DAC (at its non-inverting input) to the capacitive bus reference line B_DC。

Preferably, a switch 403 is provided at the output of the follower amplifier 10, which is connected to the busReference line B_DCIs associated with the entire length distributed buffer 404 to evenly load bus reference line B_DC. The buffer is then connected between the first bus 405 (connected to the switch 403) and the reference bus B_DCIn the meantime. With this implementation, buffer 404 resembles a large distributed buffer with very low noise.

Operation of switch 403 with the buffer causes reference bus B_DCIs immune to temporal noise from the buffer 402 and DAC401 because the analog signal is sampled and frozen at the input of the row distributed buffer. In practice, the buffer 404 may be a single transistor or an operational amplifier mounted as a follower. The output voltage is therefore equal to the input voltage.

As shown in fig. 9, before the start of the read sequence 100, the switch 403 is activated once during each line time by the pulse signal Set _ DC. Reference bus B by pulse signal Set _ DC_DCSet to a DC analog reference voltage DC _ ref, then the reference bus is isolated from the input stages (DAC, amplifier and switches): the analog DC voltage value is then frozen and quiet, as shown in fig. 9, with reference to the common true CDS readout sequence for the entire following read sequence of the currently selected row. Specifically, the switch 403 is activated by the pulse signal Set _ DC, and the reference bus B_DCSet to a DC analog reference voltage at the time of the Set _ DC pulse; it is then isolated from the input stage and DC _ ref is frozen. Only then, in each pixel of the currently selected row, a signal RS is activated to reset the sensing node in these pixels and the respective reference level of the sensing node is sampled (SHr) in each readout channel; the signal TX is then activated in each pixel of the selected row to transfer the charge integrated by the pixel to its sense node, and the corresponding signal level is sampled (SHr) in the readout channel.

In the alternate sense channel operatively connected to the reference bus, the two pulse signals SHr and SHs are also applicable, but each results in a reference bus B_DCThe DC analog reference voltage on is sampled. This enables a signal (analog or digital) corresponding only to the row noise signal to be obtained by CDS subtraction and then from each pixelSignal S_i,jThe signal is subtracted.

Fig. 7 shows a second embodiment in which the repair mode operates on a group basis to simplify the commands to multiplex the elements by reducing the setup circuitry (fig. 6) and to allow multiple spare sense channels between each group of default sense channels, resulting in a better averaging process 200.2.

In the present embodiment, the spare group G_m1、G_m2、G_m3Comprising m spare read channels, wherein m is larger than 1. In the figure, m is 4. In principle it may be any integer value larger than 1, but in general it is preferably a power of 2 for decoding aspects. In practice, 4 is one possible value, but m may also take the form of, for example, 8 or 16. The principles of the present invention are not limited to a particular value.

The replacement principle of repairing any defective read channels is then now to move left or right on a group basis. That is, like Gm₁In each such default group, the default read channels are further grouped into u subsets of m consecutive channels (u being an integer, equal to n/m). As shown, there are u subsets SS1 through SSu in each default group. The switch circuits SW1 are similarly grouped to form the u subsets SS₁、SS₂、......SS_uU groups 10.1, 10.2, of corresponding m SW1 circuits.

Then, when a subset contains at least one defective channel, e.g. Gn₁SS in_u-1The switch circuits SW1 of the corresponding group 10.u-1 are all arranged to apply a right-shift replacement mode to route the m corresponding column conductors (inputs) to the next subset SS_uM readout channels (one-to-one). The solution propagates in the direction of displacement all the way to Gn₁Spare group Gm on the right₁. I.e. all SW1 switches in group 10.u are set to apply the right shift replacement mode to route their corresponding column conductors to the default group Gn₁Nearby spare group Gm₁M read-out channels. In this embodiment, and as shown in fig. 7, the default readout channel is then replaced with the next m-rank further to its right or left. As explained for the first embodiment, in the default groupThe choice of shift right or shift left replacement mode is a matter of how close the defective channel is to the spare groups at the two ends of the default group and also depends on whether the left or right adjacent default group also has a defective channel.

Then, the configuration of switch circuit SW1 is simplified because the m switch circuits SW1 attached to a given subset are all configured the same to select either the default output (Sel-D), the right output (Sel-R), or the left output (Sel-L). Referring to fig. 6, this means that the same command signal C_10.1Is applied to attach to Gn₁Subset SS of₁M-4 multiplexing elements of the switching circuit 10.1. In this example, logical command C_10.1The default output RoC-D is selected among the m multiplexing elements of the circuit 10.1. In contrast, logical command C_10.u-1And C_10.uThe correct outputs RoC-R are selected in each of the m multiplexing elements, respectively.

Then, like Gm in FIG. 7₂Such unused spare sets may be used for row squelch operation according to the invention. For this row noise suppression, providing m adjacent spare readout channels at each position of the unused spare groups makes averaging efficiency over the row length higher.

The readout circuit that implements the above described repair operation is advantageously scalable and repeatable, as shown in fig. 3, 5 and 7. This is still true when the row noise suppression operation according to the invention is also implemented. Scalability allows for easy implementation of readout circuits of any array size. The repeatability is compatible with the tiling techniques typically used to fabricate large area integrated circuits. This further contributes to a reduction in manufacturing costs.

Finally, during the setup of the optical sensor, the switch circuits SW1, SW2 (and eventually their complements SW1', SW2') are configured through the shift register, which defines a routing mode to repair defects found during manufacturing testing and defines a spare channel for row suppression operation. The parameter register of the optical sensor will also be set to the value a to initiate the averaging step 200.2. Finally, when the DC analog reference voltage is obtained by the DAC, the parameter register is also usedIs set to a corresponding digital value V _ ref_DCFor application in operation to a DAC (fig. 8).

The invention that has been described can achieve an efficient optical sensor with enhanced image quality (good SNR, wide dynamic range) through a scalable and programmable readout channel repair process that can easily implement line noise reduction functionality at low cost including low manufacturing cost, low surface area cost, and low post-processing cost.