阅读说明：本技术 一种调节igbt开通和关断损耗比例的新型结构 (Novel structure for adjusting turn-on and turn-off loss proportion of IGBT ) 是由 陆潇 王海军 于 2021-09-16 设计创作，主要内容包括：本申请公开了一种调节IGBT开通和关断损耗比例的新型结构,包括第一接地沟槽、第一门极沟槽、发射极接触、第二门极沟槽及第二接地沟槽；第一接地沟槽和第一门极沟槽之间有第一无源台面,第一无源台面上设有发射极接触；第一门极沟槽和第二门极沟槽之间有源台面,有源台面还设有发射极接触；第二门极沟槽和第二接地沟槽之间设有第二无源台面,第二无源台面上设有发射极接触；在第一无源台面和第二无源台面的发射极接触被分隔成第一P阱和第二P阱,第一P阱和第二P阱之间通过高阻通路联通,第一P阱或第二P阱其中一个的第一侧通过氧化层与发射极金属连接。在本申请控制开通损耗/关断损耗比例可以被精准的分配以达到开通损耗与关断损耗的最优值。(The application discloses a novel structure for adjusting the turn-on and turn-off loss proportion of an IGBT (insulated gate bipolar transistor), which comprises a first grounding groove, a first gate electrode groove, an emitter contact, a second gate electrode groove and a second grounding groove; a first passive mesa is arranged between the first grounding groove and the first gate electrode groove, and an emitter electrode contact is arranged on the first passive mesa; an active mesa is arranged between the first gate electrode groove and the second gate electrode groove, and an emitter electrode contact is also arranged on the active mesa; a second passive table top is arranged between the second gate groove and the second grounding groove, and an emitter electrode contact is arranged on the second passive table top; the emitter contacts of the first passive mesa and the second passive mesa are separated into a first P well and a second P well, the first P well and the second P well are communicated through a high-resistance path, and the first side of one of the first P well or the second P well is connected with the emitter through an oxide layer. The control on-loss/off-loss ratio can be accurately distributed to reach the optimal value of the on-loss and the off-loss.)

1. A novel structure for adjusting the turn-on and turn-off loss proportion of an IGBT is characterized by comprising: a first ground trench, a first gate trench, an emitter contact, a second gate trench, and a second ground trench;

a first passive mesa between the first ground trench and a first side of the first gate trench, an emitter contact also being disposed on the first passive mesa;

a source mesa is formed between the second side of the first gate trench and the first side of the second gate trench, and an emitter contact is formed on the source mesa;

a second passive mesa is further arranged between the second side of the second gate trench and the second grounding trench, and an emitter contact is further arranged on the second passive mesa;

the emitter contacts of the first passive mesa and the second passive mesa are separated into a first P well and a second P well by a blocking trench, wherein the first P well and the second P well are communicated through a high-resistance path.

2. The novel structure for adjusting the turn-on and turn-off loss ratio of an IGBT according to claim 1, wherein the first side of one of the first P-well or the second P-well is connected with an emitter metal through an oxide layer.

3. The novel structure for adjusting turn-on and turn-off loss ratio of IGBT as claimed in claim 2, characterized in that said emitter contact is also connected with emitter metal.

4. The novel structure for adjusting turn-on and turn-off loss ratio of an IGBT according to claim 1, wherein the blocking trench is provided separately from the emitter contact.

5. The novel structure for adjusting the turn-on and turn-off loss ratio of an IGBT as claimed in claim 1, wherein said blocking trench is shorted to said emitter contact.

6. The novel structure for adjusting the turn-on and turn-off loss ratio of an IGBT as claimed in claim 1, wherein the first P well and the second P well are communicated with each other through a high-resistance path formed by the first gate trench/the second gate trench and the blocking trench.

7. The novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT according to claim 1, wherein the first P well and the second P well are communicated with each other through a high-resistance path formed by the emitter contact and the blocking trench.

8. The novel structure for adjusting the turn-on and turn-off loss ratio of an IGBT as claimed in claim 1, wherein an emitter junction and an oxide layer are further disposed between said gate trench and said emitter contact.

9. The novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT as claimed in claim 8, wherein the blocking trench is formed by filling polysilicon and gate oxide.

10. The novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT according to any one of claims 1 to 9, wherein an offset region is further connected to the second side of the first P-well or the second P-well.

Technical Field

The application belongs to the technical field of insulated gate bipolar transistors, and particularly relates to a novel structure for adjusting the turn-on and turn-off loss proportion of an IGBT.

Background

In the definition process of an Insulated Gate Bipolar Transistor (IGBT) device, switching loss is one of the most important performance parameters, and the switching loss is divided into on and off losses, and there is also a certain relationship between the two, especially the total gate charge (Q)_g) In the case of larger gate-source capacitance or gate-emitter capacitance (C) inevitably increases by some measures to reduce turn-off loss_gs) This causes a gate-source charge (Q)_gs) The significant increase, the rate of current change (didt) during turn-on becomes small, thereby multiplying turn-on losses. Adjusting and optimizing the ratio between the turn-on loss and the turn-off loss is a very important content in the device definition process, which not only helps the turn-on loss and the turn-off loss to reach the target values, but also helps to minimize the total switching loss due to a good turn-on loss/turn-off loss ratio, and the effective technical research for adjusting the ratio of the turn-on loss and the turn-off loss is a current urgent solution.

Disclosure of Invention

Aiming at the defects or shortcomings of the prior art, the technical problem to be solved by the application is to provide a novel structure for adjusting the turn-on and turn-off loss proportion of the IGBT.

In order to solve the technical problem, the application is realized by the following technical scheme:

the application provides a novel structure of adjusting IGBT turn-on and turn-off loss ratio includes: a first ground trench, a first gate trench, an emitter contact, a second gate trench, and a second ground trench;

a first passive mesa between the first ground trench and a first side of the first gate trench, an emitter contact also being disposed on the first passive mesa;

an active mesa is arranged between the second side of the first gate electrode groove and the first side of the second gate electrode groove, and an emitter electrode contact is further arranged on the active mesa;

a second passive mesa is further arranged between the second side of the second gate trench and the second grounding trench, and an emitter contact is further arranged on the second passive mesa;

the emitter contacts of the first and second passive mesas are separated into first and second P-wells by a blocking trench, wherein communication is achieved between the first and second P-wells through a high-resistance path.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, a first side of one of the first P well or the second P well is connected to an emitter metal through an oxide layer.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, the emitter contact is further connected to an emitter metal.

Optionally, in the above novel structure for adjusting turn-on and turn-off loss ratio of the IGBT, the blocking trench is disposed separately from the emitter contact.

Optionally, in the above novel structure for adjusting turn-on and turn-off loss ratios of an IGBT, the blocking trench is shorted with the emitter contact.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, a communication between the first P-well and the second P-well is realized by a high-resistance path formed by the first gate trench/the second gate trench and the blocking trench.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, the first P well and the second P well are communicated with each other through a high-resistance path formed by the emitter contact and the blocking trench.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, an emitter junction and an oxide layer are further disposed between the gate trench and the emitter contact.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, the blocking trench is formed by filling polysilicon and gate oxide.

Optionally, in the above novel structure for adjusting the turn-on and turn-off loss ratio of the IGBT, an offset region is further connected to the second side of the first P well or the second P well.

Compared with the prior art, the method has the following technical effects:

in this application, the first and second passive mesas have emitter contacts separated by a blocking trench into first and second P-wells, wherein the first and second P-wells are in communication through a high resistance path, and wherein a resistor R is connected to the first and second P-wells_pCan be precisely controlled by the width and length of the high-resistance path through R_pTherefore, the voltage of the second P trap can be accurately controlled, and the proportion of the turn-on loss/the turn-off loss can be accurately distributed to achieve the optimal value of the turn-on loss and the turn-off loss.

In the application, the blocking groove can be a section of groove or a plurality of sections of grooves with intervals, the arrangement flexibility is high, and the practicability is high; and the blocking groove is formed by filling polycrystalline silicon and gate oxide. Of course, the blocking trench may be formed by filling only an oxide layer or other non-conductive material.

In the present application, the resistor R_pCan be precisely controlled by the width and length of the high-resistance path through R_pThereby, the voltage of the second P trap can be controlled more accurately, and the grid charge of the second P trap area in the process of voltage change (dvdt) is C (V)_g-V_{Second P well}) Since the second p-well is not directly connected to ground but passes through a high-resistance path, its voltage is taken as the displacement current at dvdt and the resistance of the high-resistance path, and thus the Q in dvdt_gControlled by the resistance of this high resistance path. For example, if R_pLarger, second P-well more likely to be floating, then Q of the turn-on process_gRelatively small, the turn-on loss (Eon) will be relatively small, while during turn-off the discharge process becomes slow (turn-off loss) Eoff increases, since the discharge path of the plasma of the second P-well region is blocked, and vice versa. Based on this principle, the on-loss/off-loss ratio can be precisely distributed to achieve the optimum value of the on-loss and the off-loss.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, with reference to the accompanying drawings in which:

FIG. 1: according to the sectional view of the novel structure for adjusting the turn-on and turn-off loss proportion of the IGBT, the embodiment of the application is adopted;

FIG. 2: a cross-sectional view of the structure of fig. 1 taken along direction C1;

FIG. 3: a cross-sectional view of the structure of fig. 1 taken along direction C2;

FIG. 4: a cross-sectional view of the structure of fig. 1 taken along direction C3;

FIG. 5: the local section of the novel structure for adjusting the turn-on and turn-off loss proportion of the IGBT is provided by the embodiment of the application;

FIG. 6: a cross-sectional view of the structure shown in FIG. 5;

FIG. 7: the section of the novel structure for adjusting the turn-on and turn-off loss proportion of the IGBT according to the further embodiment of the application;

FIG. 8: a partial enlarged view of the structure shown in fig. 7;

FIG. 9: in an embodiment of the present application, a structure diagram of a high resistance path is shown.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

As shown in fig. 1 to 4, in one embodiment of the present application, a novel structure for adjusting turn-on and turn-off loss ratios of an IGBT includes: a first ground trench 10, a first gate trench 20, an emitter contact 30, a second gate trench 40, and a second ground trench 50;

a first inactive mesa a between the first ground trench 10 and a first side of the first gate trench 20, an emitter contact 30 being further provided on the first inactive mesa a;

an active mesa C is formed between the second side of the first gate trench 20 and the first side of the second gate trench 40, and an emitter contact 30 is formed on the active mesa C;

a second passive mesa B is further disposed between the second side of the second gate trench 40 and the second ground trench 50, and an emitter contact 30 is further disposed on the second passive mesa B;

the emitter contacts 30 in the first and second passive mesas a and B are each separated by a blocking trench 60 into a first P-well 71 and a second P-well 72, wherein communication is provided between the first P-well 71 and the second P-well 72 through a high resistance path.

In this embodiment, the emitter contacts 30 of the first and second passive mesas a and B are each separated by a blocking trench 60 into a first P-well 71 and a second P-well 72, wherein the first P-well 71 and the second P-well 72 are in communication through a high resistance path, wherein R is_pCan be precisely controlled by the width and length of the high-resistance path because the second p-well is not directly grounded, but passes through a high-resistance path whose voltage is taken as the displacement current at dvdt and the resistance of the high-resistance path, through R_pThus, the voltage of the second P well 72 can be controlled relatively accurately, and the gate charge of the second P well 72 region during the voltage change (dvdt) is C (V)_g-V_{Second P well}) Then Q in the process of dvdt_gControlled by the resistance of this high resistance path. For example, if R_pIs larger, the second P-well 72 is more inclined to be floating, so Q of the turn-on process_gRelatively small, the turn-on loss (Eon) will be relatively small, and during turn-off the discharge process becomes slow (turn-off loss) due to the blocking of the discharge path of the plasma in the second P-well 72 region, and vice versa. Based on this principle, the on-loss/off-loss ratio can be precisely distributed to achieve the optimal values of the on-loss and the off-loss.

In the present embodiment, the resistance of the high resistance path can be precisely controlled by controlling the length and width of the blocking trench 60.

It should be further noted that, in this embodiment, the blocking groove 60 may be a section of groove, or may be a plurality of sections of grooves with intervals, so that the flexibility of the arrangement is high, and the practicability is strong.

As shown in fig. 2, in the present embodiment, a first side of one of the first P well 71 or the second P well 72 is connected to an emitter metal 90 through an oxide layer 80. In the present embodiment, the first side of the first P-type well 71 is connected to the emitter metal 90 through the oxide layer 80. The person skilled in the art will clearly understand that: the first side of second P-well 72 is connected to emitter metal 90 via oxide layer 80.

Further, in this embodiment, the emitter contact 30 is also connected to an emitter metal 90.

As shown in fig. 4, in this embodiment, an emitter junction 31 and an oxide layer 80 are further disposed between the gate trench and the emitter contact 30.

Optionally, the blocking trench 60 is formed by filling polysilicon and gate oxide. Of course, the blocking trench 60 may be formed by filling only the oxide layer 80 or other non-conductive material.

As shown in fig. 2 to 4, in the present embodiment, an offset region 100 is further connected to a second side of the first P well 71 or the second P well 72.

As shown in fig. 5 and 6, further optionally, the blocking trench 60 is provided separately from the emitter contact 30.

Alternatively, further optionally, the blocking trench 60 is shorted to the emitter contact 30 by a blocking gate contact 61. That is, in the present embodiment, the blocking trench 60 may be floating or shorted with the emitter contact 30.

Further, in the present embodiment, as shown in fig. 7 to 9, the first P-well 71 and the second P-well 72 are communicated with each other by a high resistance path formed by the first gate trench 20 and the blocking trench 60; alternatively, the first P well 71 and the second P well 72 are communicated with each other by a high resistance path formed by the second gate trench 40 and the blocking trench 60.

The first P well 71 and the second P well 72 are communicated with each other by a high-resistance path formed by the emitter contact 30 and the blocking trench 60.

Please refer to fig. 7 to fig. 9:

V_{first P well}＝0，

V_{Second one}P_{Trap with a plurality of wells}＝V_{First of all}P_{Trap with a plurality of wells}+I_Rp*R_p＝I_Rp*R_p，

Wherein, I_RpIs the displacement current through the charging and discharging of second P-well 72 during dvdt. Can be seen because R_pCan be precisely controlled by the width and length of the high-resistance path through R_pThus, the voltage of the second P well 72 can be controlled relatively accurately, and the gate charge of the second P well 72 region during the voltage change (dvdt) is C (V)_g-V_{Second P well 72}) Then Q in the process of dvdt_gControlled by the resistance of this high resistance path. For example, if R_pLarger, second P-well 72 is more likely to be floating, then Q for the turn-on process_gRelatively small, the on-loss (Eon) is relatively small, and during the off-process, due to the plasma discharge path in the second P-well 72 region being blocked, the discharge process slows down, (off-loss) Eoff increases, and vice versa. Based on this principle, the on-loss/off-loss ratio can be precisely distributed to achieve the optimal values of the on-loss and the off-loss.

In the present application, the emitter contacts 30 of the first and second passive mesas a and B are each separated by a blocking trench 60 into a first P-well 71 and a second P-well 72, wherein the first P-well 71 and the second P-well 72 are in communication through a high resistance path, wherein R_pCan be precisely controlled by the width and length of the high-resistance passage through R_pThe voltage of the second P-well 72 can thus be controlled relatively accurately, while the gate charge of the second P-well region during voltage change (dvdt) is C (V;)_g-V_{Second P well}) Because the second p-well is notDirectly connected to ground, but through a high-resistance path whose voltage is taken as the displacement current in dvdt and the resistance of the high-resistance path, thus Q in dvdt_gControlled by the resistance of the high-resistance path, and further controls the ratio of the turn-on loss/the turn-off loss to be accurately distributed so as to achieve the optimal value of the turn-on loss and the turn-off loss. In the present application, the blocking groove 60 may be a section of groove, or may be a plurality of sections of grooves with intervals, and the arrangement flexibility is high, and the practicability is strong; wherein, the blocking trench 60 is formed by filling polysilicon and gate oxide. Of course, the blocking trench 60 may be formed by filling only the oxide layer 80 or other non-conductive material. In conclusion, the application has good market application prospect.

In the description of the present application, unless expressly stated or limited otherwise, the terms "connected," "connected," and "fixed" are to be construed broadly, e.g., as meaning permanently connected, removably connected, or integral to one another; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

In the description of the present embodiment, the terms "upper", "lower", "left", "right", etc. are used in an orientation or positional relationship shown in the drawings only for convenience of description and simplicity of operation, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application. Furthermore, the terms "first" and "second" are used only for descriptive purposes and are not intended to have a special meaning.

The above embodiments are merely to illustrate the technical solutions of the present application and are not limitative, and the present application is described in detail with reference to preferred embodiments. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the spirit and scope of the claimed subject matter.