Digital electric isolation device

文档序号:490307 发布日期:2022-01-04 浏览:7次 中文

阅读说明:本技术 一种数字电气隔离装置 (Digital electric isolation device ) 是由 林甲富 许明伟 樊晓兵 于 2021-09-17 设计创作,主要内容包括:本发明公开了一种数字电气隔离装置,包括发射端,用于产生发射输出的第一电信号;压电换能器,用于接收所述发射端发出的第一电信号,所述压电换能器在其内部将所述第一电信号依次转换为机械信号、第二电信号,然后将所述第二电信号输出至接收端;接收端,用于接收由所述压电换能器发来的第二电信号。本发明解决了现有技术中隔离装置存在能耗高、效率低、体积大、笨重等缺点,提供一种数字电气隔离装置,该装置成本低、体积小、集成度高,便于推广使用。(The invention discloses a digital electric isolation device, which comprises a transmitting end, a receiving end and a control end, wherein the transmitting end is used for generating a first electric signal for transmitting and outputting; the piezoelectric transducer is used for receiving a first electric signal sent by the transmitting end, sequentially converting the first electric signal into a mechanical signal and a second electric signal in the piezoelectric transducer, and then outputting the second electric signal to the receiving end; and the receiving end is used for receiving the second electric signal sent by the piezoelectric transducer. The invention solves the defects of high energy consumption, low efficiency, large volume, heavy weight and the like of an isolation device in the prior art, and provides the digital electrical isolation device which has low cost, small volume, high integration level and convenient popularization and use.)

1. A digital electrical isolation device, comprising

The transmitting end is used for generating a first electric signal of transmitting output;

the piezoelectric transducer is used for receiving a first electric signal sent by the transmitting end, sequentially converting the first electric signal into a mechanical signal and a second electric signal in the piezoelectric transducer, and then outputting the second electric signal to the receiving end;

and the receiving end is used for receiving the second electric signal sent by the piezoelectric transducer.

2. The digital electrical isolation device of claim 1, wherein the piezoelectric transducer is integrated with the transmitting end and the receiving end by a semiconductor process.

3. The digital electrical isolation device of claim 2, wherein the transmitting end, the piezoelectric transducer, and the receiving end are integrated on at least one wafer.

4. The digital electrical isolation device of claim 3, wherein the transmitting end, the piezoelectric transducer and the receiving end are integrated on three adjacent wafers in sequence.

5. The digital electrical isolation device of claim 4, wherein the transmitting terminal is integrated on a first wafer through a CMOS process, the piezoelectric transducer is integrated on a second wafer through a SAW filter process, and the receiving terminal is integrated on a third wafer through a CMOS process.

6. The digital electrical isolation device of claim 1, wherein the transmitting end comprises:

a mixer for mixing a data input signal Detain with a CLK signal and shifting the data input signal Attain to a frequency f0 of the CLK signal;

the first amplifier INV1 is used for amplifying the signal sent by the mixer and outputting an amplified TXB signal to the first input end of the piezoelectric transducer;

the second amplifier INV2 is used for amplifying the signal from the mixer and outputting an amplified TXA signal to the second input end of the piezoelectric transducer;

wherein the TXB signal and the TXA signal have the same amplitude and opposite phase.

7. The digital electrical isolation device of claim 6, wherein the receiving end comprises:

a third amplifier AMP1 for receiving and amplifying a first output signal RXA of the piezoelectric transducer, sending the RXA signal to a power detector;

a fourth amplifier AMP2 for receiving and amplifying a second output signal RXB of the piezoelectric transducer, sending the RXB signal to the power detector;

a power detector for combining the RXA signal and the RXB signal together to output a data output signal; wherein the RXA signal and the RXB signal have the same amplitude and opposite phase.

Technical Field

The invention belongs to the technical field of electrical isolation, and particularly relates to a digital electrical isolation device.

Background

Galvanic isolation (Galvanic isolation) refers to the way in which current is prevented from flowing directly from one area to another in a circuit, i.e., no direct current flow path is established between the two areas. Although the current cannot flow directly, the energy or information can still be transmitted by other means, such as electromagnetic induction or electromagnetic waves, or by optical, acoustic or mechanical means.

The existing electric isolation technology comprises transformer isolation, capacitor isolation and the like. The transformer isolation is characterized in that no conductor is arranged between the coils of the primary side and the secondary side which are mutually coupled by magnetic flux, so that current can directly flow (the primary side and the secondary side of the autotransformer are connected and have no electric isolation function), and the voltage difference between the two coils can reach thousands of volts (isolation voltage) according to the industrial standard without insulation damage. The amplifier also operates on a similar principle. Transformers are commonly used to vary the magnitude of the ac voltage, and 1:1 turns ratio isolation transformers are used in safety-related applications. Some chips are also isolated using transformers. The existing transformer isolation has the problems of high energy consumption, low efficiency, large volume, heaviness and the like.

The capacitor is isolated, the capacitor can allow alternating current to pass through, but can block direct current, so that alternating current signals can be transmitted in circuits with different direct current voltages, but if the voltage difference is too large, the capacitor can also fail, and the situation that two ends are directly short-circuited is changed.

Therefore, an isolation device with low cost, small volume and high integration is lacking nowadays.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: the isolation device overcomes the defects of high energy consumption, low efficiency, large volume, heaviness and the like of the isolation device in the prior art, and provides the digital electrical isolation device which is low in cost, small in volume, high in integration level and convenient to popularize and use.

The technical solution of the invention is as follows:

a digital electrical isolation device comprises

The transmitting end is used for generating a first electric signal of transmitting output;

the piezoelectric transducer is used for receiving a first electric signal sent by the transmitting end, sequentially converting the first electric signal into a mechanical signal and a second electric signal in the piezoelectric transducer, and then outputting the second electric signal to the receiving end;

and the receiving end is used for receiving the second electric signal sent by the piezoelectric transducer.

The digital electrical isolation device provided by the invention integrates the piezoelectric transducer with the transmitting end and the receiving end by adopting a semiconductor process.

The transmitting end, the piezoelectric transducer and the receiving end are integrated on at least one wafer.

In the digital electrical isolation device provided by the embodiment of the invention, the transmitting end, the piezoelectric transducer and the receiving end are sequentially integrated on three adjacent wafers.

The transmitting end is integrated on a first wafer through a CMOS process, the piezoelectric transducer is integrated on a second wafer through an SAW filter process, and the receiving end is integrated on a third wafer through the CMOS process.

In the digital electrical isolation apparatus provided in the embodiment of the present invention, the transmitting end includes: a mixer for mixing a data input signal Attain with a CLK signal and shifting the data input signal Attain to a frequency f0 of the CLK signal; the first amplifier INV1 is used for amplifying the signal sent by the mixer and outputting an amplified TXB signal to the first input end of the piezoelectric transducer; the second amplifier INV2 is used for amplifying the signal from the mixer and outputting an amplified TXA signal to the second input end of the piezoelectric transducer; wherein the TXB signal and the TXA signal have the same amplitude and opposite phase.

In the digital electrical isolation apparatus provided in the embodiment of the present invention, the receiving end includes: a third amplifier AMP1 for receiving and amplifying a first output signal RXA of the piezoelectric transducer, sending the RXA signal to a power detector; a fourth amplifier AMP2 for receiving and amplifying a second output signal RXB of the piezoelectric transducer, sending the RXB signal to the power detector; a power detector for combining the RXA signal and the RXB signal together to output a data output signal DATAout; wherein the RXA signal and the RXB signal have the same amplitude and opposite phase.

The invention has the beneficial effects that: the piezoelectric transducer is integrated with the transmitting end and the receiving end by adopting a semiconductor process, and the first electric signal of the transmitting end is skillfully converted into a mechanical signal and a second electric signal in turn by the piezoelectric transducer and then output to the receiving end. The design concept of the electrical isolation is unique, and the transmitting end, the piezoelectric transducer and the receiving end are integrated on the wafer, so that the designed digital electrical isolation device is low in cost, small in size, high in integration level and convenient to popularize and use.

The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.

Drawings

Fig. 1 is a circuit structure composition diagram of a digital electrical isolation device provided by the present invention.

Detailed Description

A digital electrical isolation device according to an embodiment of the present invention is described in detail below with reference to the accompanying drawings.

It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, a digital electrical isolation device provided by an embodiment of the present invention includes a transmitting terminal, configured to generate a first electrical signal of a transmitting output; the piezoelectric transducer is used for receiving a first electric signal sent by the transmitting end, sequentially converting the first electric signal into a mechanical signal (the mechanical signal in the embodiment is exactly an acoustic mechanical signal) and a second electric signal in the piezoelectric transducer, and then outputting the second electric signal to the receiving end; and the receiving end is used for receiving the second electric signal sent by the piezoelectric transducer.

The transmitting end of the invention comprises: a Mixer (MIX) for mixing the data input signal DATAin with the CLK signal and shifting the data input signal DATAin to the frequency f0 of the CLK signal; the first amplifier INV1 is used for amplifying the signal from the mixer and outputting the amplified TXB signal to the first input end of the piezoelectric transducer; the second amplifier INV2 is used for amplifying the signal from the mixer and outputting the amplified TXA signal to the second input end of the piezoelectric transducer; the TXB signal and the TXA signal have the same amplitude and opposite phases. The energy of the two signals TXB/TXA is concentrated at the f0 frequency of the CLK signal.

The piezoelectric transducer of the present invention includes: a first input terminal for receiving the TXB signal output by the first amplifier INV1 in the transmitting terminal; a second input terminal for receiving the TXA signal output by the second amplifier INV2 in the transmitting terminal; a first output terminal for outputting a first output signal RXA; and a second output terminal for outputting a second output signal RXB.

The receiving end of the invention comprises: a third amplifier AMP1 for receiving and amplifying a first output signal RXA of the piezoelectric transducer, sending the RXA signal to the power detector; a fourth amplifier AMP2 for receiving and amplifying the second output signal RXB of the piezoelectric transducer, sending the RXB signal to the power detector; a power detector for combining the RXA signal and the RXB signal together and outputting a data output signal DATAout; the RXA signal and the RXB signal have the same amplitude and opposite phases. The energy of the RXA and RXB signals is concentrated at the f0 frequency of the CLK signal.

The original DATAin to DATAout are recovered by a power detector, which may also be a mixer.

In the digital electrical isolation device provided by the embodiment of the invention, the piezoelectric transducer, the transmitting end and the receiving end are integrated together by adopting a semiconductor process; the device can be realized with low cost by adopting a semiconductor process, and the product has the characteristic of small volume.

The transmitting end, the piezoelectric transducer and the receiving end may be integrated on at least one wafer. For example, the transmitting end, the piezoelectric transducer and the receiving end are integrated on a wafer. In the embodiment, a transmitting end, a piezoelectric transducer and a receiving end are sequentially integrated on three adjacent wafers, the transmitting end is integrated on a first wafer through a CMOS (complementary metal oxide semiconductor) process, the piezoelectric transducer is integrated on a second wafer through a SAW filter process, and the receiving end is integrated on a third wafer through the CMOS process.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and all simple modifications, changes and equivalent structural changes made to the above embodiment according to the technical spirit of the present invention still fall within the protection scope of the technical solution of the present invention.

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