阅读说明：本技术 一种USB Type-C/PD通信的接口电路及其控制方法 (USB Type-C/PD communication interface circuit and control method thereof ) 是由 肖哲飞 于 2021-06-11 设计创作，主要内容包括：本发明属于电子电路技术领域,具体的说是涉及一种USB Type-C/PD通信的接口电路及其控制方法。本发明的电路主要由NMOS管、PMOS管、电流源和电荷泵构成,通过控制PMOS管和NMOS的开启,将电流源电流输出到CC芯片,实现Type-C握手过程,同时通过VCONN使能信号控制PMOS管开启,将电源电压短接到CC芯片,实现VCONN功能输出。本发明的有益效果是：本发明电路结构非常简单,可以同时支持Type-C握手功能和VCONN输出功能,同时利用简单的栅端嵌位,实现端口高压短路保护功能。(The invention belongs to the technical field of electronic circuits, and particularly relates to a USB Type-C/PD communication interface circuit and a control method thereof. The circuit mainly comprises an NMOS tube, a PMOS tube, a current source and a charge pump, the current of the current source is output to a CC chip by controlling the opening of the PMOS tube and the NMOS, the Type-C handshake process is realized, meanwhile, the PMOS tube is controlled to be opened by a VCONN enabling signal, the power supply voltage is short-circuited to the CC chip, and the VCONN function output is realized. The invention has the beneficial effects that: the circuit structure of the invention is very simple, can simultaneously support the Type-C handshake function and the VCONN output function, and simultaneously realizes the high-voltage short-circuit protection function of the port by utilizing the simple gate terminal clamping.)

1. The USB Type-C/PD communication interface circuit is characterized by comprising a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a first NMOS (N-channel metal oxide semiconductor) tube, a first current source, a second current source and a charge pump; the source electrode of the first PMOS tube is connected with one end of a first current source, the grid electrode of the first PMOS tube is connected with a CC1 enabling signal, and the other end of the first current source is connected with a power supply VDD; the source of the second PMOS tube is connected with a power supply VDD, and the gate of the second PMOS tube is connected with a VCONN enabling signal of the CC 1; the source electrode of the first NMOS tube is connected with the drain electrodes of the first PMOS tube and the second PMOS tube, the grid electrode of the first NMOS tube is connected with the output end of the charge pump, and the drain electrode of the first NMOS tube is connected with the CC1 chip interface; the source electrode of the third PMOS tube is connected with one end of a second current source, the grid electrode of the third PMOS tube is connected with a CC2 enabling signal, and the other end of the second current source is connected with a power supply VDD; the source of the fourth PMOS tube is connected with a power supply VDD, and the gate of the fourth PMOS tube is connected with a VCONN enable signal of the CC 2; the source electrode of the second NMOS tube is connected with the drain electrodes of the third PMOS tube and the fourth PMOS tube, the grid electrode of the second NMOS tube is connected with the output end of the charge pump, and the drain electrode of the second NMOS tube is connected with the CC2 chip interface; the input terminal of the charge pump is the chip voltage.

2. The method for controlling the USB Type-C/PD communication interface circuit according to claim 1, wherein a connection point of a drain of the first PMOS transistor and a drain of the second PMOS transistor is defined as a node A, and a connection point of a drain of the third PMOS transistor and a drain of the fourth PMOS transistor is defined as a node B; the MOS tube is controlled to be turned on or turned off according to the following preset mode, so that VCONN function output is supported on the premise of supporting Type-C handshake:

outputting a first current source current or a second current source current to a node A or a node B by controlling a CC1 enable signal or a CC2 enable signal, then outputting voltage by a charge pump circuit to open a first NMOS tube or a second NMOS tube, and outputting the first current source current or the second current source current to a CC1 chip interface or a CC2 chip interface;

by controlling the VCONN enable signal of the CC1 or the VCONN enable signal of the CC2, the node a or the node B is pulled up to the power VDD through the third PMOS transistor or the fourth PMOS transistor, so that the voltage VDD is shorted to the CC1 chip interface or the CC2 chip interface, and the VCONN function output is realized.

Technical Field

The invention belongs to the technical field of electronic circuits, and particularly relates to a USB Type-C/PD communication interface circuit and a control method thereof.

Background

In the fast charging of the integrated circuit USB PD (Power Delivery), the charging with large current is urgent with the urgent need for fast charging. The large-current charging needs a special charging cable with an E-maker chip, so that the Type-C/PD interface circuit needs to support a VCONN function so as to meet the power supply requirement of the E-maker chip; meanwhile, due to the improvement of the PD charging voltage, the charging voltage can support the high voltage of 20V, and the VBUS and the interface circuit are easily short-circuited in the actual charging process, so that the interface circuit is damaged. Therefore, the interface circuit must support high voltage applications without being able to break down.

In order to prevent the internal circuit from being damaged due to the short circuit of the CC1 and the CC2 to VBUS, a high voltage isolation tube is generally added at the port, and the gate voltage is driven by the power voltage.

Disclosure of Invention

In view of the above problems, the present invention provides an interface circuit and a control method thereof, which support VCONN function output and can protect internal circuits from being damaged when the CC1/CC2 is shorted to VBUS high voltage on the premise of supporting Type-C handshake.

The technical scheme of the invention is as follows:

an interface circuit for USB Type-C/PD communication, as shown in fig. 1, includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a first current source, a second current source, and a charge pump; the source electrode of the first PMOS tube is connected with one end of a first current source, the grid electrode of the first PMOS tube is connected with a CC1 enabling signal, and the other end of the first current source is connected with a power supply VDD; the source of the second PMOS tube is connected with a power supply VDD, and the gate of the second PMOS tube is connected with a VCONN enabling signal of the CC 1; the source electrode of the first NMOS tube is connected with the drain electrodes of the first PMOS tube and the second PMOS tube, the grid electrode of the first NMOS tube is connected with the output end of the charge pump, and the drain electrode of the first NMOS tube is connected with the CC1 chip interface; the source electrode of the third PMOS tube is connected with one end of a second current source, the grid electrode of the third PMOS tube is connected with a CC2 enabling signal, and the other end of the second current source is connected with a power supply VDD; the source of the fourth PMOS tube is connected with a power supply VDD, and the gate of the fourth PMOS tube is connected with a VCONN enable signal of the CC 2; the source electrode of the second NMOS tube is connected with the drain electrodes of the third PMOS tube and the fourth PMOS tube, the grid electrode of the second NMOS tube is connected with the output end of the charge pump, and the drain electrode of the second NMOS tube is connected with the CC2 chip interface; the input terminal of the charge pump is the chip voltage.

The control method of the interface circuit of the USB Type-C/PD communication comprises the following steps: defining the connection point of the drain electrode of the first PMOS tube and the drain electrode of the second PMOS tube as a node A, and defining the connection point of the drain electrode of the third PMOS tube and the drain electrode of the fourth PMOS tube as a node B; the MOS tube is controlled to be turned on or turned off according to the following preset mode, so that VCONN function output is supported on the premise of supporting Type-C handshake:

outputting a first current source current or a second current source current to a node A or a node B by controlling a CC1 enable signal or a CC2 enable signal, then outputting voltage by a charge pump circuit to open a first NMOS tube or a second NMOS tube, and outputting the first current source current or the second current source current to a CC1 chip interface or a CC2 chip interface;

by controlling the VCONN enable signal of the CC1 or the VCONN enable signal of the CC2, the node a or the node B is pulled up to the power VDD through the third PMOS transistor or the fourth PMOS transistor, so that the voltage VDD is shorted to the CC1 chip interface or the CC2 chip interface, and the VCONN function output is realized.

The invention has the beneficial effects that: the circuit structure of the invention is very simple, can simultaneously support the Type-C handshake function and the VCONN output function, and simultaneously realizes the high-voltage short-circuit protection function of the port by utilizing the simple gate terminal clamping.

Drawings

Fig. 1 is a schematic circuit diagram of the present invention.

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings.

As shown in fig. 1, the circuit of the present invention is composed of high voltage NMOS M0, M3, low voltage PMOS M1, M2, M4, M5, current sources I _ SRC _ CC1, I _ SRC _ CC2, and a Charge-Pump circuit. CC1_ PAD and CC2_ PAD are chip interfaces and are respectively connected with drain terminals of M0 and M3, a source terminal of M0 is connected with drain terminals of M1 and M2 to form a node A, and a source terminal of M3 is connected with drain terminals of M4 and M5 to form a node B. The gate terminals of M0 and M3 are driven by a Charge Pump output V _ CPOUT, the input of the Charge Pump is V _ CPIN, V _ CPOUT is 2 × V _ CPIN, and the voltage of V _ CPIN can be determined according to the withstand voltages at points a and B. The source terminals of the M1 and M4 transistors are connected to a power supply VDD, and the gate terminals are respectively connected to CC1_ VCONN _ EN and CC2_ VCONN _ EN. The positive terminals of current sources I _ SRC _ CC1 and I _ SRC _ CC2 are both connected to VDD, the negative terminal of I _ SRC _ CC1 is connected to the source terminal of M2, the negative terminal of I _ SRC _ CC2 is connected to the source terminal of M5, and the gate terminals of M2 and M5 are respectively connected to CC1_ SRC _ EN and CC2_ SRC _ EN.

By controlling CC1_ SRC _ EN or CC2_ SRC _ EN, I _ SRC _ CC1 or I _ SRC _ CC2 is output to node A or B, then the Charge _ pump circuit outputs V _ CPOUT voltage, a high-voltage isolation tube is opened, and therefore I _ SRC _ CC1 or I _ SRC _ CC2 is output to CC1_ PAD or CC2_ PAD, the purpose of pulling up is achieved, and the Type-C handshaking process is achieved. Meanwhile, by controlling CC1_ VCONN _ EN or CC2_ VCONN _ EN, node a or B is pulled up to VDD through PMOS M1 or M4, so as to short VDD to CC1_ PAD or CC2_ PAD, thereby realizing VCONN function output. When either CC1 or CC2 is shorted to VBUS high voltage, the highest voltage seen by the internal node A and B voltages is V _ VPOUT-VTH _ M0/M3, protecting the internal nodes from over-voltage damage.