阅读说明：本技术 一种基于fpga的多路模拟信号同步采样电路系统 (Multi-channel analog signal synchronous sampling circuit system based on FPGA ) 是由 苏健 刘丽丽 张夜星 温春玉 冯雪健 陈敏 张利辉 于 2020-12-09 设计创作，主要内容包括：一种基于FPGA的多路模拟信号同步采样电路系统,由多块32通道信号采集子卡、1块同步信号采集卡和ATM网络模块组成,同步信号采集卡通过RS422总线向多块32通道信号采集子卡发送时钟同步信号,同步信号采集卡和32通道信号采集子卡通过高速串行口RapidIO进行数据交换,整个系统可以通过ATM网络模块与外部系统进行数据传输。本发明,每块32通道信号采集子卡,可以同步采集1～32路前端传感器模拟信号,8块32通道信号采集子卡,在同步信号采集卡的控制下可以实现系统整体共256路前端传感器模拟信号同步采样。本发明使用FPGA为核心,功能模块化设计,灵活性组合,采样精度为16位,能够在声纳、机械振动分析、发动机测试等场合实现工程应用。(A multi-channel analog signal synchronous sampling circuit system based on an FPGA (field programmable gate array) is composed of a plurality of 32-channel signal acquisition sub-cards, 1 synchronous signal acquisition card and an ATM (automatic Teller machine) network module, wherein the synchronous signal acquisition card sends clock synchronous signals to the plurality of 32-channel signal acquisition sub-cards through an RS422 bus, the synchronous signal acquisition card and the 32-channel signal acquisition sub-cards exchange data through a high-speed serial port RapidIO, and the whole system can transmit data with an external system through the ATM network module. According to the invention, each 32-channel signal acquisition daughter card can synchronously acquire 1-32 paths of front-end sensor analog signals, and 8 32-channel signal acquisition daughter cards can realize synchronous sampling of 256 paths of front-end sensor analog signals of the whole system under the control of a synchronous signal acquisition card. The invention uses FPGA as the core, has modular design of functions, flexible combination and 16-bit sampling precision, and can realize engineering application in occasions such as sonar, mechanical vibration analysis, engine test and the like.)

1. The utility model provides a multichannel analog signal synchronous sampling circuit system based on FPGA which characterized in that: the system comprises a plurality of 32-channel signal acquisition daughter cards, a synchronous signal acquisition card and an ATM network module; the synchronous signal acquisition card sends clock synchronous signals to the 32-channel signal acquisition sub-cards through the RS422 bus, the synchronous signal acquisition card and the 32-channel signal acquisition sub-cards perform data exchange through the high-speed serial port RapidIO, the whole system realizes synchronous sampling of 256 paths of analog signals, and data transmission is performed with an external system through the ATM network module.

2. The FPGA-based multi-channel analog signal synchronous sampling circuit system of claim 1, wherein: the 32-channel signal acquisition daughter card comprises a 32-channel signal conditioning module, an analog-to-digital conversion (AD) module, a Field Programmable Gate Array (FPGA) module, an Automatic Teller Machine (ATM) network module, a RS422 synchronous clock module, a high-speed serial port rapid IO module, a system clock and a system power supply;

the 32-channel sensor signal realizes single-end signal to differential signal conversion through the 32-channel signal conditioning module, the analog-to-digital conversion AD module realizes conversion from an analog signal to a digital signal, the RS422 synchronous clock module realizes synchronization with other acquisition daughter cards, the high-speed serial port RapidIO module realizes data exchange with the synchronous signal acquisition card, the ATM network module realizes communication with an ATM network, an ATM physical chip in the ATM network module converts parallel data into ATM network signals, and a network transformer in the ATM network module plays roles of signal isolation, impedance matching and driving capacity enhancement; the FPGA module realizes the receiving, packaging and forwarding of sampling data, is responsible for controlling the synchronization of the 32-channel analog-to-digital conversion circuit, realizes the synchronization with other 32-channel signal acquisition daughter cards by controlling the RS422 synchronous clock module, realizes the data exchange with the synchronous signal acquisition card by controlling the high-speed serial RapidIO module, and realizes the communication with the ATM network by controlling the ATM network module; the system clock provides a working reference clock for the 32-channel signal acquisition daughter card, the system power supply is divided into an analog power supply and a digital power supply, the analog power supply supplies power for the signal conditioning circuit, and the digital power supply supplies power for the digital circuit part.

3. The FPGA-based multi-channel analog signal synchronous sampling circuit system of claim 1, wherein: the synchronous signal acquisition card comprises an FPGA module, an ATM network module, an RS422 synchronous clock module, an 8-path high-speed serial port RapidIO module, a system clock and a system power supply module;

the RS422 synchronous clock module sends synchronous clock signals to each 32-channel signal acquisition daughter card through an RS422 bus, the 8-path high-speed serial port RapidIO module realizes data exchange with each 32-channel signal acquisition daughter card, the ATM network module realizes communication with an ATM network, an ATM physical chip in the ATM network module converts parallel data into ATM network signals, and a network transformer in the ATM network module plays roles in signal isolation, impedance matching and driving capacity enhancement; the FPGA module realizes synchronization with each 32-channel signal acquisition sub-card by controlling the RS422 synchronous clock module, realizes data exchange with each 32-channel signal acquisition sub-card by controlling the high-speed serial RapidIO module, and realizes communication with an ATM network by controlling the ATM network module; the system clock provides a working reference clock for the synchronous signal acquisition card, and the system power supply is a digital power supply and supplies power for the digital circuit part.

4. The FPGA-based multi-channel analog signal synchronous sampling circuit system of claim 1, wherein: the ATM network module comprises an ATM network module of a 32-channel signal acquisition sub-card and an ATM network module of a synchronous signal acquisition card, and is composed of an ATM network bridge FPGA, an ATM physical chip and a network transformer, the ATM network modules of the two cards work independently, and a circuit system is communicated with an external system through the ATM network module of one card.

5. The FPGA-based multi-channel analog signal synchronous sampling circuit system of claim 1, wherein: under the condition that no synchronous signal acquisition card exists, two 32-channel signal acquisition sub-cards are interconnected through a high-speed serial port RapidIO, one 32-channel signal acquisition sub-card serves as a master card, the other 32-channel signal acquisition sub-card serves as a slave card, the master card sends a synchronous clock signal to the slave card, and the ATM network module performs cascade networking to realize communication with an external system.

6. The FPGA-based multi-channel analog signal synchronous sampling circuit system of claim 1, wherein: the number of the 32-channel signal acquisition daughter cards is 8.

Technical Field

The invention relates to a multi-channel analog signal sampling circuit system, in particular to a multi-channel analog signal synchronous sampling circuit system based on an FPGA (field programmable gate array), which can be applied to occasions such as sonar, mechanical vibration analysis, engine test and the like.

Background

A multi-channel analog synchronous sampling circuit is a multi-channel high-synchronization data acquisition system, and has the key of synchronism and real-time performance in that the parallel processing capability and the high-speed RapidIO communication capability of an FPGA are adopted, but the existing multi-channel analog sampling circuit is based on a single chip microcomputer and the like, and different analog channels are switched and scanned by adopting analog switches, so that the synchronism and the real-time performance of sampling signals are difficult to guarantee, and the system is only suitable for systems with low requirements on data bandwidth and processing capability.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: the system overcomes the defects of the prior art, provides a multi-channel analog signal synchronous sampling circuit system based on an FPGA, utilizes the parallel processing capacity of the FPGA to enable 1 32-channel signal acquisition daughter card to realize real-time synchronous sampling of 32 channels of analog signals, and utilizes the high-speed RapidIO communication capacity and a synchronous clock module to enable a synchronous signal acquisition card to coordinate and manage 8 32-channel signal acquisition daughter cards to realize real-time synchronous sampling of up to 256 channels of analog signals.

The technical solution of the invention is as follows: a multi-channel analog signal synchronous sampling circuit system based on FPGA comprises a plurality of 32-channel signal acquisition daughter cards, a synchronous signal acquisition card and an ATM network module; the synchronous signal acquisition card sends clock synchronous signals to the 32-channel signal acquisition sub-cards through the RS422 bus, the synchronous signal acquisition card and the 32-channel signal acquisition sub-cards perform data exchange through the high-speed serial port RapidIO, the whole system realizes synchronous sampling of 256 paths of analog signals, and data transmission is performed with an external system through the ATM network module.

The 32-channel signal acquisition daughter card comprises a 32-channel signal conditioning module, an analog-to-digital conversion (AD) module, a Field Programmable Gate Array (FPGA) module, an Automatic Teller Machine (ATM) network module, a RS422 synchronous clock module, a high-speed serial port rapid IO module, a system clock and a system power supply;

the 32-channel sensor signal realizes single-end signal to differential signal conversion through the 32-channel signal conditioning module, the analog-to-digital conversion AD module realizes conversion from an analog signal to a digital signal, the RS422 synchronous clock module realizes synchronization with other acquisition daughter cards, the high-speed serial port RapidIO module realizes data exchange with the synchronous signal acquisition card, the ATM network module realizes communication with an ATM network, an ATM physical chip in the ATM network module converts parallel data into ATM network signals, and a network transformer in the ATM network module plays roles of signal isolation, impedance matching and driving capacity enhancement; the FPGA module realizes the receiving, packaging and forwarding of sampling data, is responsible for controlling the synchronization of the 32-channel analog-to-digital conversion circuit, realizes the synchronization with other 32-channel signal acquisition daughter cards by controlling the RS422 synchronous clock module, realizes the data exchange with the synchronous signal acquisition card by controlling the high-speed serial RapidIO module, and realizes the communication with the ATM network by controlling the ATM network module; the system clock provides a working reference clock for the 32-channel signal acquisition daughter card, the system power supply is divided into an analog power supply and a digital power supply, the analog power supply supplies power for the signal conditioning circuit, and the digital power supply supplies power for the digital circuit part.

The synchronous signal acquisition card comprises an FPGA module, an ATM network module, an RS422 synchronous clock module, an 8-path high-speed serial port RapidIO module, a system clock and a system power supply module;

the RS422 synchronous clock module sends synchronous clock signals to each 32-channel signal acquisition daughter card through an RS422 bus, the 8-path high-speed serial port RapidIO module realizes data exchange with each 32-channel signal acquisition daughter card, the ATM network module realizes communication with an ATM network, an ATM physical chip in the ATM network module converts parallel data into ATM network signals, and a network transformer in the ATM network module plays roles in signal isolation, impedance matching and driving capacity enhancement; the FPGA module realizes synchronization with each 32-channel signal acquisition sub-card by controlling the RS422 synchronous clock module, realizes data exchange with each 32-channel signal acquisition sub-card by controlling the high-speed serial RapidIO module, and realizes communication with an ATM network by controlling the ATM network module; the system clock provides a working reference clock for the synchronous signal acquisition card, and the system power supply is a digital power supply and supplies power for the digital circuit part.

The ATM network module comprises an ATM network module of a 32-channel signal acquisition sub-card and an ATM network module of a synchronous signal acquisition card, and is composed of an ATM network bridge FPGA, an ATM physical chip and a network transformer, the ATM network modules of the two cards work independently, and a circuit system is communicated with an external system through the ATM network module of one card.

Under the condition that no synchronous signal acquisition card exists, two 32-channel signal acquisition sub-cards are interconnected through a high-speed serial port RapidIO, one 32-channel signal acquisition sub-card serves as a master card, the other 32-channel signal acquisition sub-card serves as a slave card, the master card sends a synchronous clock signal to the slave card, and the ATM network module performs cascade networking to realize communication with an external system.

Compared with the prior art, the invention has the following beneficial effects:

(1) the invention utilizes FPGA to process parallel data and utilizes high-speed serial RapidIO to exchange data between boards, thus improving the real-time property of multi-path analog signal acquisition compared with the analog signal acquisition system developed by the traditional singlechip.

(2) The 32-channel signal acquisition sub-card can work independently, the signal conditioning part realizes the conversion from a single-ended signal to a differential signal, and the analog-to-digital conversion part realizes the conversion from an analog signal to a digital signal.

(3) And the clock synchronization module of the synchronization signal acquisition card sends a clock synchronization signal to the 32-channel signal acquisition daughter card, so that the synchronous sampling of multiple paths of analog signals of the whole circuit system is realized.

(4) Through the ATM network module, the ATM physical chip converts parallel data into ATM network signals, and the network transformer realizes signal isolation, impedance matching, driving capacity enhancement and the like, and realizes safe communication with an external system.

(5) By adopting the modular design, under the condition of no synchronous signal acquisition card, the two 32-channel signal acquisition daughter cards can form a master-slave mode, so that synchronous sampling of analog signals within 64 channels is realized, and the requirement of engineering use in occasions with fewer channels is met.

Drawings

FIG. 1 is a block diagram of a multi-channel analog signal synchronous sampling circuit system based on FPGA according to the present invention;

FIG. 2 is a block diagram of the 32-channel signal acquisition daughter card of the present invention;

FIG. 3 is a block diagram of the structure of the synchronous signal acquisition card of the present invention.

Detailed Description

As shown in fig. 1, the 32-channel signal acquisition daughter card, the synchronous signal acquisition card and the ATM network module of the present invention, which are the basic forms of the present invention, together form a multi-channel analog signal synchronous sampling circuit based on FPGA. The 1-32 paths of sensor signals are connected to each 32-channel signal acquisition daughter card, processed by the 32-channel signal acquisition daughter card and sent to the synchronous signal acquisition card through the high-speed serial RapidIO. The synchronous signal acquisition card simultaneously sends clock synchronous signals to each 32-channel signal acquisition daughter card through the RS422 bus, and synchronous sampling of 256 paths of analog signals is achieved. The ATM network modules of the 8 32-channel signal acquisition daughter cards can form an ATM network 1 through cascade connection and can be independently connected with an external system in a communication mode. The ATM network 2 of the synchronous signal acquisition card can be independently connected with an external system in a communication way, so that the whole circuit system can be connected with the external system.

As shown in fig. 2, the 32-channel signal acquisition daughter card mainly includes 32 signal conditioning circuit analog-to-digital conversion circuits, an FPGA core circuit, a synchronous clock circuit, a high-speed serial RapidIO circuit, an ATM network circuit module, a system clock circuit, and a system power circuit. The 32-channel sensor signal realizes the conversion from a single-end signal to a differential signal through the signal conditioning circuit, the analog-to-digital conversion part realizes the conversion from an analog signal to a digital signal, the synchronous clock circuit realizes the synchronization with other acquisition daughter cards, the high-speed serial RapidIO circuit realizes the data exchange with the synchronous signal acquisition card, the ATM network circuit module realizes the communication with the ATM network, the ATM physical chip converts the parallel data into the ATM network signal, and the network transformer mainly plays the roles of signal isolation, impedance matching, driving capability enhancement and the like. The FPGA core circuit is used for receiving, packaging and forwarding the sampled data, controlling the 32-path analog-to-digital conversion circuit to be synchronous, controlling the synchronous clock circuit to be synchronous with other acquisition daughter cards, controlling the high-speed serial RapidIO circuit to exchange data with the synchronous signal acquisition card, and controlling the ATM network circuit module to realize communication with the ATM network. The system clock circuit provides a working reference clock for the acquisition daughter card, the system power supply is divided into an analog power supply and a digital power supply, the analog power supply supplies power to the signal conditioning circuit, and the digital power supply supplies power to the digital circuit part.

As shown in fig. 3, the synchronous signal acquisition card mainly comprises an FPGA core circuit, a synchronous clock circuit, a high-speed serial RapidIO circuit, an ATM network circuit module, a system clock circuit, and a system power circuit. The synchronous clock circuit sends synchronous clock signals to each 32-channel signal acquisition sub-card through the RS422 bus, the high-speed serial RapidIO circuit realizes data exchange with each 32-channel signal acquisition sub-card, the ATM network circuit module realizes communication with an ATM network, the ATM physical chip converts parallel data into ATM network signals, and the network transformer mainly plays a role in signal isolation, impedance matching, driving capacity enhancement and the like. The FPGA core circuit realizes synchronization with each 32-channel signal acquisition sub-card by controlling a synchronous clock circuit, realizes data exchange with each 32-channel signal acquisition sub-card by controlling a high-speed serial RapidIO circuit, and realizes communication with an ATM network by controlling an ATM network circuit module. The system clock circuit provides a working reference clock for the synchronous signal acquisition card, and the system power supply is mainly a digital power supply and supplies power for the digital circuit part.

The main technical indexes of the FPGA-based multi-channel analog synchronous sampling circuit system are shown in Table 1.

TABLE 1

Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.