阅读说明：本技术 等离子处理装置 (Plasma processing apparatus ) 是由 森功 伊泽胜 安井尚辉 池田纪彦 山田一也 于 2019-08-05 设计创作，主要内容包括：等离子处理装置具备：对试样进行等离子处理的处理室；供给用于生成等离子的高频电力的第一高频电源；载置所述试样的试样台；以及向所述试样台供给高频电力的第二高频电源,等离子处理装置还具备：直流电源,其将直流电压施加给所述试样台,所述直流电压通过周期性重复的波形而变化,一个周期的所述波形具有在给定时间变化给定量以上的振幅的期间。由此,能够除去晶片表面的带电粒子而得到垂直性高的沟道形状,此外能够降低沟道内部的并非蚀刻对象的膜的损坏。(The plasma processing apparatus includes: a processing chamber for performing plasma processing on the sample; a first high-frequency power supply for supplying high-frequency power for generating plasma; a sample stage on which the sample is placed; and a second high-frequency power supply for supplying high-frequency power to the sample stage, the plasma processing apparatus further comprising: and a dc power supply that applies a dc voltage to the sample stage, wherein the dc voltage is changed by a periodically repeating waveform, and the waveform of one cycle has a period during which the waveform changes by a predetermined amount or more at a predetermined time. This can remove charged particles on the wafer surface to obtain a channel shape having high perpendicularity, and can reduce damage to a film not to be etched in the channel.)

1. A plasma processing apparatus includes: a processing chamber for performing plasma processing on the sample; a first high-frequency power supply for supplying high-frequency power for generating plasma; a sample stage on which the sample is placed; and a second high-frequency power supply for supplying high-frequency power to the sample stage, the plasma processing apparatus further comprising:

a DC power supply for applying a DC voltage to the sample stage, the DC voltage being varied by a periodically repeating waveform,

the waveform of one cycle has a period during which the amplitude changes by more than a given amount at a given time.

2. The plasma processing apparatus according to claim 1,

the change time and the change amount of the amplitude are such that 10% or more of the maximum value of the current generated in the sample by the waveform continues for an amplitude of 1ms or more.

3. The plasma processing apparatus according to claim 1,

the waveform is a triangular wave.

4. The plasma processing apparatus according to claim 1,

the sample stage includes: an electrode for causing the sample to be electrostatically adsorbed,

the direct current voltage is applied to the electrode.

5. The plasma processing apparatus according to claim 1,

when the dc voltage is applied to the sample stage, the high-frequency power supplied to the sample stage is supplied to the sample stage.

6. The plasma processing apparatus according to claim 1,

the frequency of the waveform is 500Hz or less.

7. The plasma processing apparatus according to claim 1,

the waveform is a rectangular wave having a rectangular shape,

the time constants of the rise and fall of the rectangular wave are 0.43ms or more, respectively.

8. The plasma processing apparatus according to claim 3 or 7,

the ratio of the time during which the DC voltage rises relative to the time during which the DC voltage falls is a value obtained by dividing a value D obtained by subtracting the value D from 1,

the value D is a value obtained by dividing the mobility of ions in the dielectric medium on the sample by the sum of the mobility of electrons in the dielectric medium and the mobility of the ions in the dielectric medium.

9. The plasma processing apparatus according to claim 8,

the frequency of the waveform is a value obtained by subtracting the value D from 1 or a small value of the value D by 1000 times in Hz.

Technical Field

The present invention relates to a plasma processing apparatus.

Background

In a manufacturing process of a semiconductor device, measures for miniaturization and integration of modules included in a semiconductor device are required. For example, in integrated circuits and nano-electromechanical systems, the construction is further scaled to the nanometer scale.

In general, in a manufacturing process of a semiconductor device, a photolithography technique is used to form a fine pattern. This technique is a technique of applying a pattern of a device structure to a resist layer and selectively etching and removing a substrate exposed through the pattern of the resist layer. In the subsequent process steps, if another material is deposited in the etched region, an integrated circuit can be formed.

Therefore, in the manufacture of semiconductor devices, a plasma etching processing apparatus is indispensable. In the plasma etching process, a gas supplied into a processing chamber reduced in pressure to a predetermined degree of vacuum is plasmatized by an electric field or the like formed inside a vacuum chamber. At this time, the highly reactive ions or radicals generated in the plasma physically and chemically react with the surface of the wafer, which is the object to be processed, to perform etching.

In the plasma etching process, a high frequency voltage is widely applied to a stage of a wafer. When a high-frequency voltage is applied to the stage connected to a high-frequency power supply via a capacitor, a sheath (sheath) generated between the plasma and the stage has a rectifying action, and therefore, the stage becomes a negative voltage when time-averaged by the self-bias. Therefore, positive ions are accelerated, etching proceeds rapidly, and anisotropic etching for increasing the verticality can be achieved. Further, by adjusting the amplitude of the high-frequency voltage applied to the mounting table, the etching rate and the verticality can be controlled.

Generally, a sine wave is used as the high-frequency voltage applied to the stage of the wafer, but as disclosed in patent document 1, a rectangular wave may be used instead of the sine wave. The energy of the ions flowing from the plasma into the stage is determined by an electric field applied between the plasma and the stage. When a sine wave high frequency voltage is applied, the electric field changes gradually, and ions of various energies flow into the mounting table. However, when a high-frequency voltage of a rectangular wave is applied, the ion energy is clearly divided into energy and low energy, and therefore, the etching control becomes easy.

Prior art documents

Patent document

Patent document 1: japanese patent laid-open No. 2012 and 216608

Disclosure of Invention

Problems to be solved by the invention

In the plasma etching process, the dielectric material formed on the wafer is charged by collision of charged particles. In the plasma etching process, a Trench shape is often formed on the wafer as shown in fig. 1, and in this case, it is generally desirable that the sidewall of the Trench (Trench) is perpendicular to the wafer surface. However, when a high-frequency voltage is applied to the channel structure, the side wall of the channel (Trench) may be charged as shown in fig. 1. This is because positive ions are vertically incident into the channel (Trench) by the negative self-bias based on the high frequency voltage, and the direction of electrons or negative ions is random in comparison, so that more negatively charged particles collide with the side wall. As a result, as shown in fig. 1, the Ion (Ion) orbitals flying into the Trench (Trench) are bent and collide with the side wall, and the side wall is etched, thereby deteriorating the verticality of the Trench (Trench) side wall.

In addition, a metal layer that should not be etched is also present in a portion within the trench for the convenience of the process. For example, when such a metal layer is present, the trajectories of ions are bent, and the ions are incident obliquely to the metal layer. Therefore, the metal layer is more likely to be sputtered than in the case where ions are incident perpendicularly, and hence damage to the metal layer increases, and desired etching may not be performed. As described above, the removal of charged particles from the wafer surface is a problem in performing etching with high precision.

In order to remove the charged particles from the wafer surface, one countermeasure is: a voltage having a polarity opposite to that of the charged particles is applied to the wafer, and an electric field is formed inside the dielectric material formed on the wafer, thereby generating a continuous current by the charged particles. However, it is known that the moving speed of the charged particles inside the dielectric material is small, and thus it takes time in the order of milliseconds to remove the charged particles from the dielectric material. On the other hand, the high-frequency voltage disclosed in patent document 1 generally uses a frequency of several hundreds kHz to several MHz so as to be able to pass through a capacitor located between the stage and the high-frequency power supply. Therefore, the technique of patent document 1 is not suitable for removal of charged particles.

The purpose of the present invention is to provide a plasma processing apparatus that can remove charged particles from the surface of a wafer, thereby obtaining a highly vertical channel shape and reducing damage to a film that is not the target of etching in the channel.

Means for solving the problem

In order to solve the above problem, one of the plasma processing apparatuses according to the present invention is typically configured as follows. The plasma processing apparatus includes: a processing chamber for performing plasma processing on the sample; a first high-frequency power supply for supplying high-frequency power for generating plasma; a sample stage on which the sample is placed; and a second high-frequency power supply for supplying high-frequency power to the sample stage, the plasma processing apparatus further comprising: and a dc power supply that applies a dc voltage to the sample stage, wherein the dc voltage is changed by a periodically repeating waveform, and the waveform of one cycle has a period during which the waveform changes by a predetermined amount or more at a predetermined time.

Effect of invention

According to the present invention, it is possible to provide a plasma processing apparatus capable of obtaining a channel shape having high verticality and reducing damage to a film not to be etched in the channel by removing charged particles on the surface of a wafer.

Problems, structures, and effects other than those described above will become apparent from the following description of the embodiments.

Drawings

Fig. 1 is a schematic view showing a channel shape in a plasma etching process and an ion trajectory when a sidewall thereof is charged.

Fig. 2 is a schematic diagram showing an example of a schematic configuration of the plasma processing apparatus according to the present embodiment.

Fig. 3 is a cross-sectional view schematically showing a part of the plasma processing apparatus according to the embodiment shown in fig. 1, and a schematic view of a bias voltage generating unit connected to the mounting table.

Fig. 4 is a diagram showing an equivalent circuit of the plasma processing apparatus.

Fig. 5 is a diagram showing voltage waveforms of the dc power supply output according to the embodiment shown in fig. 4.

Fig. 6 is a diagram showing a waveform of a current calculated by a circuit simulator based on the equivalent circuit of fig. 4, and is a diagram schematically showing a current generated on a wafer by the voltage of fig. 5.

Fig. 7 is a diagram showing a voltage waveform of the deformed linear triangular wave.

Fig. 8 is a diagram showing a voltage waveform according to a curve triangle.

Fig. 9 is a diagram showing a waveform of a current flowing from the wafer.

Fig. 10 is a diagram showing a relationship between output start and end times of the microwave power supply, the high-frequency power supply, and the dc power supply.

Fig. 11 is a sectional view schematically showing a part of the plasma processing apparatus according to variation 1 of the embodiment shown in fig. 1, and a schematic view of a bias voltage generating unit connected to the stage.

Fig. 12 is a sectional view schematically showing a part of the plasma processing apparatus according to variation 2 of the embodiment shown in fig. 1, and a schematic view of a bias voltage generating unit connected to the stage.

Fig. 13 is a sectional view schematically showing a part of the plasma processing apparatus according to variation 3 of the embodiment shown in fig. 1, and a schematic view of a bias voltage generating unit connected to the stage.

Fig. 14 is a diagram showing a voltage waveform output by the electrostatic adsorption power supply in modification 3 of the embodiment shown in fig. 1.

Fig. 15 is a sectional view schematically showing a part of the plasma processing apparatus according to variation 4 of the embodiment shown in fig. 1, and a schematic view of a bias voltage generating unit connected to the stage.

Fig. 16 is a diagram showing a voltage waveform output by the bias voltage generator in modification 4 of the embodiment shown in fig. 1.

Fig. 17 is a sectional view schematically showing a part of the plasma processing apparatus according to variation 5 of the embodiment shown in fig. 1, and a schematic diagram of a bias voltage generating unit connected to the stage.

Fig. 18 is a diagram showing a voltage waveform output by the electrostatic adsorption power supply in modification 5 of the embodiment shown in fig. 1.

Detailed Description

Hereinafter, embodiments of a plasma processing apparatus according to the present invention will be described with reference to the drawings. In the present specification, the term "linear triangular wave" of the voltage waveform refers to a waveform in which the voltage periodically and repeatedly rises linearly from the minimum voltage to the maximum voltage and then falls linearly to the minimum voltage immediately after reaching the maximum voltage; the "curved triangular wave" of the voltage waveform refers to a waveform in which the voltage periodically repeats rising from the minimum voltage to the maximum voltage along a curve in which the positive differential coefficient monotonically decreases, and immediately after reaching the maximum voltage, falling to the minimum voltage along a curve in which the negative differential coefficient monotonically increases.

[ embodiment 1]

The present embodiment will be described with reference to fig. 2 to 10. Fig. 2 is a schematic diagram showing an example of a schematic configuration of the plasma processing apparatus according to the present embodiment.

The plasma processing apparatus 100 according to the present embodiment shown in fig. 2 is a microwave ECR plasma etching apparatus as an example. Here, electrodes disposed inside the vacuum processing chamber 104, a generator of an electric field and a magnetic field disposed outside the vacuum processing chamber 104, a power supply, and the like are schematically illustrated.

The plasma processing apparatus 100 includes a vacuum processing chamber 104. An electrode 125 as a sample stage is disposed inside the vacuum processing chamber 104, and a wafer 126 as a sample is placed on the electrode 125. Inside the vacuum processing chamber 104, the electric field and the magnetic field formed by the electric field generating means and the magnetic field generating means disposed outside the vacuum processing chamber 104 act on the gas supplied from the gas supply mechanism 105 to the vacuum processing chamber 104, thereby generating the plasma 136. The plasma 136 contains ions and radicals that interact with the surface of the wafer 126 to perform a plasma etching process.

In the vacuum processing chamber 104, a shower plate 102 is disposed above the container 101, a dielectric window 103 is further disposed above the container, and the container 101 surrounding the vacuum processing chamber 104 is hermetically sealed by the dielectric window 103.

A gas supply mechanism 105 provided outside the vacuum processing chamber 104 is connected to a space 107 provided between the dielectric window 103 and the shower plate 102 via a gas pipe 106. The space 107 communicates with the vacuum processing chamber 104 through a plurality of fine holes 108 provided in the shower plate 102.

A variable conductance valve 112 is disposed in a lower portion of the vacuum processing chamber 104, and a gas in the vacuum processing chamber 104 is exhausted by a turbo molecular pump 113 connected through the variable conductance valve 112. The turbomolecular pump 113 is further connected to a roughing pump 114. The variable conductance valve 112, the turbomolecular pump 113, and the roughing pump 114 are connected to the control unit 150, and the operation is controlled by the control unit 150.

More specifically, a pressure gauge 115 for measuring the internal pressure of the vacuum processing chamber 104 is provided, and the control unit 150 performs feedback control of the opening degree of the variable conductance valve 112 based on the value of the pressure gauge 115 to control the pressure of the vacuum processing chamber 104 to a desired value.

A microwave power source 116 as a first high-frequency power source is provided in an upper portion of the plasma processing apparatus 100, and the frequency of the microwave power source 116 is, for example, 2.45 GHz. The microwaves generated from the microwave power supply 116 are transmitted to the cavity resonator 121 via the automatic matching unit 117, the square waveguide 118, the square-circular waveguide converter 119, and the circular waveguide 120. The automatic matching unit 117 has a function of automatically suppressing reflected waves, and the cavity resonator 121 has a function of adjusting the microwave electromagnetic field distribution to a distribution suitable for plasma processing. The microwave power supply 116 is controlled by the control unit 150.

A vacuum processing chamber 104 is provided below the cavity resonator 121 via a dielectric window 103 as a microwave introduction window and a shower plate 102. The microwave whose distribution is adjusted by the cavity resonator 121 is transmitted to the vacuum processing chamber 104 through the dielectric window 103 and the shower plate 102.

Electromagnetic coils 122, 123, and 124 constituting electromagnets are disposed around the vacuum processing chamber 104 and the hollow resonator 121. By passing a current through the electromagnetic coils 122, 123, 124 by the coil power supply 140 controlled by the control unit 150, a magnetic field is formed inside the vacuum processing chamber 104.

When the high-frequency electric field and the magnetic field are formed in the vacuum processing chamber 104 as described above, plasma by Electron Cyclotron Resonance (ECR), which will be described later, is formed in a region where the intensities of the electric field and the magnetic field have a specific relationship (for example, a region where the intensity of the magnetic field is 0.0875T in the case of an electric field of 2.45 GHz).

Hereinafter, ECR is described in detail. The electrons present in the vacuum processing chamber 104 move by the lorentz force while rotating along the magnetic lines of the magnetic field generated by the electromagnetic coils 122, 123, and 124. At this time, if the frequency of the microwave transmitted from the microwave power supply 116 matches the frequency of the rotation, electrons are accelerated by resonance, and plasma is generated efficiently. This is referred to as ECR.

The region where ECR occurs (ECR plane) can be controlled by the magnetic field distribution. Specifically, by controlling the current flowing through each of the electromagnetic coils 122, 123, 124 by the control section 150 via the coil power supply 140, the magnetic field distribution inside the vacuum processing chamber 104 can be controlled, and the plasma generation region inside the vacuum processing chamber 104 can be controlled. Further, since the diffusion of charged particles in the plasma is suppressed in the direction perpendicular to the magnetic field lines, the diffusion of the plasma can be controlled by controlling the magnetic field distribution, and the loss of the plasma can be reduced. These effects can control the plasma distribution above the wafer 126, and improve the uniformity of the plasma processing.

The electrode 125 is located below the ECR surface and fixed to the vacuum processing chamber 104 by a beam not shown. The electrode 125 and the vacuum processing chamber 104 are substantially cylindrical, and the central axes of the respective cylinders are the same. The plasma processing apparatus 100 includes a transfer device (not shown) such as a robot arm, and the wafer 126 as a processing object is transferred to the upper portion of the electrode 125 by the transfer device. The wafer 126 is held on the electrode 125 by electrostatic attraction by an electrostatic attraction electrode 135 formed inside the electrode 125.

A bias voltage generator 127 is connected to the electrode 125, and a bias voltage is applied to the wafer 126 via the bias voltage generator 127. The amount of ions within the plasma 136 that are introduced to the wafer 126 side depends on the bias voltage. Therefore, the control unit 150 controls the bias voltage generator 127 to adjust the bias voltage generated in the wafer 126, thereby controlling the plasma processing shape (distribution of the etching shape).

The temperature control mechanism 128 is mounted on the electrode 125, and the plasma processing shape can be controlled by controlling the temperature of the wafer 126 via the electrode 125.

All of the above configurations are connected to the control unit 150, i.e., a control computer, and the timing and the operation amount thereof are controlled so as to operate in an appropriate order. The detailed parameters of the operation sequence are called recipes, and control is performed according to a preset recipe.

The recipe is typically made up of multiple steps. The process conditions such as the type and flow rate of the gas to be supplied from the gas supply mechanism 105 to the vacuum processing chamber 104, the output power of the microwave power source 116, the amount of current flowing through the electromagnetic coils 122, 123, 124, and the bias voltage generated from the bias voltage generator 127 are not determined for each step, and the steps are executed in a predetermined order and time.

Fig. 3 is a schematic diagram showing a cross section of the electrode 125 and details of the bias voltage generator 127 according to the embodiment shown in fig. 2.

The electrode 125 includes a conductive base 129 and a dielectric film 130, and the bias voltage generator 127 is connected to the base 129. The electrode 125 has electrostatic attraction electrodes 135a and 135b between the wafer 126 and the substrate 129, and the electrostatic attraction electrodes 135a and 135b are insulated from the surroundings by the dielectric film 130.

The electrostatic chuck electrode 135a is disposed in a ring shape on the outer peripheral portion of the electrode, and the electrostatic chuck electrode 135b is disposed inside the electrostatic chuck electrode 135a, i.e., in the center portion of the electrode. The electrostatic attraction power source 139 includes power source units 139a and 139b, and the power source unit 139a is connected to the electrostatic attraction electrode 135a and the power source unit 139b is connected to the electrostatic attraction electrode 135b, respectively. The power supply units 139a and 139b output voltages independently of each other, and thereby generate a force for attracting the wafer 126 to the electrode 125.

The bias voltage generator 127 includes: a high-frequency power supply (second high-frequency power supply) 131, an automatic matching box 132, a dc power supply 133 that outputs a dc voltage that changes with a periodically repeating waveform, and a low-pass filter 134, wherein the high-frequency power supply 131 is connected to the base material 129 via the automatic matching box 132, and the dc power supply 133 is connected to the base material 129 via the low-pass filter 134, respectively. The high-frequency power supply 131 and the dc power supply 133 are connected to a control unit (control means) 150, respectively, and control operations are performed in accordance with signals from the control unit 150.

The output frequency of the high frequency power supply 131 is lower than the microwave power supply 116 and is high enough to deliver a bias voltage to the wafer 126 via the dielectric film 130. Specifically, as the output frequency of the high-frequency power supply 131, several hundred kHz to several MHz are used. The automatic matching unit 132 performs impedance matching by changing the circuit constant of the internal element according to the impedance of the plasma 136 so that the high frequency power supply 131 can efficiently transmit power to the wafer 126.

Fig. 4 shows an equivalent circuit of the plasma processing apparatus 100. The output from the bias voltage generator 127 is transmitted to the ground 137 'through a point 129' corresponding to the base 129, a capacitor 130 'corresponding to the dielectric film 130, a point 126' corresponding to the wafer 126, a parallel circuit 138a corresponding to the sheath between the wafer 126 and the plasma 136, a resistor 136 'corresponding to the plasma 136, and a parallel circuit 138b corresponding to the sheath between the plasma 136 and the ground 137' corresponding to the ground 137 in fig. 1. In this equivalent circuit, a relationship of I ═ a × dV/Dt is basically established between the voltage V generated by the bias voltage generating unit 127 and the current I flowing from the wafer 126 using the proportionality constant a.

Fig. 5 is a diagram showing a voltage waveform output from the dc power supply 133. The dc power supply 133 outputs a signal at a frequency f in accordance with a command from the control unit 150_tAmplitude V_tThe linear triangular wave 151. That is, the voltage waveform output by the dc power supply 133 has an amplitude period during which the waveform of one cycle changes by a predetermined amount or more at a predetermined time. Here, since the current I flowing from the wafer is proportional to the differential of the voltage of the bias voltage generator 127, a rectangular wave current, which is the differential of a linear triangular wave, flows from the wafer.

As in the conventional technique, in a rectangular wave in which the voltage rises and falls sharply, the continuation of the current I flowing from the wafer in proportion to the differential value of the voltage is instantaneously terminated. On the other hand, in the case of a straight triangular wave, the current I continues to flow while the voltage is rising or falling. The duration of the current I is at least 1ms in order to remove the charge from the wafer, and is preferably longer. Therefore, the charge removal effect on the wafer surface is improved when the linear triangular wave is used, as compared with the rectangular wave in which the duration of the current I is short. The same effect is obtained with respect to a curved triangular wave described later.

In particular, regarding the drop, if the drop is a sharp rectangular wave, the etching result is compared with a curved triangular wave described later, and in the case of the curved triangular wave, the damage of the metal layer which is not the etching target is reduced, and the duration of the current I at the time of the drop is important.

The result of calculating the current I using a circuit simulator based on the equivalent circuit of fig. 4 is a waveform 152 shown in fig. 6. In the simulation, let f_tCalculated at 50 Hz. From the simulation results, it was found that the current I was changed into a rectangular wave shape, and the polarity was alternately changed between positive and negativeOne side at 1/(2 xf) at each polarity_t) The flow continues for a period of 10 ms.

In order to move the charged particles accumulated in the dielectric on the wafer to the outside of the dielectric, a time of millisecond order is required, and when it is assumed that each of the positive and negative currents flowing from the wafer lasts only for less than 1ms, the attraction and return of the charged particles in the dielectric are repeated. Thus, f_tIt is necessary to set the frequency to substantially 500Hz or less. When this condition is satisfied, the positive and negative currents each continue for 1ms or longer, and therefore, effectively act on charged particle removal.

In addition, the case where the mobility of positive and negative charges within the wafer is different is also considered. The mobility μ is a value represented by μ ═ v/E where v is the average moving speed of the charged particles when the electric field E is applied.

Therefore, it is also possible to output a voltage varying in accordance with the modified linear triangular wave 153 shown in fig. 7 from the dc power supply 133 so as to reliably remove both charges regardless of mobility and to flow as much current as possible from the wafer. For this waveform, the ratio of the time for the voltage to rise from the minimum value to the maximum value to fall from the maximum value to the minimum value is D_t：(1-D_t)。

Here, for D_tWhen the mobility of each of electrons and ions in the dielectric inside on the wafer is set to μ_e、μ_iIs represented by D_t＝μ_i/(μ_e+μ_i). In other words, D_tIs the value of the mobility of the ions divided by the sum of the mobility of the electrons within the dielectric and the mobility of the ions within the dielectric on the wafer. At this time, in the linear triangular wave 153, the ratio of the time of voltage rise to the time of voltage fall is (1/μ:)_e)：(1/μ_i) This is the ratio of the time required for movement of negative charges to the time required for movement of positive charges. On the other hand, in order to ensure the time of each polarity to be 1ms or more, it is necessary to set the frequency f_pIs determined to satisfy f simultaneously_p≤1000D_tAnd f_p≤1000(1-D_t). It is composed ofIn, f_pThe unit of (b) is Hz. Further, preferably, the frequency f of the triangular waveform_pIs, when in Hz, will subtract D from 1_tThe resulting value or D_tIs set to a value of 1000 times.

According to the present embodiment, by independently superimposing a linear triangular wave output from a dc power supply and a high-frequency bias voltage applied to the stage, a current is generated that continues for a time sufficient for removing charged particles from the wafer surface. By this current, charged particles on the surface of the sample can be removed, a channel shape with high perpendicularity can be obtained, and damage to a film which is not an etching target in the channel can be reduced.

In addition, similar effects can be obtained by applying a voltage of a curved triangular wave 154 as shown in fig. 8 instead of the straight triangular wave 151. The curved triangular wave 154 can also be referred to as a rectangular wave having a large time constant, and has characteristics similar to those of a straight triangular wave. When the curved triangular wave 154 is formed from a rectangular wave having a large time constant, it is desirable to set the rise time constant τ to 50% when the duty ratio is set to 50%_rAnd a fall time constant τ_fEach is set to 0.43ms or more, typically, about several ms. Since each current needs to last for 1ms or more, the frequency f of the curved triangular wave 154_pIt is required to be 500Hz or less.

If these conditions are satisfied, as shown in fig. 9, the current 155 flowing from the wafer is maintained at 10% or more of the maximum value and continues for 1ms or more from the start of the voltage rise and fall, and therefore, it can contribute to the removal of the charged particles. In other words, the change time and the change amount of the amplitude of the voltage waveform output from the dc power supply are preferably such that 10% or more of the maximum value of the current generated in the wafer is maintained at an amplitude of 1ms or more based on the voltage waveform.

In addition, the mobility μ of electrons and ions within the dielectric on the wafer can also be taken into account_eAnd mu_iIs given by the duty ratio D of the curved triangular wave 154_pThe content was set to be other than 50%. In this case, D_pSatisfies D_p：(1-D_p)＝(1/μ_e)：(1/μ_i) Namely, therefore, D is_p＝μ_i/(μ_e+μ_i). In other words, D_pIs the value of the mobility of the ions divided by the sum of the mobility of the electrons within the dielectric and the mobility of the ions within the dielectric on the wafer. On the other hand, in order to ensure the time of each polarity to be 1ms or more, it is necessary to set the frequency f_pIs determined to satisfy f simultaneously_p≤1000D_tAnd f_p≤1000(1-D_t). Wherein f is_pThe unit of (b) is Hz. Further, preferably, the frequency f of the triangular waveform_pIs, when in Hz, will subtract D from 1_pThe resulting value or D_pIs set to a value of 1000 times.

When a curved triangular wave is used instead of the linear triangular wave, control of the dc power supply 133 is facilitated similarly to the case of using a rectangular wave. When a curved triangular wave is used, the control signal output from the control unit 150 may be alternately turned ON and OFF, and the time constant τ may be set to be constant_rAnd τ_fThis can be achieved by applying a low-pass filter to the control signal or the output of the dc power supply 133, or by providing output feedback to the dc power supply 133.

In addition, although the waveforms 151, 153, and 154 shown in fig. 5, 7, and 8 are always positive in voltage, the waveforms may actually be negative in voltage or have a voltage that is both positive and negative. This is because the current flowing from the wafer is a differential of the voltage, and therefore, the positive and negative of the voltage do not affect.

Fig. 10 is a diagram showing a relationship between output start and end times of (a) the high-frequency power supply 131, (b) the microwave power supply 116, and (c) the dc power supply 133, where the vertical axis shows output and the horizontal axis shows time. It is desirable that the output start of the microwave power supply 116 is before the output start of the high-frequency power supply 131. This is because the impedance of the cavity when viewed from the high-frequency power supply 131 greatly differs depending on the presence or absence of plasma, and therefore, when the output of the high-frequency power supply 131 is started after plasma is generated by the output of the microwave power supply 116, the output of the high-frequency power supply 131 is stabilized. For the same reason, it is desirable that the output of the high-frequency power supply 131 be terminated before the output of the microwave power supply 116 is terminated.

It is desirable that the output start of the dc power supply 133 is before the output start of the high-frequency power supply 131. This is based on the following reason. When the high-frequency power is output from the high-frequency power supply 131, the voltage between the plasma 136 and the wafer 126 increases, and therefore, the verticality of the charged particles introduced into the wafer 126 increases, and the sidewall of the trench on the wafer 126 is easily charged. On the other hand, the output dc power source 133 does not adversely affect the apparatus and the etching result. Therefore, by setting the output of the dc power supply 133 to be before the output of the high-frequency power supply 131, charging to the channel side wall can be more effectively suppressed. For the same reason, it is desirable that the output of the dc power supply 133 be terminated after the output of the high-frequency power supply 131 is terminated.

When plasma is generated by the microwave power supply 116, a potential difference is generated between the plasma 136 and the wafer 126, and therefore, the charged particles have verticality although the potential difference is weaker than that in the case where the high-frequency power supply 131 starts outputting. On the other hand, the adverse effect of the dc power supply 133 being output before the microwave power supply 116 does not exist. Therefore, it is desirable that the relationship between the output timings of the dc power supply 133 and the microwave power supply 116 is the same as the relationship between the output timings of the dc power supply 133 and the high-frequency power supply 131 described above. That is, it is desirable that the output start of the high-frequency power supply 131 is after the output start of the dc power supply 133, and that the output end of the high-frequency power supply 131 is before the output end of the dc power supply 133.

On the other hand, the relationship between the output timings of the dc power supply 133 and the electrostatic adsorption power supply 139 has no particular problem because it does not adversely affect the apparatus and etching, regardless of which of the outputs starts or ends first.

[ modification 1]

A first modification of the embodiment of the present invention will be described with reference to fig. 11. Note that the same reference numerals are given to the components as those shown in fig. 2 to 4, which have already been described, and the components have the same functions, and therefore, the redundant description thereof is omitted.

Fig. 11 is a schematic diagram showing a cross section of the electrode 125 according to the present modification, and details of the bias voltage generator 127 and the electrostatic attraction power source 139. In the present modification, the bias voltage generator 127 is connected in parallel to the electrostatic attraction electrodes 135a and 135b via capacitors 138a 'and 138 b', respectively. The bias voltage generator 127 is connected via the capacitors 138a 'and 138 b', and thus is not affected by the dc voltage of the electrostatic attraction power supply 139. Further, by adjusting the capacitance of the capacitors 138a 'and 138 b', the capacitance between the substrate 129 and the electrostatic adsorption electrodes 135a and 135b in the above-described embodiment can be simulated, and the same effect can be exerted on the wafer in this embodiment and this modification. A description of a configuration overlapping with the configuration of fig. 3 according to the above embodiment is omitted.

[ modification 2]

A second modification of the embodiment of the present invention will be described with reference to fig. 12. Fig. 12 is a schematic diagram showing the details of the cross section of the electrode 125 according to the present modification, and the bias voltage generator 127, the electrostatic attraction power source 139, and the triangular wave generator 142. In the present modification, a triangular wave application electrode 141 is disposed between the electrostatic adsorption electrodes 135a and 135b and the base material 129. The electrode is insulated from the surroundings by a dielectric film 130, and is connected to a dc power supply 133 via a low-pass filter 134. The base 129 is connected to a high-frequency power supply 131 through an automatic matching box 132. A description of a configuration overlapping with the configuration of fig. 3 according to the above embodiment is omitted.

The thickness of the dielectric film 130 between the triangular wave application electrode 141 and the electrostatic attraction electrodes 135a and 135b is preferably equal to the thickness of the dielectric film 130 between the base 129 and the electrostatic attraction electrodes 135a and 135b in the above embodiment. Accordingly, the capacitance between the triangular wave application portion and the electrostatic adsorption electrodes 135a and 135b is equal in the present modification and this embodiment, and the same effect as this embodiment can be provided to the wafer in this modification.

[ modification 3]

A third modification of the embodiment of the present invention will be described with reference to fig. 13 and 14. Fig. 13 is a schematic diagram showing a cross section of the electrode 125 according to the present modification, and details of the bias voltage generator 127 and the electrostatic attraction power source 139. In the present modification, a bias voltage generator 127 is connected to the base 129, an electrostatic attraction power source 139 is connected to the electrostatic attraction electrodes 135a and 135b, and the bias voltage generator 127 and the electrostatic attraction power source 139 are controlled by the controller 150.

Here, the bias voltage generator 127 may be connected to the electrostatic attraction electrodes 135a and 135b via a capacitor instead of being connected to the base 129.

Fig. 14 shows waveforms of voltages output from the electrostatic attraction power source 139, and a waveform 143a shows an output of the electrostatic attraction power source 139a, and a waveform 143b shows an output of the electrostatic attraction power source 139 b. In the above-described embodiment, the electrostatic adsorption power sources 139a and 139b output different dc voltages, but in the present modification, the control unit 150 controls the power sources so as to output waveforms obtained by superimposing the respective dc voltages on the triangular wave.

The triangular wave overlapping the waveforms 143a and 143b may be a straight triangular wave or a curved triangular wave, and the frequency and the duty ratio are determined by the same consideration as in the above embodiment. On the other hand, the amplitude of the current flowing from the wafer 126 is smaller than that of the embodiment. This is because the dielectric film 130 between the electrostatic chuck electrodes 135a and 135b and the wafer 126 is smaller than the dielectric film 130 between the substrate 129 and the wafer 126, and therefore, the former has a larger electrostatic capacity than the latter.

It is desirable that the phases of the triangular waves overlapping with the waveforms 143a and 143b are identical. By making the phases uniform, the potential difference between the electrostatic attraction electrodes 135a and 135b is always constant, and the attraction of the wafer 126 is not affected.

[ modification 4]

A fourth modification of the embodiment of the present invention will be described with reference to fig. 15 and 16. Fig. 15 is a schematic diagram showing a cross section of the electrode 125 according to the present modification, and details of the bias voltage generator 127 and the electrostatic attraction power source 139. In the present modification, a bias voltage generator 127 is connected to the base 129, an electrostatic attraction power source 139 is connected to the electrostatic attraction electrodes 135a and 135b, and the bias voltage generator 127 and the electrostatic attraction power source 139 are controlled by the controller 150. The bias voltage generator 127 includes an automatic matching box 132, an amplifier 144, and an arbitrary waveform generator 145, and the amplifier 144 is connected to the base material 129 via the automatic matching box 132. The amplifier 144 amplifies the voltage input from the arbitrary waveform generator 145 by a certain gain and outputs the amplified voltage.

Fig. 16 is a diagram showing a voltage waveform 146 output from the amplifier 144. Waveform 146 is obtained by superimposing the high frequency output from high frequency power supply 131 in the above embodiment on the triangular wave output from dc power supply 133 in this embodiment. The arbitrary waveform generator 145 inputs a voltage obtained by dividing the voltage at each time of the waveform 146 by the gain of the amplifier 144 to the amplifier 144, so that the amplifier 144 outputs the waveform 146. In addition, when the amplifier 144 has frequency characteristics, the arbitrary waveform generating unit 145 may input a waveform obtained by inverting the frequency characteristics to increase or decrease a specific frequency component to the amplifier 144 so that the output of the amplifier 144 becomes the waveform 146.

[ modification 5]

A fifth modification of the embodiment of the present invention will be described with reference to fig. 17 and 18. Fig. 15 is a schematic diagram showing a cross section of the electrode 125 and details of the electrostatic adsorption power supply 160 according to the present modification. In the present modification, the electrostatic attraction power source 160 includes arbitrary waveform generating units 147a and 147b, amplifiers 148a and 148b, and automatic matching boxes 149a and 149b, and the amplifier 148a is connected to the electrostatic attraction electrode 135a via the automatic matching box 149a, and the amplifier 148b is connected to the electrostatic attraction electrode 135b via the automatic matching box 149 b. The amplifiers 148a and 148b amplify the voltages input from the arbitrary waveform generators 147a and 147b with a certain gain and output the amplified voltages.

Fig. 18 is a diagram showing waveforms 161a and 161b which are output voltages of the amplifiers 148a and 148 b. The waveforms 161a and 161b are obtained by further superimposing the output waveforms of the electrostatic adsorption power supplies 139a and 139b in the modification 3 on high frequencies. The frequency of the high frequency to be superimposed is equal to the high frequency output by the high frequency power supply 131 in the above embodiment. On the other hand, the amplitude of the voltage is obtained by multiplying the amplitude of the output voltage of the high-frequency power supply 131 in the present embodiment by the attenuation factor when the high frequency applied to the base 129 in the present embodiment is transmitted to the electrostatic adsorption electrodes 135a and 135b, and thereby the same effect as that in the present embodiment can be obtained on the wafer 126.

The arbitrary waveform generation units 147a and 147b divide the voltage at each time of the waveforms 161a and 161b by the gain of the amplifier 148a or 148b, and input the divided voltages to the amplifiers 148a and 148b, respectively. In addition, when the amplifiers 148a and 148b have frequency characteristics, the arbitrary waveform generating units 147a and 147b may input to the amplifiers 148a and 148b a waveform obtained by inverting the frequency characteristics to increase or decrease a specific frequency component so that the output of the amplifiers 148a and 148b becomes the waveform 161 a.

The invention made by the present inventor has been specifically described above based on the embodiments, however, the present invention is not limited to the above embodiments and includes various modifications. For example, the above embodiments are described in detail to explain the present invention in an easily understandable manner, and are not necessarily limited to having all the structures described.

Further, a part of the structure of one embodiment may be replaced with the structure of another embodiment, and the structure of another embodiment may be added to the structure of one embodiment. Further, addition, deletion, and replacement of another configuration may be performed for a part of the configurations of the embodiments. The respective members and relative dimensions shown in the drawings are simplified and optimized for easy understanding of the present invention, and may have a more complicated shape in mounting.

The structure and method described in the above embodiments are not limited to the above embodiments, and include various application examples.

-description of symbols-

100 plasma processing apparatus, 104 vacuum processing chamber, 125 electrode, 126 wafer, 127 bias high frequency power supply, 129 substrate, 130 dielectric film, 131 high frequency power supply, 132, 149a, 149b automatic matching device, 133 direct current power supply, 134 low pass filter, 135a, 135b electrostatic adsorption electrode, 136 plasma, 138a, 138b parallel circuit, 139a, 139b, 160 electrostatic adsorption power supply, 139a, 139b power supply unit, 145, 147a, 147b arbitrary waveform generating part, 150 control part.