阅读说明：本技术 一种基于GaN和Si器件混合的飞跨电容多电平逆变器及其控制方法 (Flying capacitor multi-level inverter based on GaN and Si device mixing and control method thereof ) 是由 王俊 屈坤 张超 陈伟彬 于 2020-11-26 设计创作，主要内容包括：本发明提供一种基于GaN和Si器件混合的飞跨电容多电平逆变器及其控制方法,涉及多电平逆变器领域。该基于GaN和Si器件混合的飞跨电容多电平逆变器包括直流供电电源Vdc、直流稳压电容Cdc、第一飞跨电容Cf1、……、第二飞跨电容Cf2、……、第(n-2)飞跨电容Cf(n-2)、第一硅基器件SL1、第二硅基器件SL2、第一氮化镓基器件SH1、第二氮化镓基器件SH2、第三氮化镓基器件SH3、第四氮化镓基器件SH4、……、第(2n-3)氮化镓基器件SH(2n-3)、第(2n-2)氮化镓基器件SH(2n-2)和负载RL。本发明充分结合了Si基器件的大容量、低成本和宽禁带器件的低损耗、高频率的优势,能显著提高效率,而且大大降低成本和提高宽禁带器件应用功率等级,实现了性能与成本的折中优化。(The invention provides a flying capacitor multi-level inverter based on GaN and Si device mixing and a control method thereof, and relates to the field of multi-level inverters. The flying capacitor multi-level inverter based on the GaN and Si device mixing comprises a direct-current power supply Vdc, a direct-current voltage stabilizing capacitor Cdc, first flying capacitors Cf1 and … …, second flying capacitors Cf2 and … …, an (n-2) th flying capacitor Cf (n-2), a first silicon-based device SL1, a second silicon-based device SL2, a first gallium nitride-based device SH1, a second gallium nitride-based device SH2, a third gallium nitride-based device SH3, a fourth gallium nitride-based device SH4 and … …, a (2n-3) th gallium nitride-based device SH (2n-3), a (2n-2) th gallium nitride-based device SH (2n-2) and a load RL. The invention fully combines the advantages of large capacity and low cost of the Si-based device and low loss and high frequency of the wide bandgap device, can obviously improve the efficiency, greatly reduces the cost and improves the application power level of the wide bandgap device, and realizes the compromise optimization of the performance and the cost.)

1. A flying capacitor multi-level inverter based on GaN and Si device mixing is characterized in that: the inverter comprises a direct-current power supply Vdc, a direct-current voltage-stabilizing capacitor Cdc, a first flying capacitor Cf1, a second flying capacitor Cf2, … …, an (n-2) th flying capacitor Cf (n-2), a first silicon-based device SL1, a second silicon-based device SL2, a first gallium nitride-based device SH1, a second gallium nitride-based device SH2, a third gallium nitride-based device SH3, a fourth gallium nitride-based device SH4, an … …, a (2n-3) th gallium nitride-based device SH (2n-3), a (2n-2) th gallium nitride-based device SH (2n-2) and a load RL;

the positive electrode of the direct-current power supply Vdc, the positive electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the first silicon-based device SL1 and one end of the first gallium nitride-based device SH1 are connected; the negative electrode of the direct-current power supply Vdc, the negative electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the second silicon-based device SL2 and one end of the second gallium nitride-based device SH2 are connected;

the anode of the first flying capacitor Cf1, the other end of the first gallium nitride-based device SH1 and one end of the third gallium nitride-based device SH3 are connected; the cathode of the first flying capacitor Cf1, the other end of the second gallium nitride-based device SH2 and one end of the fourth gallium nitride-based device SH4 are connected;

the anode of the second flying capacitor Cf2, the other end of the third gallium nitride-based device SH3 and one end of the fifth gallium nitride-based device SH5 are connected; the cathode of the second flying capacitor Cf2, the other end of the fourth gallium nitride-based device SH4 and one end of the sixth gallium nitride-based device SH6 are connected;

……

the anode of the (n-2) th flying capacitor Cf (n-2), the other end of the (2n-5) th gallium nitride-based device SH (2n-5) and one end of the (2n-3) th gallium nitride-based device SH (2n-3) are connected; the negative electrode of the (n-2) th flying capacitor Cf (n-2), the other end of the (2n-4) th gallium nitride-based device SH (2n-4) and one end of the (2n-2) th gallium nitride-based device SH (2n-2) are connected;

one end of the load RL, the other end of the (2n-3) th gallium nitride-based device SH (2n-3) and the other end of the (2n-2) th gallium nitride-based device SH (2n-2) are connected; the other end of the load RL, the other end of the first silicon-based device SL1 and the other end of the second silicon-based device SL2 are connected.

2. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: and n in the (2n-3) th gallium nitride-based device SH (2n-3), the (2n-2) th gallium nitride-based device SH (2n-2), the (n-2) th flying capacitor Cf (n-2) and the like represents the number of half-bridge modules.

3. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: the first silicon-based device SL1 and the second silicon-based device SL2 form a power frequency half-bridge M1; the first gallium nitride-based device SH1 and the second gallium nitride-based device SH2 form a high-frequency half-bridge M2; the third gallium nitride-based device SH3 and the fourth gallium nitride-based device SH4 form a high-frequency half-bridge M3; … …, respectively; and the (2n-3) th gallium nitride-based device SH (2n-3) and the (2n-2) th gallium nitride-based device SH (2n-2) form a high-frequency half-bridge Mn.

4. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: the first silicon-based device SL1 and the second silicon-based device SL2 comprise, but are not limited to, a Si MOSFET (silicon metal oxide semiconductor field effect transistor) and a Si IGBT (silicon-based insulated gate bipolar transistor) anti-parallel diode, and the working frequency is 50 Hz.

5. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: the first gallium nitride-based device SH1, the second gallium nitride-based device SH2, the third gallium nitride-based device SH3, the fourth gallium nitride-based device SH4, … …, the (2n-3) th gallium nitride-based device SH (2n-3) and the (2n-2) th gallium nitride-based device SH (2n-2) comprise but are not limited to GaN HEMTs (gallium nitride high electron mobility transistors), and the working frequency is 10 kHz-1 MHz.

6. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: the power frequency half bridge M1 is a low-frequency branch; the high-frequency half bridge M2, the high-frequency half bridges M3 and … …, the high-frequency half bridge Mn, the first flying capacitor Cf1, the second flying capacitors Cf2 and … …, and the (n-2) th flying capacitor Cf (n-2) form a high-frequency branch.

7. The GaN-and-Si-device hybrid-based flying capacitor multi-level inverter of claim 1, wherein: when the output voltage of the Si bridge arm is 0V, the output load voltage is the output voltage of the GaN bridge arm; when the output voltage of the Si bridge arm is + Vdc, the output load voltage is the downward translation Vdc of the output voltage of the GaN bridge arm.

8. A flying capacitor multi-level inverter control method based on GaN and Si device mixing is characterized in that: the method specifically comprises the following steps:

1) generating a Si bridge arm switching signal (101) by a unit power frequency sine wave, and outputting a '1' signal when the sine value is more than or equal to 0; when the sine value is less than 0, outputting a '0' signal;

2) the GaN bridge arm duty cycle signal (102) may be derived from the relationship:

wherein m represents a modulation ratio, A_pRepresenting a triangular carrier amplitude;

3) and (n-1) GaN bridge arm switching signals (103) are obtained by comparing the GaN bridge arm duty ratio signals with the (n-1) triangular carriers with the phase difference of 2 pi/(n-1).

Technical Field

The invention relates to the technical field of multilevel inverters, in particular to a flying capacitor multilevel inverter based on GaN and Si device mixing and a control method thereof.

Background

In recent years, high-power multi-level inverters are widely used in actual industrial production. Because the multi-level inverter has a complex structure and adopts more components, the synchronous monitoring and analysis of the operating parameters under each working state are difficult to realize in the design and experiment.

The flying capacitor multi-level inverter used in the prior art is mostly based on a Si-based device or a GaN-based power device, and the number of components of the two inverters is large, wherein the flying capacitor multi-level circuit of the prior Si-based power device has low efficiency, while the flying capacitor multi-level circuit of the prior GaN-based power device has high cost and low application power level of a wide bandgap device, so that a flying capacitor multi-level inverter based on the mixture of the GaN and the Si device and a control method thereof need to be designed.

Disclosure of Invention

Technical problem to be solved

Aiming at the defects of the prior art, the invention provides a flying capacitor multi-level inverter based on the mixing of GaN and Si devices and a control method thereof, and solves the problems that the flying capacitor multi-level circuit of the traditional Si-based power device is low in efficiency, the flying capacitor multi-level circuit of the traditional GaN-based power device is high in cost, and meanwhile, the application power level of a wide bandgap device is low.

(II) technical scheme

In order to achieve the purpose, the invention is realized by the following technical scheme: a flying capacitor multi-level inverter based on GaN and Si device mixing comprises a direct current power supply Vdc, a direct current voltage stabilizing capacitor Cdc, a first flying capacitor Cf1, a second flying capacitor Cf2, … …, an (n-2) th flying capacitor Cf (n-2), a first silicon-based device SL1, a second silicon-based device SL2, a first gallium nitride-based device SH1, a second gallium nitride-based device SH2, a third gallium nitride-based device SH3, a fourth gallium nitride-based device SH4, … …, a (2n-3) th gallium nitride-based device SH (2n-3), a (2n-2) th gallium nitride-based device SH (2n-2) and a load RL;

the positive electrode of the direct-current power supply Vdc, the positive electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the first silicon-based device SL1 and one end of the first gallium nitride-based device SH1 are connected; the negative electrode of the direct-current power supply Vdc, the negative electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the second silicon-based device SL2 and one end of the second gallium nitride-based device SH2 are connected;

the anode of the first flying capacitor Cf1, the other end of the first gallium nitride-based device SH1 and one end of the third gallium nitride-based device SH3 are connected; the cathode of the first flying capacitor Cf1, the other end of the second gallium nitride-based device SH2 and one end of the fourth gallium nitride-based device SH4 are connected;

the anode of the second flying capacitor Cf2, the other end of the third gallium nitride-based device SH3 and one end of the fifth gallium nitride-based device SH5 are connected; the cathode of the second flying capacitor Cf2, the other end of the fourth gallium nitride-based device SH4 and one end of the sixth gallium nitride-based device SH6 are connected;

……

the anode of the (n-2) th flying capacitor Cf (n-2), the other end of the (2n-5) th gallium nitride-based device SH (2n-5) and one end of the (2n-3) th gallium nitride-based device SH (2n-3) are connected; the negative electrode of the (n-2) th flying capacitor Cf (n-2), the other end of the (2n-4) th gallium nitride-based device SH (2n-4) and one end of the (2n-2) th gallium nitride-based device SH (2n-2) are connected;

one end of the load RL, one end of the (2n-3) th gallium nitride-based device SH (2n-3) and one end of the (2n-2) th gallium nitride-based device SH (2n-2) are connected; the other end of the load RL, the other end of the first silicon-based device SL1 and the other end of the second silicon-based device SL2 are connected.

Preferably, n in the (2n-3) th gallium nitride-based device SH (2n-3), the (2n-2) th gallium nitride-based device SH (2n-2), the (n-2) th flying capacitor Cf (n-2), and the like represents the number of half-bridge modules.

Preferably, the first silicon-based device SL1 and the second silicon-based device SL2 form a power frequency half bridge M1; the first gallium nitride-based device SH1 and the second gallium nitride-based device SH2 form a high-frequency half-bridge M2; the third gallium nitride-based device SH3 and the fourth gallium nitride-based device SH4 form a high-frequency half-bridge M3; … …, respectively; and the (2n-3) th gallium nitride-based device SH (2n-3) and the (2n-2) th gallium nitride-based device SH (2n-2) form a high-frequency half-bridge Mn.

Preferably, the first silicon-based device SL1 and the second silicon-based device SL2 include, but are not limited to, a Si MOSFET (silicon metal oxide semiconductor field effect transistor), a Si IGBT (silicon-based insulated gate bipolar transistor) antiparallel diode, and the operating frequency is 50 Hz.

Preferably, the first gallium nitride-based device SH1, the second gallium nitride-based device SH2, the third gallium nitride-based device SH3, the fourth gallium nitride-based device SH4, … …, the (2n-3) th gallium nitride-based device SH (2n-3) and the (2n-2) th gallium nitride-based device SH (2n-2) include, but are not limited to, GaN HEMT (gallium nitride high electron mobility transistor) and have an operating frequency of 10kHz to 1 MHz.

Preferably, the power frequency half bridge M1 is a low-frequency branch; the high-frequency half bridge M2, the high-frequency half bridges M3, … …, the high-frequency half bridge Mn, the first flying capacitor Cf1, the second flying capacitors Cf2, … … and the (n-2) th flying capacitor Cf (n-2) form a high-frequency branch.

Preferably, when the output voltage of the Si bridge arm is 0V, the output load voltage is the output voltage of the GaN bridge arm; when the output voltage of the Si bridge arm is + Vdc, the output load voltage is the downward translation Vdc of the output voltage of the GaN bridge arm.

A flying capacitor multi-level inverter control method based on GaN and Si device mixing is characterized in that: the method specifically comprises the following steps:

1) generating a Si bridge arm switching signal (101) by a unit power frequency sine wave, and outputting a '1' signal when the sine value is more than or equal to 0; when the sine value is less than 0, outputting a '0' signal;

2) the GaN bridge arm duty cycle signal (102) may be derived from the relationship:

wherein m represents a modulation ratio, A_pRepresenting a triangular carrier amplitude;

3) and (n-1) GaN bridge arm switching signals (103) are obtained by comparing the GaN bridge arm duty ratio signals with the (n-1) triangular carriers with the phase difference of 2 pi/(n-1).

(III) advantageous effects

The invention provides a flying capacitor multi-level inverter based on GaN and Si device mixing and a control method thereof. The method has the following beneficial effects:

1. the invention fully combines the advantages of large capacity and low cost of the Si-based device and low loss and high frequency of the wide bandgap device, and compared with the flying capacitor multi-level circuit of the traditional Si-based power device, the efficiency can be obviously improved; compared with a flying capacitor multi-level circuit of a GaN-based power device, the method can greatly reduce the cost, improve the application power level of the wide bandgap device and realize compromise optimization of the performance and the cost.

2. The invention provides a flying capacitor multi-level inverter circuit based on GaN and Si device mixing and a control method thereof, which utilizes low-frequency operation of a low-cost and high-capacity Si-based device to generate two-level power frequency voltage, utilizes operation of a high-frequency and low-loss GaN-based device to generate n-level voltage, and superposes two output voltages to obtain (2n-1) level voltage.

3. The invention realizes the reasonable matching and mutual supplement of the Si-based power device and the GaN-based power device, can be applied to various power electronic devices represented by a switching power supply, and provides a new solution for realizing the aims of high reliability, high power capacity and high energy efficiency of a power electronic converter.

Drawings

FIG. 1 is a schematic diagram of a flying capacitor multi-level inverter circuit based on a GaN and Si device hybrid and a control method thereof;

fig. 2 is a schematic diagram of a flying capacitor five-level inverter circuit based on a mixture of GaN and Si devices and a control method thereof according to an embodiment of the present invention;

fig. 3 is a schematic diagram of voltage waveforms of each branch and a load in a power frequency period Ts of a flying capacitor five-level inverter circuit based on a mixture of GaN and Si devices according to an embodiment of the present invention;

fig. 4 is a schematic diagram of a modulation control method of a flying capacitor five-level inverter circuit based on a mixture of GaN and Si devices according to an embodiment of the present invention.

101, Si bridge arm switch signals; 102. a GaN bridge arm duty cycle signal; 103. and (n-1) groups of GaN bridge arm switch signals.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example (b):

as shown in fig. 2, an embodiment of the present invention provides a flying capacitor five-level inverter circuit based on a mixture of GaN and Si devices, including a dc power supply Vdc, a dc voltage stabilizing capacitor Cdc, a flying capacitor Cf, a first silicon-based device SL1, a second silicon-based device SL2, a first gallium nitride-based device SH1, a second gallium nitride-based device SH2, a third gallium nitride-based device SH3, a fourth gallium nitride-based device SH4, and a load RL;

the positive electrode of the direct-current power supply Vdc, the positive electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the first silicon-based device SL1 and one end of the first gallium nitride-based device SH1 are connected; the negative electrode of the direct-current power supply Vdc, the negative electrode of the direct-current voltage stabilizing capacitor Cdc, one end of the second silicon-based device SL2 and one end of the second gallium nitride-based device SH2 are connected;

the anode of the flying capacitor Cf, the other end of the first gallium nitride-based device SH1 and one end of the third gallium nitride-based device SH3 are connected; the negative electrode of the flying capacitor Cf, the other end of the second gallium nitride-based device SH2 and one end of the fourth gallium nitride-based device SH4 are connected;

one end of the load RL, the other end of the third gallium nitride-based device SH3 and the other end of the fourth gallium nitride-based device SH4 are connected; the other end of load RL, the other end of first silicon based device SL1 and the other end of second silicon based device SL2 are connected.

The first silicon-based device SL1 and the second silicon-based device SL2 comprise but are not limited to Si MOSFETs (silicon metal oxide semiconductor field effect transistors) and Si IGBTs (silicon-based insulated gate bipolar transistors) anti-parallel diodes, and the working frequency is 50 Hz;

the first gallium nitride-based device SH1, the second gallium nitride-based device SH2, the third gallium nitride-based device SH3 and the fourth gallium nitride-based device SH4 comprise but are not limited to GaN HEMTs (gallium nitride high electron mobility transistors), and the working frequency is 10 kHz-1 MHz;

the power frequency half bridge M1 is a low-frequency branch; the high-frequency half-bridge M2, the high-frequency half-bridge M3 and the flying capacitor Cf form a high-frequency branch.

As shown in FIG. 3, a power frequency period T_sVoltage and load voltage waveforms of each branch in the circuit, including low frequency branch input voltage V_ANHigh frequency branch voltage V_BNLoad voltage V_ABWhen the output voltage of the Si bridge arm is 0V, the output load voltage is the output voltage of the GaN bridge arm; when the output voltage of the Si bridge arm is + Vdc, the output load voltage is the downward translation Vdc of the output voltage of the GaN bridge arm.

As shown in fig. 4, a flying capacitor five-level inverter circuit based on a GaN and Si device hybrid includes the following modulation control methods: the method specifically comprises the following steps:

1) the Si bridge arm switch signal (101) is generated by a unit power frequency sine wave, and when the sine value is more than or equal to 0, a '1' signal is output; when the sine value is less than 0, outputting a '0' signal;

2) the GaN bridge arm duty cycle signal (102) may be derived from the relationship:

wherein m represents a modulation ratio, A_pRepresenting a triangular carrier amplitude;

3) the two groups of GaN bridge arm switching signals (103) are obtained by comparing GaN bridge arm duty ratio signals with two groups of triangular carriers with the phase difference of 2 pi/2-pi respectively.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.