阅读说明：本技术 一种具有升压能力的三相三电平双输出逆变器及其调制方法 (Three-phase three-level double-output inverter with boosting capacity and modulation method thereof ) 是由 王汝田 袁帅 郝赫男 刘闯 蔡国伟 郭东波 于 2020-11-30 设计创作，主要内容包括：本发明是一种具有升压能力的三相三电平双输出逆变器及其调制方法,其特点是,包括：两个电容,两个直流升压单元,18个开关模块,逆变级1和逆变级2分别带两组三相负载；通过对开关模块施加合理的驱动信号,具有升压能力的三相三电平双输出逆变器可逆变输出两组频率、幅值皆可调的三相交流电压。其有益的效果是：体积小、成本低、结构合理、具有升压能力、输出电压谐波含量小,可满足诸如新能源发电系统、电动汽车和轨道牵引等高压大容量双输出逆变场合的需求。(The invention relates to a three-phase three-level double-output inverter with boosting capacity and a modulation method thereof, which is characterized by comprising the following steps: the two capacitors, the two direct current boosting units and the 18 switch modules are respectively provided with two groups of three-phase loads in the inverter stage 1 and the inverter stage 2; by applying reasonable driving signals to the switch module, the three-phase three-level dual-output inverter with boosting capacity can invert and output two groups of three-phase alternating-current voltages with adjustable frequency and amplitude. The beneficial effects are as follows: the high-voltage high-capacity dual-output inverter has the advantages of small volume, low cost, reasonable structure, boosting capacity and low output voltage harmonic content, and can meet the requirements of high-voltage high-capacity dual-output inversion occasions such as a new energy power generation system, an electric automobile and rail traction.)

1. A three-phase three-level dual-output inverter with boosting capability is characterized in that: it comprises a capacitor C₁～C₂A DC booster unit T1, a DC booster unit T2, switch modules A1-A4, switch modules B1-B4 and switch modules C1-C4. Switch modules O1-O6; two groups of outputs of the inverter are respectively defined as an inverter stage 1 and an inverter stage 2, and the three-phase load carried by the inverter stage 1 is Z_A1、Z_B1、Z_C1The three-phase load of the inverter stage 2 is Z_A2、Z_B2、Z_C2；

The switch modules A1-A4, the switch modules B1-B4, the switch modules C1-C4 and the switch modules O1-O6 have the same structure, and each switch module consists of an insulated gate bipolar transistor and an anti-parallel diode; the anode of a diode of one switch module is connected with the emitter of the insulated gate bipolar transistor, and the cathode of the diode is connected with the collector of the insulated gate bipolar transistor; defining the emitter of the insulated gate bipolar transistor of a switch module as the emitter of the switch module, the collector of the insulated gate bipolar transistor as the collector of the switch module, the switch module being denoted by the symbol Xn, the insulated gate bipolar transistor in the switch module being denoted by the symbol S_XnDenotes, symbol S_XnThe subscript symbol Xn indicates the switch module in which it is located, and the diode in the switch module is denoted by the symbol D_XnDenotes the symbol D_XnThe subscript symbol Xn indicates the switch module in which it is located; wherein, when X belongs to { A, B, C }, n belongs to {1, 2, 3, 4 }; when X belongs to { O }, n belongs to {1, 2, 3, 4, 5, 6 };

the direct current boosting unit T1 consists of a direct current voltage source U₁An inductor L₁And three diodes D_1A、D_1B、D_1CComposition is carried out; DC voltage source U in DC voltage boosting unit T1₁Negative electrode of (1) and inductor L₁Is connected to one end of an inductor L₁And the other end of the diode and three diodes D_1A、D_1B、D_1CThe cathodes of the two electrodes are connected; the DC booster unit T2 is composed of a DC voltage source U₂An inductor L₂And three diodes D_2A、D_2B、D_2CComposition is carried out; DC voltage source U in DC voltage boosting unit T2₂Positive electrode and inductor L₂Is connected to one end of an inductor L₂And the other end of the diode and three diodes D_2A、D_2B、D_2CThe anodes of the anode groups are connected;

two capacitors are connected to the DC side, and are respectively called as a capacitor C₁And a capacitor C₂Capacitor C₁Positive pole of the DC bus and the positive pole end P of the DC bus_busConnected, capacitor C₁Negative electrode of (1) and capacitor C₂Is connected with the positive electrode of the capacitor C₂Negative pole of (2) and negative pole end N of direct current bus_busAre connected and connect the capacitor C₁Negative electrode of (1) and capacitor C₂The point at which the positive electrodes of (b) are connected is defined as a direct current neutral point O_bus(ii) a Positive terminal P_busAnd the negative terminal N_busVoltage between is U_dNeutral point O_busPotential 0, positive terminal P_busTo neutral point O_busA voltage ofNeutral point O_busAnd the negative terminal N_busA voltage of

Collector of switch module A1 and positive terminal P of DC bus_busThe emitter of switch module A1 is connected to the collector of switch module A2, the emitter of switch module A2 is connected to the collector of switch module A3, the emitter of switch module A3 is connected to the collector of switch module A4, and the emitter of switch module A4 is connected to the negative terminal N of the DC bus_busConnecting;

collector of switch module B1 and positive terminal P of DC bus_busThe emitter of switch module B1 is connected to the collector of switch module B2, the emitter of switch module B2 is connected to the collector of switch module B3, the emitter of switch module B3 is connected to the collector of switch module B4, and the emitter of switch module B4 is connected to the negative terminal N of the dc bus_busConnecting;

collector of switch module C1 and positive terminal P of DC bus_busTo each other, the emitter of switch module C1 is connected to the collector of switch module C2, the emitter of switch module C2 is connected to the collector of switch module C3, the emitter of switch module C3 is connected to the collector of switch module C4The electrodes are connected, and the emitter electrode of the switch module C4 is connected with the negative electrode end N of the direct current bus_busConnecting;

collector and DC neutral O of switch module O1_busThe emitter of the switch module O1 is connected to the emitter of the switch module O2, and the collector of the switch module O2 is connected to the emitter of the switch module a 2;

collector and DC neutral O of switch module O3_busThe emitter of the switch module O3 is connected to the emitter of the switch module O4, and the collector of the switch module O4 is connected to the emitter of the switch module B2;

collector and DC neutral O of switch module O5_busThe emitter of the switch module O5 is connected with the emitter of the switch module O6, and the collector of the switch module O6 is connected with the emitter of the switch module C2;

DC voltage source U in DC voltage boosting unit T1₁Positive pole of the DC bus and the positive pole end P of the DC bus_busConnected, diode D in DC boost unit T1_1AIs connected to the emitter of the switching module a1, diode D in the dc boost unit T1_1BIs connected to the emitter of the switching module B1, diode D in the dc boost unit T1_1CIs connected to the emitter of switching module C1;

DC voltage source U in DC voltage boosting unit T2₂Negative pole of (2) and negative pole end N of direct current bus_busConnected, diode D in DC boost unit T2_2AIs connected to the emitter of the switching module a3, diode D in the dc boost unit T2_2BIs connected to the emitter of the switching module B3, diode D in the dc boost unit T2_2CIs connected to the emitter of switching module C3;

three-phase load Z of inverter stage 1_A1、Z_B1、Z_C1Are connected to the connection point of the switch modules a1 and a2, the connection point of the switch modules B1 and B2, and the connection point of the switch modules C1 and C2, respectively, and the other ends thereof are connected together;

three-phase load Z of inverter stage 2_A2、Z_B2、Z_C2Are respectively connected at one endThe connection point to switch modules A3 and a4, the connection point of switch modules B3 and B4, and the connection point of switch modules C3 and C4, which are connected together at their other ends.

2. The three-phase three-level dual-output inverter with boosting capability of claim 1 is characterized in that: the modulation method comprises the following steps:

1) DC boost process, referred to as DC mode

The direct current mode is divided into a direct current mode 1 and a direct current mode 2; in the direct current mode 1, the direct current boosting unit T1 works in an effective working state, and the capacitor C is subjected to direct current₁Charging to raise the voltage; in the dc mode 2, the dc boost unit T2 operates in an active operating state for the capacitor C₂Charging to raise the voltage;

2) an inversion process, referred to as ac mode;

the alternating current mode is divided into an alternating current mode 1 and an alternating current mode 2, wherein the alternating current mode 1 is that the inverter stage 1 works in an effective working state, and the alternating current mode 2 is that the inverter stage 2 works in an effective working state; in AC mode, the capacitor C₁Capacitor C₂The direct current voltage on the transformer is converted into two groups of three-phase alternating current voltages;

3) adopting carrier wave PWM modulation;

the carrier waves are two groups of triangular waves with the same frequency and phase and the amplitude of 1, which are stacked up and down, and the upper and lower triangular carrier waves are respectively represented by v_car1And v_car2Represents; v for three-phase modulated wave of inverter stage 1_a1 ^*、v_b1 ^*、v_c1 ^*V for three-phase modulated wave of inverter stage 2_a2 ^*、v_b2 ^*、v_c2 ^*Expressed, the expressions are:

wherein m is₁And m₂The modulation degrees of the inverter stage 1 and the inverter stage 2 respectively; omega₁And ω₂The angular frequencies of the output voltages of the inverter stage 1 and the inverter stage 2 are respectively;

outer envelope v of the modulated wave defining the inverter stage 1₁And the envelope v of the modulated wave of inverter stage 2₂The expressions are respectively:

v₁＝max{v_a1 ^*，v_b1 ^*，v_c1 ^*}

v₂＝min{v_a2 ^*，v_b2 ^*，v_c2 ^*}

wherein max represents taking the maximum value, and min represents taking the minimum value;

envelope v of the modulated wave with inverter stage 1₁And the upper triangular carrier v_car1Comparing the voltage and current of the DC boost unit T1 with the voltage of the capacitor C₁The magnitude of boost of (d); outer envelope v of the modulated wave with inverter stage 2₂And the upper triangular carrier v_car2Comparing the voltage and current of the DC boost unit T2 with the voltage of the capacitor C₂The magnitude of boost of (d);

three-phase modulated wave v with inverter stage 1_a1 ^*、v_b1 ^*、v_c1 ^*Respectively associated with upper and lower triangular carriers v_car1And v_car2Comparing, and judging the corresponding output potentials of the A phase, the B phase and the C phase of the inverter stage 1 according to the comparison result; three-phase modulated wave v with inverter stage 2_a2 ^*、v_b2 ^*、v_c2 ^*Respectively associated with upper and lower triangular carriers v_car1And v_car2Comparing, and judging the corresponding output potentials of the A phase, the B phase and the C phase of the inverter stage 2 according to the comparison result; and then according to the output potentials of the inverter stage 1 and the inverter stage 2, driving signals of the switch modules A1-A4, B1-B4, C1-C4 and O1-O6 are obtained, and two groups of three-phase alternating-current voltages with adjustable amplitudes and frequencies are output.

Technical Field

The invention relates to the technical field of power electronic conversion devices, in particular to a three-phase three-level double-output inverter with boosting capacity and a modulation method thereof.

Background

In recent years, the double-alternating-current output system is applied to the fields of electric automobiles, rail traction, new energy power generation and the like. The core of the double alternating current output system is a double-output inverter. The invention provides a three-phase three-level dual-output inverter with boosting capacity and a modulation method thereof, aiming at solving the problem that a two-level dual-output inverter cannot be applied to high-voltage large-capacity occasions and the problem that the output alternating voltage is low when a pilot frequency operates. So far, no literature report and practical application about a three-phase three-level dual-output inverter with boosting capability and a modulation method thereof are found.

Disclosure of Invention

The purpose of the invention is: the three-phase three-level double-output inverter with the boosting capability is small in size, low in cost, reasonable in structure and wide in application; and a modulation method thereof.

The technical scheme adopted for realizing one of the purposes of the invention is that the three-phase three-level double-output inverter with the boosting capacity is characterized in that: it comprises a capacitor C₁～C₂A direct current boost unit T1, a direct current boost unit T2, switch modules A1-A4, switch modules B1-B4, switch modules C1-C4 and switch modules O1-O6; two groups of outputs of the inverter are respectively defined as an inverter stage 1 and an inverter stage 2, and the three-phase load carried by the inverter stage 1 is Z_A1、Z_B1、Z_C1The three-phase load of the inverter stage 2 is Z_A2、Z_B2、Z_C2。

The switch modules A1-A4, the switch modules B1-B4, the switch modules C1-C4 and the switch modules O1-O6 have the same structure, and each switch module consists of an insulated gate bipolar transistor and an anti-parallel diode; the anode of a diode of one switch module is connected with the emitter of the insulated gate bipolar transistor, and the cathode of the diode is connected with the collector of the insulated gate bipolar transistor; will be oneThe emitter of the insulated gate bipolar transistor of the switch module is defined as the emitter of the switch module, the collector of the insulated gate bipolar transistor is defined as the collector of the switch module, the switch module is denoted by the symbol Xn, and the insulated gate bipolar transistor in the switch module is denoted by the symbol S_XnDenotes, symbol S_XnThe subscript symbol Xn indicates the switch module in which it is located, and the diode in the switch module is denoted by the symbol D_XnDenotes the symbol D_XnThe subscript symbol Xn indicates the switch module in which it is located; wherein, when X belongs to { A, B, C }, n belongs to {1, 2, 3, 4 }; when X is larger than O, n is larger than 1, 2, 3, 4, 5, 6.

The direct current boosting unit T1 consists of a direct current voltage source U₁An inductor L₁And three diodes D_1A、D_1B、D_1CComposition is carried out; DC voltage source U in DC voltage boosting unit T1₁Negative electrode of (1) and inductor L₁Is connected to one end of an inductor L₁And the other end of the diode and three diodes D_1A、D_1B、D_1CThe cathodes of the two electrodes are connected; the DC booster unit T2 is composed of a DC voltage source U₂An inductor L₂And three diodes D_2A、D_2B、D_2CComposition is carried out; DC voltage source U in DC voltage boosting unit T2₂Positive electrode and inductor L₂Is connected to one end of an inductor L₂And the other end of the diode and three diodes D_2A、D_2B、D_2CAre connected with each other.

Two capacitors are connected to the DC side, and are respectively called as a capacitor C₁And a capacitor C₂Capacitor C₁Positive pole of the DC bus and the positive pole end P of the DC bus_busConnected, capacitor C₁Negative electrode of (1) and capacitor C₂Is connected with the positive electrode of the capacitor C₂Negative pole of (2) and negative pole end N of direct current bus_busAre connected and connect the capacitor C₁Negative electrode of (1) and capacitor C₂The point at which the positive electrodes of (b) are connected is defined as a direct current neutral point O_bus(ii) a Positive terminal P_busAnd the negative terminal N_busVoltage between is U_dNeutral point O_busPotential 0, positive terminal P_busTo neutral point O_busA voltage ofNeutral point O_busAnd the negative terminal N_busA voltage of

Collector of switch module A1 and positive terminal P of DC bus_busThe emitter of switch module A1 is connected to the collector of switch module A2, the emitter of switch module A2 is connected to the collector of switch module A3, the emitter of switch module A3 is connected to the collector of switch module A4, and the emitter of switch module A4 is connected to the negative terminal N of the DC bus_busAre connected.

Collector of switch module B1 and positive terminal P of DC bus_busThe emitter of switch module B1 is connected to the collector of switch module B2, the emitter of switch module B2 is connected to the collector of switch module B3, the emitter of switch module B3 is connected to the collector of switch module B4, and the emitter of switch module B4 is connected to the negative terminal N of the dc bus_busAre connected.

Collector of switch module C1 and positive terminal P of DC bus_busThe emitter of the switch module C1 is connected to the collector of the switch module C2, the emitter of the switch module C2 is connected to the collector of the switch module C3, the emitter of the switch module C3 is connected to the collector of the switch module C4, and the emitter of the switch module C4 is connected to the negative terminal N of the dc bus_busAre connected.

Collector and DC neutral O of switch module O1_busTo the emitter of switch block O1 is connected to the emitter of switch block O2 and the collector of switch block O2 is connected to the emitter of switch block a 2.

Collector and DC neutral O of switch module O3_busTo the emitter of switch block O3 is connected to the emitter of switch block O4 and the collector of switch block O4 is connected to the emitter of switch block B2.

Collector and DC neutral O of switch module O5_busConnected, the emitter of the switch module O5 and the switch moduleThe emitter of block O6 is connected and the collector of switch block O6 is connected to the emitter of switch block C2.

DC voltage source U in DC voltage boosting unit T1₁Positive pole of the DC bus and the positive pole end P of the DC bus_busConnected, diode D in DC boost unit T1_1AIs connected to the emitter of the switching module a1, diode D in the dc boost unit T1_1BIs connected to the emitter of the switching module B1, diode D in the dc boost unit T1_1CIs connected to the emitter of switching module C1.

DC voltage source U in DC voltage boosting unit T2₂Negative pole of (2) and negative pole end N of direct current bus_busConnected, diode D in DC boost unit T2_2AIs connected to the emitter of the switching module a3, diode D in the dc boost unit T2_2BIs connected to the emitter of the switching module B3, diode D in the dc boost unit T2_2CIs connected to the emitter of switching module C3.

Three-phase load Z of inverter stage 1_A1、Z_B1、Z_C1Are connected to the connection point of the switch modules a1 and a2, the connection point of the switch modules B1 and B2, and the connection point of the switch modules C1 and C2, respectively, and the other ends thereof are connected together.

Three-phase load Z of inverter stage 2_A2、Z_B2、Z_C2Are connected to the connection point of the switch modules A3 and a4, the connection point of the switch modules B3 and B4, and the connection point of the switch modules C3 and C4, respectively, and the other ends thereof are connected together.

The second technical scheme adopted for realizing the purpose of the invention is that the modulation method of the three-phase three-level double-output inverter with the boosting capability is characterized in that:

1) DC boost process, referred to as DC mode

The direct current mode is divided into a direct current mode 1 and a direct current mode 2; in the direct current mode 1, the direct current boosting unit T1 works in an effective working state, and the capacitor C is subjected to direct current₁Charging to raise the voltage; in the dc mode 2, the dc boost unit T2 operates in an active operating stateTo the capacitance C₂Charging is performed to raise the voltage thereof.

2) An inversion process, referred to as ac mode;

the alternating current mode is divided into an alternating current mode 1 and an alternating current mode 2, wherein the alternating current mode 1 is that the inverter stage 1 works in an effective working state, and the alternating current mode 2 is that the inverter stage 2 works in an effective working state; in AC mode, the capacitor C₁Capacitor C₂The dc voltage is converted into two sets of three-phase ac voltages.

3) Adopting carrier wave PWM modulation;

the carrier waves are two groups of triangular waves with the same frequency and phase and the amplitude of 1, which are stacked up and down, and the upper and lower triangular carrier waves are respectively represented by v_car1And v_car2Represents; v for three-phase modulated wave of inverter stage 1_a1 ^*、v_b1 ^*、v_c1 ^*V for three-phase modulated wave of inverter stage 2_a2 ^*、v_b2 ^*、v_c2 ^*Expressed, the expressions are:

wherein m is₁And m₂The modulation degrees of the inverter stage 1 and the inverter stage 2 respectively; omega₁And ω₂The angular frequencies of the output voltages of inverter stage 1 and inverter stage 2, respectively.

Outer envelope v of the modulated wave defining the inverter stage 1₁And the envelope v of the modulated wave of inverter stage 2₂The expressions are respectively:

v₁＝max{v_a1 ^*，v_b1 ^*，v_c1 ^*}

v₂＝min{v_a2 ^*，v_b2 ^*，v_c2 ^*}

wherein max represents taking the maximum value, and min represents taking the minimum value.

Envelope v of the modulated wave with inverter stage 1₁And the upper triangular carrier v_car1Comparing the voltage and current of the DC boost unit T1 with the voltage of the capacitor C₁The magnitude of boost of (d); outer envelope v of the modulated wave with inverter stage 2₂And the upper triangular carrier v_car2Comparing the voltage and current of the DC boost unit T2 with the voltage of the capacitor C₂The magnitude of boost in (c).

Three-phase modulated wave v with inverter stage 1_a1 ^*、v_b1 ^*、v_c1 ^*Respectively associated with upper and lower triangular carriers v_car1And v_car2Comparing, and judging the corresponding output potentials of the A phase, the B phase and the C phase of the inverter stage 1 according to the comparison result; three-phase modulated wave v with inverter stage 2_a2 ^*、v_b2 ^*、v_c2 ^*Respectively associated with upper and lower triangular carriers v_car1And v_car2Comparing, and judging the corresponding output potentials of the A phase, the B phase and the C phase of the inverter stage 2 according to the comparison result; and then according to the output potentials of the inverter stage 1 and the inverter stage 2, driving signals of the switch modules A1-A4, B1-B4, C1-C4 and O1-O6 are obtained, and two groups of three-phase alternating-current voltages with adjustable amplitudes and frequencies are output.

The invention relates to a three-phase three-level double-output inverter with boosting capacity, which adopts a direct current side to access a capacitor C₁～C₂The two groups of outputs of the inverter are respectively defined as an inverter stage 1 and an inverter stage 2, the three-phase load carried by the inverter stage 1 is Z, the switch modules A1-A4, the switch modules B1-B4, the switch modules C1-C4 and the switch modules O1-O6 are arranged in sequence, and the three-phase load carried by the inverter stage 1 is Z_A1、Z_B1、Z_C1The three-phase load of the inverter stage 2 is Z_A2、Z_B2、Z_C2The structure of (2), its beneficial effect is: the high-voltage high-capacity dual-output inverter has the advantages of small volume, low cost, reasonable structure, boosting capacity and low output voltage harmonic content, and can meet the requirements of high-voltage high-capacity dual-output inversion occasions such as a new energy power generation system, an electric automobile and rail traction. The modulation method is scientific and reasonable, the applicability is strong, and the effect is good.

Drawings

FIG. 1 is a three-phase, three-level, dual-output inverter with boost capability;

fig. 2 is a schematic diagram of an operating state 1 in the dc mode 1;

FIG. 3 is a schematic diagram of the operating state 2 in DC mode 1;

FIG. 4 is a schematic diagram of the operating state 3 in DC mode 1;

FIG. 5 is a schematic diagram of the operating state 4 in DC mode 1;

FIG. 6 is a schematic diagram of the operation state 5 in the DC mode 1;

FIG. 7 is a schematic diagram of the operating state 6 in the DC mode 1;

FIG. 8 is a schematic diagram of the operation state 7 in the DC mode 1;

FIG. 9 is a schematic diagram of the operating state 8 in DC mode 1;

fig. 10 is a schematic diagram of an operating state 1 in an alternating current mode 1;

FIG. 11 is a schematic diagram of the operating state 2 in AC mode 1;

FIG. 12 is a schematic diagram of the operating state 3 in AC mode 1;

fig. 13 is a schematic diagram of the operation state 1 in the ac mode 2;

fig. 14 is a schematic diagram of the operating state 2 in the ac mode 2;

fig. 15 is a schematic diagram of the operating state 3 in the ac mode 2;

FIG. 16 is a schematic diagram of a modulation method of carrier PWM;

fig. 17 is a schematic diagram of a boosting region of a modulation method of carrier PWM;

FIG. 18 shows the capacitance C under the first set of simulation parameters₁A voltage waveform diagram of (a);

FIG. 19 shows the capacitance C under the first set of simulation parameters₂A voltage waveform diagram of (a);

FIG. 20 is a graph of the three-phase output current waveform of inverter stage 1 under a first set of simulation parameters;

FIG. 21 is a waveform of the three-phase output current of inverter stage 2 under a first set of simulation parameters;

FIG. 22 is a drawing showingOutput line voltage u of inverse stage 1 under first set of simulation parameters_AB1A waveform diagram;

FIG. 23 shows the output line voltage u of the inverter stage 2 under a first set of simulation parameters_AB2A waveform diagram;

FIG. 24 shows the capacitance C under the second set of simulation parameters₁A voltage waveform diagram of (a);

FIG. 25 shows the capacitance C under the second set of simulation parameters₂A voltage waveform diagram of (a);

FIG. 26 is a three-phase output current waveform of inverter stage 1 under a second set of simulation parameters;

FIG. 27 is a waveform of the three-phase output current of inverter stage 2 under a second set of simulation parameters;

FIG. 28 is a graph of the output line voltage u of the inverter stage 1 under a second set of simulation parameters_AB1A waveform diagram;

FIG. 29 shows the output line voltage u of the inverter stage 2 under a second set of simulation parameters_AB2A waveform diagram;

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

As shown in fig. 1, the three-phase three-level dual-output inverter with boosting capability is formed by connecting two capacitors, two direct-current boosting units, 18 switch modules and two sets of three-phase loads, and can output two sets of three-phase alternating-current voltages with adjustable amplitudes and frequencies by applying reasonable driving signals to the switch modules. The two capacitors are respectively: capacitor C₁～C₂(ii) a The 18 switch modules are respectively: switch modules A1-A4, switch modules B1-B4, switch modules C1-C4 and switch modules O1-O6; two groups of outputs of the inverter are respectively defined as an inverter stage 1 and an inverter stage 2, and the three-phase load carried by the inverter stage 1 is Z_A1、Z_B1、Z_C1The three-phase load of the inverter stage 2 is Z_A2、Z_B2、Z_C2。

The invention discloses a modulation method of a three-phase three-level double-output inverter with boosting capacity

1) DC boost process, referred to as DC mode

The direct current mode is divided into a direct current mode 1 and a direct current mode 2; in the direct current mode 1, the direct current boosting unit T1 works in an effective working state, and the capacitor C is subjected to direct current₁Charging to raise the voltage; in the dc mode 2, the dc boost unit T2 operates in an active operating state for the capacitor C₂Charging is performed to raise the voltage thereof.

The operation principle of the dc mode 1 will be described below, and the dc mode 2 is the same. The dc mode 1 includes 8 operating states, which are respectively an operating state 1, an operating state 2, an operating state 3, an operating state 4, an operating state 5, an operating state 6, an operating state 7, and an operating state 8, as shown in fig. 2, fig. 3, fig. 4, fig. 5, fig. 6, fig. 7, fig. 8, and fig. 9.

Operating state 1 of dc mode 1: the driving signals are applied to the switching modules a1, B1, and C1, and there are 3 loops, loop 1, loop 2, and loop 3, respectively, in the dc boost unit T1. The path through which the loop 1 current flows is S of the switch module A1_A1Diode D_1AAnd an inductance L₁(ii) a The path through which the loop 2 current flows is S of the switch module B1_B1Diode D_1BAnd an inductance L₁(ii) a The path through which the loop 3 current flows is S of the switch module C1_C1Diode D_1CAnd an inductance L₁The 3 loop currents are shown in dashed lines in fig. 2. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 2 of dc mode 1: the driving signals are applied to the switching modules A1, B1 and C2 due to the diodes D_1CThe dc boost unit T1 has 2 loops, loop 1 and loop 2, because the dc boost unit is turned off when receiving a reverse voltage. The path through which the loop 1 current flows is S of the switch module A1_A1Diode D_1AAnd an inductance L₁(ii) a The path through which the loop 2 current flows is S of the switch module B1_B1Diode D_1BAnd an inductance L₁The 2 loop currents are shown in dashed lines in fig. 3. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 3 of dc mode 1: the driving signals are applied to the switching modules A1, B2 and C1 due to the diodes D_1BThe dc boost unit T1 has 2 loops, loop 1 and loop 2, because the dc boost unit is turned off when receiving a reverse voltage. The path through which the loop 1 current flows is S of the switch module A1_A1Diode D_1AAnd an inductance L₁(ii) a The path through which the loop 2 current flows is S of the switch module C1_C1Diode D_1CAnd an inductance L₁The 2 loop currents are shown in dashed lines in fig. 4. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 4 of dc mode 1: the driving signals are applied to the switching modules A2, B1 and C1 due to the diodes D_1AThe dc boost unit T1 has 2 loops, loop 1 and loop 2, because the dc boost unit is turned off when receiving a reverse voltage. The path through which the loop 1 current flows is S of the switch module B1_B1Diode D_1BAnd an inductance L₁(ii) a The path through which the loop 2 current flows is S of the switch module C1_C1Diode D_1CAnd an inductance L₁The 2 loop currents are shown in dashed lines in fig. 5. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 5 of dc mode 1: the driving signals are applied to the switching modules A1, B2 and C2 due to the diodes D_1BAnd a diode D_1CThe dc boost unit T1 is turned off by receiving a reverse voltage, and thus there is a loop, loop 1, in the dc boost unit T1. The path through which the loop 1 current flows is S of the switch module A1_A1Diode D_1AAnd an inductance L₁As shown in dashed lines in fig. 6. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 6 of dc mode 1: the driving signals are applied to the switching modules A2, B1 and C2 due to the diodes D_1AAnd a diode D_1CThe dc boost unit T1 is turned off by receiving a reverse voltage, and thus there is a loop, loop 1, in the dc boost unit T1. The current of loop 1 flows through the pathS of switch module B1_B1Diode D_1BAnd an inductance L₁As shown in dashed lines in fig. 7. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 7 of dc mode 1: the driving signals are applied to the switching modules A2, B2 and C1 due to the diodes D_1AAnd a diode D_1BThe dc boost unit T1 is turned off by receiving a reverse voltage, and thus there is a loop, loop 1, in the dc boost unit T1. The path through which the loop 1 current flows is S of the switch module C1_C1Diode D_1CAnd an inductance L₁As shown in dashed lines in fig. 8. At this time, the dc boost unit T1 is not coupled to the capacitor C₁Discharge, capacitance C₁The self voltage is maintained unchanged.

Operating state 8 of dc mode 1: the driving signals are applied to the switching modules a2, B2, and C2, and there are 3 loops, loop 1, loop 2, and loop 3, respectively, in the dc boost unit T1. The path through which the loop 1 current flows is a capacitor C₁S of switch module O1_O1D of switch module O2_O2D of switch module A2_A2Diode D_1AAnd an inductance L₁(ii) a The path through which the current flows in the loop 2 is a capacitor C₁S of switch module O3_O3D of switch module O4_O4D of switch module B2_B2Diode D_1BAnd an inductance L₁(ii) a The path through which the current flows in the loop 3 is a capacitor C₁S of switch module O5_O5D of switch module O6_O6D of switch module C2_C2Diode D_1CAnd an inductance L₁The 3 loop currents are shown in dashed lines in fig. 9. At this time, the dc boost unit T1 is coupled to the capacitor C₁Discharge, capacitance C₁The voltage rises.

From the above analysis it can be concluded that: when the switch module A1, the switch module B1 and the switch module C1 are not conducted, the DC boost unit T1 couples the capacitor C₁Discharge, capacitance C₁The voltage rises; similarly, when none of the switch module a4, the switch module B4, and the switch module C4 is turned on, the dc boost unit T2 couples the capacitor C₂Discharge, capacitance C₂The voltage rises.

2) An inversion process, referred to as ac mode;

the alternating current mode is divided into an alternating current mode 1 and an alternating current mode 2, wherein the alternating current mode 1 is that the inverter stage 1 works in an effective working state, and the alternating current mode 2 is that the inverter stage 2 works in an effective working state; in AC mode, the capacitor C₁Capacitor C₂The dc voltage is converted into two sets of three-phase ac voltages.

When the inverter stage 1 is in an effective working state, the switch module X4(X is equal to { A, B, C }) of each phase is conducted; when the inverter stage 2 is in active operation, the switch module X1(X ∈ { a, B, C }) of each phase is turned on. When the inverter operates in ac mode 1, it includes 3 operating states, which are respectively: operating state 1, operating state 2 and operating state 3, as shown in fig. 10, 11 and 12, respectively; when the inverter operates in the ac mode 2, 3 operating states are also included, respectively: the operation state 1, the operation state 2, and the operation state 3 are shown in fig. 13, fig. 14, and fig. 15, respectively. The principle of each operating state will be described below by taking phase a as an example, and B, C has the same principle.

Operating state 1 of ac mode 1: a drive signal is applied to switch module a1 such that when current flows from the inverter to the load, the current flows through the path S of switch module a1_A1And a load Z_A1As shown by the dotted line in fig. 10. At this time, the load Z_A1Is connected to the positive terminal P of the direct current bus_busAt a potential ofWhen the current flows from the load to the inverter, the path through which the current flows is the load Z_A1And D of switch module A1_A1As indicated by the long dashed line in fig. 10, when the load Z is present_A1Is still at a potential of

Operating state 2 of ac mode 1: the driving signals are applied to the switch modules A2, O1 and O2, and when current flows from the inverter to the load, the current flows through the path of the switch moduleS of Block O1_O1D of switch module O2_O2D of switch module A2_A2And a load Z_A1As shown by the dotted line in fig. 11. At this time, the load Z_A1To a dc neutral point O_busThe potential is 0; when the current flows from the load to the inverter, the path through which the current flows is the load Z_A1S of switch module A2_A2S of switch module O2_O2And D of switch module O1_O1As indicated by the long dashed line in fig. 11, when the load Z is present_A1The potential of (a) is still 0.

Operating state 3 of ac mode 1: the driving signals are applied to the switch modules a2, A3 and a4, and when a current flows from the inverter to the load, the current flows through the path D of the switch module a4_A4D of switch module A3_A3D of switch module A2_A2And a load Z_A1As shown in dotted lines in fig. 12. At this time, the load Z_A1Is connected to the negative electrode end N of the direct current bus_busAt a potential ofWhen the current flows from the load to the inverter, the path through which the current flows is the load Z_A1S of switch module A2_A2S of switch module A3_A3And S of switch module A4_A4As indicated by the long dashed line in fig. 12, when the load Z is present_A1Is still at a potential of

Operating state 1 of ac mode 2: the driving signals are applied to the switch modules a1, a2 and A3, and when a current flows from the inverter to the load, the current flows through the path S of the switch module a1_A1S of switch module A2_A2S of switch module A3_A3And a load Z_A2As shown by the dotted line in fig. 13. At this time, the load Z_A2Is connected to the positive terminal P of the direct current bus_busAt a potential ofWhen current flows from the load to the inverter, current flowsThe path being a load Z_A2D of switch module A3_A3D of switch module A2_A2And D of switch module A1_A1As indicated by the long dashed line in fig. 13, when the load Z is present_A2Is still at a potential of

Operating state 2 of ac mode 2: the driving signals are applied to the switching modules a3, O1 and O2, and when a current flows from the inverter to the load, the current flows through the path S of the switching module O1_O1D of switch module O2_O2S of switch module A3_A3And a load Z_A2As shown by the dotted line in fig. 14. At this time, the load Z_A2To a dc neutral point O_busThe potential is 0; when the current flows from the load to the inverter, the path through which the current flows is the load Z_A2D of switch module A3_A3S of switch module O2_O2And D of switch module O1_O1As indicated by the long dashed line in fig. 14, when the load Z is present_A2The potential of (a) is still 0.

Operating state 3 of ac mode 2: a drive signal is applied to switch module a4 such that when current flows from the inverter to the load, the current flows through switch module a4 at D_A4And a load Z_A2As shown by the dotted line in fig. 15. At this time, the load Z_A2Is connected to the negative electrode end N of the direct current bus_busAt a potential ofWhen the current flows from the load to the inverter, the path through which the current flows is the load Z_A2And S of switch module A4_A4As indicated by the long dashed line in fig. 15, when the load Z is present_A2Is still at a potential of

Table 1 summarizes the above analysis and lists the switch module state versus output level. In table 1, "ON" indicates that the switch module is in an ON state, and "OFF" indicates that the switch module is in an OFF stateState, "-" indicates an operating state not allowed by the switch module; "P" indicates an output of"O" represents an operating state with an output of 0, and "N" represents an operating state with an output of 0The operating state of (c).

The insulated gate bipolar transistors of the 18 switch modules of the three-phase three-level double-output inverter with the boosting capacity can also adopt other fully-controlled power semiconductor power devices. The components related to the invention are all commercial products.

TABLE 1 relationship between switch module state and output level in three-phase three-level dual-output inverter with boost capability (take phase A as an example)

3) Adopting carrier wave PWM modulation;

for the three-phase three-level dual-output inverter with the boosting capability, carrier wave PWM modulation is adopted for explanation. The carrier waves are two groups of triangular waves with the same frequency and phase and the amplitude of 1, which are stacked up and down, and the upper and lower triangular carrier waves are respectively represented by v_car1And v_car2As shown in fig. 16; v for three-phase modulated wave of inverter stage 1_a1 ^*、v_b1 ^*、v_c1 ^*V for three-phase modulated wave of inverter stage 2_a2 ^*、v_b2 ^*、v_c2 ^*Expressed by the formulas (1) and (2), respectively:

wherein m is₁And m₂The modulation degrees of the inverter stage 1 and the inverter stage 2 respectively; omega₁And ω₂The angular frequencies of the output voltages of inverter stage 1 and inverter stage 2, respectively.

As shown in fig. 17, an outer envelope v of the modulated wave of the inverter stage 1 is defined₁And the envelope v of the modulated wave of inverter stage 2₂As shown in formula (3) and formula (4), respectively:

v₁＝max{v_a1 ^*，v_b1 ^*，v_c1 ^*} (3)

v₂＝min{v_a2 ^*，v_b2 ^*，v_c2 ^*} (4)

wherein max represents taking the maximum value, and min represents taking the minimum value.

With v in FIG. 16_a1 ^*And v_a2 ^*The modulation method of carrier PWM is explained as an example (in fig. 16, the triangular carrier frequency is about 6 times the frequency of the sinusoidal modulation wave, and this multiple is large in the actual modulation). When v is_a1 ^*≥v_car1The A-phase of inverter stage 1 outputs the P-state, i.e. output, in timeAn electric potential; when v is_car2≤v_a1 ^*<v_car1In time, the A phase of the inverter stage 1 outputs an O state, namely 0 potential is output; when v is_a1 ^*<v_car2The A-phase of inverter stage 1 outputs N-states, i.e. outputsAnd (4) electric potential. When v is_a2 ^*≥v_car1The A-phase of inverter stage 2 outputs the P-state, i.e. output, in timeAn electric potential; when v is_car2≤v_a2 ^*<v_car1In time, the A phase of the inverter stage 2 outputs an O state, namely 0 potential is output; when v is_a2 ^*<v_car2The A-phase of inverter stage 2 outputs N-states, i.e. outputsAnd (4) electric potential. The driving signals of the switch modules a 1-a 4, the switch module O1 and the switch module O2 can be further obtained by the above analysis in combination with table 1. B. The same applies to phase C.

It should be noted that, due to the limitation of the three-phase three-level dual-output inverter structure with boosting capability, in order to avoid generating the invalid operating state in table 1 to distort the output waveform, the modulation waveforms of the inverter stage 1 and the inverter stage 2 should satisfy the relationship shown in formula (5).

As shown in fig. 17, the envelope v of the modulated wave using the inverter stage 1₁And the upper triangular carrier v_car1Comparison at v₁The shadow area of the upper part satisfies v₁<v_car1The phase a, the phase B and the phase C of the inverter stage 1 do not output the P state, that is, the switch module a1, the switch module B1 and the switch module C1 are not turned on. At this time, the dc boost unit T1 is coupled to the capacitor C₁Discharge, capacitance C₁The voltage rises; outer envelope v of the modulated wave with inverter stage 2₂And a lower triangular carrier v_car2Comparison at v₂The shadow area of the lower part satisfies v₂≥v_car2The inverter stage 2 does not output N states in phase a, phase B, and phase C, i.e., the switch module a4, the switch module B4, and the switch module C4 are all non-conductive. At this time, the dc boost unit T2 is coupled to the capacitor C₂Discharge, capacitance C₂The voltage rises.

In order to verify the feasibility of the three-phase three-level dual-output inverter with the boosting capacity and the effectiveness of a modulation method of carrier PWM, simulation is carried out through MATLAB/SimulinkAnd (6) verifying. The first set of simulation parameters is as follows: the carrier frequency is 10 kHz; the voltages of the two direct-current voltage sources are both 15V; the modulation degree of the inverter stage 1 is 0.7, and the frequency is 100 Hz; the modulation degree of the inverter stage 2 is 0.7, and the frequency is 100 Hz; the three-phase load resistance of the inverter stage 1 is 10 omega, and the inductance is 5 mH; the three-phase load resistance of the inverter stage 2 is 10 Ω, and the inductance is 5 mH. The second set of simulation parameters is as follows: the carrier frequency is 10 kHz; the voltages of the two direct-current voltage sources are both 15V; the modulation degree of the inverter stage 1 is 0.5, and the frequency is 120 Hz; the modulation degree of the inverter stage 2 is 0.5, and the frequency is 100 Hz; the three-phase load resistance of the inverter stage 1 is 10 omega, and the inductance is 5 mH; the three-phase load resistance of the inverter stage 2 is 10 Ω, and the inductance is 5 mH. FIG. 18 shows the capacitance C under the first set of simulation parameters after the circuit has been operated to steady state₁Voltage waveform diagram of (1) and FIG. 19 is a diagram of a capacitor C₂Fig. 20 is a waveform diagram of three-phase output current of the inverter stage 1, fig. 21 is a waveform diagram of three-phase output current of the inverter stage 2, and fig. 22 is an output line voltage u of the inverter stage 1_AB1Waveform diagram, FIG. 23 is the output line voltage u of inverter stage 2_AB2A waveform diagram; under the second set of simulation parameters, FIG. 24 shows the capacitance C₁Voltage waveform diagram of (1), FIG. 25 is a diagram of a capacitor C₂Fig. 26 is a waveform diagram of three-phase output current of the inverter stage 1, fig. 27 is a waveform diagram of three-phase output current of the inverter stage 2, and fig. 28 is an output line voltage u of the inverter stage 1_AB1Waveform diagram, fig. 29 is the output line voltage u of inverter stage 2_AB2And (4) waveform diagrams.

Although the present invention has been described in connection with the accompanying drawings, the present invention is not limited to the above-described embodiments, which are illustrative rather than restrictive, and those skilled in the art can make other forms without departing from the spirit of the present invention, which fall within the scope of the present invention.