阅读说明：本技术 一种电压放大电路、传感器以及电子设备 (Voltage amplification circuit, sensor and electronic equipment ) 是由 龚林 李月 吴艺凡 曹雪 于 2021-07-29 设计创作，主要内容包括：本公开实施例提出了一种电压放大电路、传感器以及电子设备,电压放大电路其包括差分电路,差分电路包括对称设置的第一共源电路和第二共源电路,在第一共源电路中设置第一晶体管和第三晶体管,在第二共源电路中设置第二晶体管和第四晶体管,第一晶体管的漏极与第三晶体管的源极的电连接,第一晶体管的栅极作为正向输入端,第二晶体管的漏极与第四晶体管的源极电连接,第二晶体管的栅极作为反向输入端,其特征在于,还包括反馈网络电路、直流偏置电路以及电压输出电路,在电压输出电路中设置正向输出端和反向输出端。本公开实施例能够将电路的电压放大增益提高到一百多倍,使得生产工艺的偏差对电路性能的影响大幅降低,提高了电路功能的可靠性。(The embodiment of the disclosure provides a voltage amplification circuit, a sensor and an electronic device, wherein the voltage amplification circuit comprises a differential circuit, the differential circuit comprises a first common source circuit and a second common source circuit which are symmetrically arranged, a first transistor and a third transistor are arranged in the first common source circuit, a second transistor and a fourth transistor are arranged in the second common source circuit, a drain electrode of the first transistor is electrically connected with a source electrode of the third transistor, a grid electrode of the first transistor is used as a positive input end, a drain electrode of the second transistor is electrically connected with a source electrode of the fourth transistor, and a grid electrode of the second transistor is used as a reverse input end. The voltage amplification gain of the circuit can be improved to one hundred times, so that the influence of the deviation of the production process on the circuit performance is greatly reduced, and the reliability of the circuit function is improved.)

1. A voltage amplification circuit comprises a differential circuit, wherein the differential circuit comprises a first common source circuit and a second common source circuit which are symmetrically arranged, a first transistor and a third transistor are arranged in the first common source circuit, a second transistor and a fourth transistor are arranged in the second common source circuit, the drain electrode of the first transistor is electrically connected with the source electrode of the third transistor, the grid electrode of the first transistor is used as a forward input end, the drain electrode of the second transistor is electrically connected with the source electrode of the fourth transistor, and the grid electrode of the second transistor is used as a reverse input end.

2. The voltage amplification circuit of claim 1, wherein the feedback network circuit comprises a third common-source circuit and a fourth common-source circuit, wherein a fifth transistor and a sixth transistor are arranged in the third common-source circuit, wherein a seventh transistor and an eighth transistor are arranged in the fourth common-source circuit, wherein a drain of the fifth transistor is connected to a gate of the fourth transistor, and wherein a drain of the sixth transistor is connected to a gate of the third transistor.

3. The voltage amplification circuit according to claim 2, wherein the dc bias circuit includes a first current mirror circuit and a second current mirror circuit connected to the forward input terminal and the backward input terminal, respectively, wherein a ninth transistor and a tenth transistor are provided in the first current mirror circuit, wherein an eleventh transistor and a twelfth transistor are provided in the second current mirror circuit, wherein a gate of the ninth transistor, a gate of the tenth transistor, a gate of the eleventh transistor, and a gate of the eleventh transistor are commonly connected to a transistor group, and wherein the transistor group includes at least one transistor.

4. The voltage amplification circuit of claim 3, wherein when the number of the transistors in the transistor group is plural, the plural transistors are connected in sequence, and each transistor is short-circuited in a gate to a drain.

5. The voltage amplification circuit of claim 3, wherein the voltage output circuit comprises a fifth common-source circuit and a sixth common-source circuit, the fifth common-source circuit is electrically connected with the third common-source circuit, the sixth common-source circuit is electrically connected with the fourth common-source circuit, the forward output terminal is disposed in the sixth common-source circuit, and the reverse output terminal is disposed in the fifth common-source circuit.

6. The voltage amplification circuit according to claim 5, wherein a thirteenth transistor is provided on the fifth common-source circuit, and a fourteenth transistor is provided on the sixth common-source circuit, wherein the gate of the thirteenth transistor is connected to the gate of the fifth transistor, the source thereof is connected to the drain of the ninth transistor, and the inverting output terminal is provided at the source of the thirteenth transistor; the gate of the fourteenth transistor is connected to the gate of the seventh transistor, the source of the fourteenth transistor is connected to the drain of the twelfth transistor, and the forward output terminal is disposed at the source of the fourteenth transistor.

7. The voltage amplification circuit according to claim 6, wherein the first transistor and the second transistor are transistors of a first type, wherein the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, and the transistors in the transistor group are transistors of a second type, and wherein the transistors of the first type and the transistors of the second type are both metal oxide semiconductor-thin film transistors.

8. The voltage amplifying circuit according to claim 7, wherein the metal oxide semiconductor-thin film transistor is made of a material comprising at least indium gallium zinc oxide.

9. The voltage amplification circuit of claim 7, wherein the first type of transistor has a channel width to length ratio greater than 20 and the second type of transistor has a channel width to length ratio less than 2.

10. A sensor, characterized in that it comprises at least a voltage amplification circuit according to any one of claims 1 to 9.

11. The sensor of claim 10, further comprising a sensor body, an electrostatic protection device, a filter, an analog-to-digital converter, a transmitter, and a power supply battery.

12. An electronic device comprising a substrate and the sensor of claim 10 or 11, the sensor being disposed on the substrate.

Technical Field

The present disclosure relates to the field of circuit structures, and in particular, to a voltage amplifying circuit, a sensor, and an electronic device.

Background

A Thin-Film Transistor (TFT) is a special field effect Transistor (MOSFET) made of a Thin-Film active material, and theoretically has electrical characteristics such as switching, amplification, and impedance conversion. However, since the early thin film transistors generally use amorphous silicon (a-Si) as an active material and have low electron mobility, about 1cm2/Vs, the switching characteristics thereof are mainly utilized to fabricate a backplane Array, i.e., TFT-Array, for LCD display on a glass substrate, and the TFT-Array is rarely used in integrated circuits.

In recent years, with the emergence of thin film active materials with more excellent electrical characteristics, such as metal oxide semiconductor (IGZO), the electrical characteristics of thin film transistors are greatly improved, so that the thin film transistors also have good application prospects in the field of sensors with low requirements on integration level, and particularly, for the fields with high requirements on shape adaptability and interface flexibility of electronic products, such as advanced medical care, human-computer interfaces, internet of things and the like, the thin film transistors which can be prepared on different substrates have higher flexibility and simpler preparation process than silicon-based MOSFETs.

At present, sensors applied in the fields of advanced healthcare, human-computer interface, internet of things and the like generally comprise a sensing part for sensing signals and an Analog Front-End (AFE) part for transmitting and processing signals, wherein the AFE part is mainly formed by a traditional silicon-based chip which is externally hung on a sensing device in a PCB (printed circuit board) manner. On one hand, the structure greatly reduces the flexibility of the sensor, and is not friendly to novel sensors which need to be in close contact with a sensed object, such as wearable type, surface mount type, swallow type and the like; on the other hand, the manufacturing of the sensor must be performed separately by different preparation processes and then combined, so that the production cost is high and the efficiency is low. The above problems can be solved if the AFE and the signal acquisition section can be integrated on the same substrate and have the same mechanical properties.

The amplifier circuit is a basic module of most integrated circuits, such as a comparator, an Analog-to-Digital Converter (ADC), an active filter, and the like. However, due to the intrinsic characteristics of the materials, the electron mobility of the metal oxide semiconductor (IGZO) is much higher than the mobility of the holes, and the metal oxide semiconductor does not have the characteristic that the channel polarity of the conventional single crystal silicon is changed by doping, so that many conventional amplifying circuits based on the metal oxide semiconductor-thin film transistor have a small amplification factor (for example, the amplification factor has only a single digit).

Disclosure of Invention

In view of this, embodiments of the present disclosure provide a voltage amplifying circuit, a sensor and an electronic device, so as to solve the problems in the prior art that due to intrinsic characteristics of materials, a voltage gain of an existing amplifying circuit using a metal oxide semiconductor-thin film transistor is only about several times higher than that of the prior art, and a large drain resistor needs to be introduced to increase the voltage gain, which is difficult to fabricate an integrated circuit.

In one aspect, the present disclosure provides a voltage amplifying circuit, which includes a differential circuit, where the differential circuit includes a first common source circuit and a second common source circuit that are symmetrically arranged, a first transistor and a third transistor are arranged in the first common source circuit, a second transistor and a fourth transistor are arranged in the second common source circuit, a drain of the first transistor is electrically connected to a source of the third transistor, a gate of the first transistor is used as a forward input terminal, a drain of the second transistor is electrically connected to a source of the fourth transistor, a gate of the second transistor is used as a reverse input terminal, and the voltage amplifying circuit further includes a feedback network circuit, a dc bias circuit, and a voltage output circuit, where a forward output terminal and a reverse output terminal are arranged in the voltage output circuit.

In some embodiments, the feedback network circuit includes a third common-source circuit in which fifth and sixth transistors are provided and a fourth common-source circuit in which seventh and eighth transistors are provided, a drain of the fifth transistor being connected to a gate of the fourth transistor, and a drain of the sixth transistor being connected to a gate of the third transistor.

In some embodiments, the dc bias circuit includes a first current mirror circuit and a second current mirror circuit connected to the forward input terminal and the reverse input terminal, respectively, a ninth transistor and a tenth transistor are provided in the first current mirror circuit, an eleventh transistor and a twelfth transistor are provided in the second current mirror circuit, a gate of the ninth transistor, a gate of the tenth transistor, a gate of the eleventh transistor, and a gate of the eleventh transistor are commonly connected to a transistor group, and the transistor group includes at least one transistor.

In some embodiments, when the number of the transistors in the transistor group is multiple, the transistors are connected in sequence, and each transistor is in gate-drain short circuit.

In some embodiments, the voltage output circuit includes a fifth common-source circuit electrically connected to the third common-source circuit and a sixth common-source circuit electrically connected to the fourth common-source circuit, the forward output terminal is disposed in the sixth common-source circuit, and the reverse output terminal is disposed in the fifth common-source circuit.

In some embodiments, a thirteenth transistor is disposed on the fifth common-source circuit, and a fourteenth transistor is disposed on the sixth common-source circuit, wherein a gate of the thirteenth transistor is connected to a gate of the fifth transistor, a source thereof is connected to a drain of the ninth transistor, and the inverting output terminal is disposed at a source of the thirteenth transistor; the gate of the fourteenth transistor is connected to the gate of the seventh transistor, the source of the fourteenth transistor is connected to the drain of the twelfth transistor, and the forward output terminal is disposed at the source of the fourteenth transistor.

In some embodiments, the first transistor and the second transistor are transistors of a first type, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, and the transistors in the transistor group are transistors of a second type, and the transistors of the first type and the second type are both metal oxide semiconductor-thin film transistors.

In some embodiments, the material for manufacturing the metal oxide semiconductor-thin film transistor at least comprises indium gallium zinc oxide.

In some embodiments, the first type of transistor has a channel width to length ratio greater than 20 and the second type of transistor has a channel width to length ratio less than 2.

The embodiment of the present disclosure further provides a sensor, which includes the voltage amplifying circuit in any one of the above technical solutions.

In some embodiments, the sensor further comprises a sensor body, an electrostatic protection device, a filter, an analog-to-digital converter, a transmitter and a power supply battery

Embodiments of the present disclosure also provide an electronic device, which includes a substrate and the sensor described in any of the above technical solutions.

The embodiment of the disclosure relates to a voltage amplifying circuit which is formed by taking a metal oxide semiconductor-thin film transistor as a basic unit, wherein a feedback network circuit is introduced into the voltage amplifying circuit, the voltage amplifying gain of the circuit is successfully improved to more than one hundred times under the condition of not introducing resistance, meanwhile, the thin film transistor connected with a drain gate is used as a direct current bias circuit, and only two thin film transistors with different channel sizes are used, so that the types of devices in the circuit are reduced to the maximum extent, the influence of the deviation of a production process on the circuit performance is greatly reduced, and the reliability of the circuit function is improved.

Drawings

In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments described in the present disclosure, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic structural diagram of a sensor according to an embodiment of the present disclosure;

fig. 2 is a circuit structure diagram of a voltage amplifying circuit according to an embodiment of the disclosure;

fig. 3 is a circuit structure diagram of a voltage amplifying circuit according to an embodiment of the disclosure;

fig. 4 is a circuit configuration diagram of a voltage amplifying circuit according to an embodiment of the disclosure;

fig. 5 is a circuit configuration diagram of a voltage amplifying circuit according to an embodiment of the disclosure;

fig. 6 is a circuit configuration diagram of a voltage amplifying circuit according to an embodiment of the disclosure;

FIG. 7 is a schematic diagram illustrating a time domain simulation result of a voltage amplifying circuit according to an embodiment of the disclosure;

fig. 8 is a schematic diagram of a time domain simulation result of the voltage amplifying circuit according to an embodiment of the disclosure.

The main reference numbers:

1-a sensor body; 2-an electrostatic protection device; 3-a filter; 4-an analog-to-digital converter; 5-a transmitter; 6-a power supply battery; 10-a glass substrate; 100-differential circuitry; 110 — a first common source circuit; 120-a second common source circuit; 200-a feedback network circuit; 210-a third common source circuit; 22-a fourth common source circuit; 300-a dc bias circuit; 310-a first current mirror circuit; 320-a second current mirror circuit; 400-voltage output circuit; 410-a fifth common source circuit; 420-sixth common source circuit.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described below clearly and completely with reference to the accompanying drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.

To maintain the following description of the embodiments of the present disclosure clear and concise, a detailed description of known functions and known components have been omitted from the present disclosure.

A first embodiment of the present disclosure relates to a voltage amplifying circuit, which may be used in an integrated circuit of a device such as a glass-based sensor, as shown in fig. 1, fig. 1 shows a structure of a glass-based sensor, wherein the glass-based sensor may include a sensor body 1, an electrostatic protection device 2, a filter 3, an analog-to-digital converter (ADC)4, a transmitter 5, and a power supply battery 6 for supplying power to the devices, which are connected in sequence, and the structure is mainly applied to a device such as an integrated sensor based on a glass substrate 10. Further, an amplifier 7 may be disposed in the sensor on the glass substrate, the amplifier 7 may be disposed between the electrostatic protection device 2 and the filter 3, for example, the amplifier 7 is configured to amplify the detected weak electrical signal, and the voltage amplifying circuit provided in this embodiment is a specific circuit structure related to the amplifier 7.

Specifically, the voltage amplifying circuit according to the embodiment of the present disclosure has a main structure as shown in fig. 2 and fig. 3, where fig. 2 shows a modular schematic diagram of the voltage amplifying circuit, fig. 3 shows a specific circuit structure of the voltage amplifying circuit, the voltage amplifying circuit in fig. 2 and fig. 3 includes a differential circuit 100 including an input side and an output side, where the differential circuit effectively stabilizes a static operating point by using symmetry and negative feedback action of circuit parameters, and is characterized by amplifying a differential mode signal and suppressing a common mode signal, and is widely applied to input stages of a direct coupling circuit and a measurement circuit; in this embodiment, a differential circuit with two-terminal input and two-terminal output is adopted, wherein the differential circuit with two-terminal input can realize the input of differential mode signals, specifically, the input side includes a forward input terminal Vin + and a backward input terminal Vin-, and the output side includes a forward output terminal Vout + and a backward output terminal Vout-.

Further, the voltage amplifying circuit of the embodiment of the present disclosure further includes a feedback network circuit 200, a dc bias circuit 300, and a voltage output circuit 400, wherein the forward output terminal Vout + and the reverse output terminal Vout-are disposed in the voltage output circuit, specifically, the feedback network circuit 200 is disposed in the differential circuit 100, the dc bias circuit 300 is disposed between the input side of the differential circuit 100, for example, the forward input terminal Vin + and the reverse input terminal Vin-, and the voltage output circuit 400 is disposed on the output side of the differential circuit 100.

The circuit structure of the differential circuit 100 is described in detail below, and in general, the circuit structure of a conventional voltage amplifying circuit is as shown in fig. 4(a), where the conventional voltage amplifying circuit includes two symmetrically arranged common source circuits connected to each other, where all the common source circuits in this case and this disclosure refer to circuits connected to a power supply, a transistor T1-1 and a first drain resistor R1, and a transistor T1-2 and a second drain resistor R2 are respectively arranged in the two common source circuits, a forward input terminal Vin + is located at the gate of the transistor T1-1, and a reverse input terminal Vin-is located at the gate of the transistor T1-2. The symmetrical circuit structure has the main characteristic that the differential mode signal between the positive input end Vin + and the negative input end Vin-can be amplified, and the common mode signal between the positive input end Vin + and the negative input end Vin-can be restrained. Here, the differential mode signal refers to ac signals having equal amplitudes and opposite directions, and the common mode signal refers to ac signals having equal amplitudes and equal directions.

In the conventional voltage amplifying circuit shown in fig. 4(a), the transistor T1-1 and the transistor T1-2 both use amplifying transistors, and if the channel modulation effect is neglected, the voltage gain of the conventional voltage amplifying circuit is:

A_d＝-g_mR (1)

wherein, g_mIs the transfer transconductance of the transistor T1-1 and the transistor T1-2 as an amplifier tube, and g is the current formula of a field effect transistor_mIs determined by the dc operating point of the circuit and the electron mobility μ of the transistor itself. In particular for metal oxide semiconductor thin film transistors (MOS-TFTs), μ is typically in the range of 10-100cm2/Vs, such that g_mOften in the range of 1 μ S or less, which means that a drain resistor with a resistance value of more than 10M Ω is required to achieve a larger voltage gain, i.e. the first drain resistor R1 and the second drain resistor R2 require higher resistance values, which is very difficult in practical circuit fabrication.

In order to overcome the defects in the conventional voltage amplifying circuit, a circuit structure of the differential circuit 100 adopted in the embodiment of the present disclosure is shown in fig. 4(b), where the differential circuit 100 includes a first common source circuit 110 and a second common source circuit 120, which are symmetrically arranged, a first transistor T1 and a third transistor T3 are arranged in the first common source circuit 110, and a second transistor T2 and a fourth transistor T4 are arranged in the second common source circuit 120, where the symmetrical arrangement means that the first transistor T1 is symmetrical to the second transistor T2, and the third transistor T3 is symmetrical to the fourth transistor T4, where the first transistor T1 and the second transistor T2 constitute an input pair transistor of the differential circuit 100; a gate of the first transistor T1 is a forward input terminal Vin +, a gate of the second transistor T2 is a reverse input terminal Vin-, a drain of the first transistor T1 is electrically connected to a source of the third transistor T3, the third transistor T3 is a load of the first transistor T1, a drain of the second transistor T2 is electrically connected to a source of the fourth transistor T4, and the fourth transistor T4 is a load of the second transistor T2.

In this way, the differential circuit 100 in the embodiment of the present disclosure uses a voltage amplifying circuit of a pure thin film transistor with a drain load, where the load is composed of transistors, and the operation principle is that the third transistor T3 and the fourth transistor T4 always operate in the saturation region due to the output current I of the transistor operating in the saturation region_DWith output voltage V_DSThe increase change is small, and thus, the third transistor T3 and the fourth transistor T4 can be regarded as ac resistors having large resistance values, so that the voltage gain of the circuit can be improved. In the case where the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 all operate in the saturation region in fig. 4(b), the voltage gain of the amplification circuit based on the differential circuit 100 is, in theory:

wherein, g_m1、g_m3The transfer transconductances, g, of the first transistor T1 and the third transistor T3, respectively_ds1And g_ds3The output conductances of the first transistor T1 and the third transistor T3, respectively. If the channel modulation effect is neglected, the voltage gain is mainly determined by the first transistor T1 and the third transistorThe ratio of the transfer transconductance of the tube T3. Theoretically, only different sized transistors need to be selected to achieve a large voltage gain. However, for example, the on-resistance of the third transistor T3 may be changed by the adjustment of the size, and when the on-resistance is increased to a certain degree, the dc operating point of the amplifier transistor, i.e., the first transistor T1, may be changed and thus may exit the saturation region, so that the voltage may not be normally amplified. According to the simulation results shown in fig. 7(a) and 7(b), the voltage gain of the voltage amplification circuit based on the differential circuit 100 of fig. 4(b) is not large.

In order to further raise the voltage gain of the voltage amplifier circuit, as described above, the feedback network circuit 200 is provided in the differential circuit 100, and as can be seen from the above formula (2), it is best to reduce the denominator in the expression on the right side of the symbol in formula (2) as much as possible in order to increase the voltage gain, i.e., if the third transistor T3 and the fourth transistor T4 as load transistors in fig. 4(b) are infinitely close to the off state in ac, i.e., V4_GS->0, then A_dIt will be lifted up considerably. For this, the feedback network circuit 200 may be introduced between the gates of the third transistor T3 and the fourth transistor T4 as a load tube, and if the amplification factor of the feedback network circuit 200 is set to F, the voltage gain of the voltage amplification circuit based on the differential circuit 100 and the feedback network circuit 200 at this time is:

it can be seen that, if the amplification factor F is infinitely close to 1, the denominator in the equal sign right expression of formula (3) is greatly reduced, as shown in fig. 5(b), fig. 5(b) shows a schematic circuit structure of the feedback network circuit 200, where the feedback network circuit 200 with the most easily implemented amplification factor F infinitely close to 1 may include two common-source circuits, namely a third common-source circuit 210 and a fourth common-source circuit 220, wherein a fifth transistor T5 and a sixth transistor T6 are disposed in the third common-source circuit 210, a seventh transistor T7 and an eighth transistor T8 are disposed in the fourth common-source circuit 220, and as long as the channel parameters of the fifth transistor T5 and the channel parameter of the sixth transistor T6 are the same, the ideal amplification factor F of the voltage amplification circuit according to the embodiment of the present disclosure will be 1, but the actual value of the magnification F will be slightly lower than 1 due to channel modulation effects.

Fig. 5(a) exemplarily shows the structure of the first common source circuit 210, but it should be noted that the output signal of the voltage amplifying circuit of the present embodiment is opposite in sign to the input signal, so if it is introduced to the gate of the transistor on the same side as the input stage as the load tube, the load tube is completely turned off because the gate-source voltage is negative, and thus no current flows. To this end, the drain of the fifth transistor is connected to the gate of the fourth transistor, and the drain of the sixth transistor is connected to the gate of the third transistor; as can be seen in the voltage amplifying circuit shown in fig. 3, the two output signals are equal in magnitude and opposite in direction, so that the inverted signal of each output signal is exactly in phase with the other input signal, and thus, if the output signal of the second transistor T2 is fed back to the load of the first transistor T1, i.e., the gate of the third transistor T3, through the feedback network circuit 200, the output signal is in phase with the output signal of the first transistor T1 and has an infinite amplitude; similarly, the introduction of the inverted signal of the output signal of the first transistor T1 into the load of the second transistor T2, i.e., the gate of the fourth transistor T4, can also achieve the effect of infinitely reducing the ac gate-source voltage of the fourth transistor T4, so that the voltage amplification gain of the entire voltage amplification circuit can obtain a large amplification effect according to the above equation (3).

For this reason, the feedback network circuit 200 is provided in the differential circuit 100 for increasing the voltage amplification factor, and the principle that the phases of the symmetrical output ends of the voltage amplification circuit are opposite is utilized, so that the gate-source alternating-current voltages of the transistors as the loads are close to the same, and the direct-current operating point is kept stable, therefore, the transistors as the loads are all operated in the saturation region and have large alternating-current resistance, and the voltage amplification gain of the whole voltage amplification circuit can be increased.

Further, as described above, a DC bias circuit 300 is provided on the input side of the differential circuit 100, i.e., between the positive input terminal Vin + and the negative input terminal Vin-. In this embodiment, it is assumed that all the transistors are operated at a stable dc operating point on the premise that the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are all operated in a saturation region, and that:

V_GS≥V_thand V is_DS≥V_GS-V_th

In a conventional voltage amplifying circuit, a dc operating point is generally stabilized by a current mirror circuit as shown in fig. 6(a), wherein the current mirror circuit generally includes two circuits, i.e., a reference circuit and an output circuit, wherein a transistor T2-1 is provided on the reference circuit connected to a power supply, a transistor T2-2 is provided on the output circuit, wherein channel parameters of the transistor T2-1 and the transistor T2-2 are the same, a reference resistor RF is used in the reference circuit to implement voltage division, and the reference resistor RF is connected to gates of the two transistors T2-1 and T2-2, such that a gate drain of the transistor T2-1 connected to the reference resistor RF is connected, such that an output current I on the output circuit is connected to a gate drain of the transistor T2-1, and such that_OWill be close to the reference current I_FThereby achieving the effect of stabilizing the direct current working point. For the same reason, a reference resistor RF having a large resistance value needs to be provided in the reference circuit to obtain a stable output current.

For this reason, as shown in fig. 6(b), at least one gate-drain connected transistor T2-3 may be used to replace the reference resistor RF on the basis of the existing current mirror circuit, so as to avoid introducing a large-resistance reference resistor, and thus the dc bias circuit configured in this way can well stabilize the dc operating point of each transistor in the voltage amplifying circuit.

Specifically, the dc bias circuit described above is applied to the differential circuit 100 of the present embodiment, and for this purpose, as shown in fig. 3, the dc bias circuit 300 provided in the present embodiment includes two current mirror circuits, respectively, a first current mirror circuit and a second current mirror circuit, which are respectively connected to the forward input terminal Vin + and the reverse input terminal Vin-, specifically, a ninth transistor T9 and a tenth transistor T10 are provided in the first current mirror circuit 310, and an eleventh transistor T11 and a twelfth transistor T12 are provided in the second current mirror circuit 320, wherein gates of the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the eleventh transistor T12 are connected to a transistor group, the transistor group includes at least one transistor, the transistors herein are transistors with small-sized channels operating in a saturation region, wherein if the number of the transistors in the transistor group is multiple, a gate-drain short circuit mode is adopted among a plurality of the transistors, for example, in the circuit structure of fig. 3, the transistor group herein includes a fifteenth transistor T15, a sixteenth transistor T16, a seventeenth transistor T17 and an eighteenth transistor T18, and the number of the transistors in the transistor group herein can be adjusted according to requirements.

Therefore, a direct current bias circuit is arranged in the voltage amplifying circuit, the direct current bias circuit mainly comprises a mirror current circuit and a transistor group which is composed of a plurality of small-sized channel transistors which are in gate-drain short circuit and work in a saturation region, specifically, the transistors have large on-resistance and can stably play a role of voltage division, and the mirror current circuit provides stable direct current bias for the amplifying stage and the output stage, so that the stability of the voltage amplifying circuit is improved.

Further, in order to keep the output of the voltage amplification circuit provided in the present embodiment stable and reduce the output impedance as much as possible, the present embodiment provides a voltage output circuit 400 as an output buffer on the output side of the differential circuit 100, and the forward output terminal Vout + and the reverse output terminal Vout-of the voltage amplification circuit are provided in the voltage output circuit 400.

Continuing with fig. 3, the voltage output circuit 400 includes a fifth common-source circuit 410 and a sixth common-source circuit 420, wherein a thirteenth transistor T13 is provided on the fifth common-source circuit 410, a fourteenth transistor T14 is provided on the sixth common-source circuit 420, wherein the thirteenth transistor T13 has a drain connected to a power supply, a gate connected to the gate of the fifth transistor T5 in the third common-source circuit 210 of the feedback network circuit 200, a source connected to the drain of the ninth transistor T9 in the dc bias circuit 300, and the inverting output terminal Vout — is provided at the source of the third transistor T13; the fourteenth transistor T14 has a drain connected to a power supply, a gate connected to the gate of the seventh transistor T7 in the fourth common-source circuit 220, a source connected to the drain of the twelfth transistor T12, and the forward output terminal Vout + is disposed at the source of the fourteenth transistor T14. Therefore, the common-drain voltage output circuit is introduced into the two output stages of the voltage amplifying circuit, and the functions of stabilizing voltage output and reducing output resistance can be achieved.

Specifically, the first transistor T1 and the second transistor T2 are transistors of a first type, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13, the fourteenth transistor T14, and the transistors in the transistor group are transistors of a second type, and the transistors of the first type and the transistors of the second type are both metal oxide semiconductor-thin film transistors. Furthermore, the material for manufacturing the metal oxide semiconductor-thin film transistor at least comprises indium gallium zinc oxide, and certainly can also comprise other metal oxides.

Here, the first-type transistor and the second-type transistor are distinguished by a channel width-to-width ratio, in which the channel width-to-length ratio of the first-type transistor is greater than 20, and the channel width-to-length ratio of the second-type transistor is less than 2. Only two transistors with different channel sizes are used, the types of devices in the circuit are reduced to the greatest extent, the influence of the deviation of the production process on the circuit performance is greatly reduced, and the reliability of the circuit function is improved.

Fig. 7(a) and 8(a) are time domain simulation results of two kinds of voltage amplifying circuits, respectively, the upper curve representing an input signal, i.e., a sinusoidal signal having an amplitude of 1uV and a frequency of 100Hz, and the lower curve representing an output signal. It can be seen that the amplification factor of the amplifying circuit represented by fig. 7(a) is less than 2, and the amplification gain of the voltage amplifying circuit of the present embodiment represented by fig. 8(a) exceeds 100.

Fig. 7(b) and fig. 8(b) are the frequency response simulation results of the two voltage amplifying circuits, respectively, and the amplification factor and the frequency response bandwidth of the two voltage amplifying circuits can be clearly seen. Although the frequency bandwidth of the amplifying circuit introduced with the positive feedback network is narrower than that of the traditional grid-drain connected circuit, the frequency response bandwidth of 1kHz can meet the requirement of signal acquisition in most sensor fields. The single-stage amplification gain exceeds 100, and the method has important significance for amplifying weak and small signals or designing an operational amplification circuit with higher gain.

A second embodiment of the present disclosure provides a sensor comprising the voltage amplification circuit described in any one of the embodiments above. The sensor here may be any type of sensor used in the fields of advanced healthcare, human-machine interface, and internet of things, and generally consists of a sensing part sensing signals and an Analog Front-End (AFE) part transmitting processed signals.

Further, the sensor also comprises a sensor body, an electrostatic protection device, a filter, an analog-to-digital converter, a transmitter and a power supply battery.

A third embodiment of the present disclosure provides an electronic device comprising a substrate and a sensor as described in any of the above embodiments, where the electronic device may employ any type of sensor according to different technical fields, the sensor being disposed on the substrate.

The embodiment of the disclosure relates to a voltage amplifying circuit which is formed by taking a metal oxide semiconductor-thin film transistor as a basic unit, wherein a feedback network circuit is introduced into the voltage amplifying circuit, the voltage amplifying gain of the circuit is successfully improved to more than one hundred times under the condition of not introducing resistance, meanwhile, the thin film transistor connected with a drain gate is used as a direct current bias circuit, and only two thin film transistors with different channel sizes are used, so that the types of devices in the circuit are reduced to the maximum extent, the influence of the deviation of a production process on the circuit performance is greatly reduced, and the reliability of the circuit function is improved.

The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the disclosure herein is not limited to the particular combination of features described above, but also encompasses other embodiments in which any combination of the features described above or their equivalents does not depart from the spirit of the disclosure. For example, the above features and (but not limited to) the features disclosed in this disclosure having similar functions are replaced with each other to form the technical solution.

Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limitations on the scope of the disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.

Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

While the present disclosure has been described in detail with reference to the embodiments, the present disclosure is not limited to the specific embodiments, and those skilled in the art can make various modifications and alterations based on the concept of the present disclosure, and the modifications and alterations should fall within the scope of the present disclosure as claimed.