Integrated passive device packaging structure and manufacturing method thereof and substrate
阅读说明:本技术 集成无源器件封装结构及其制作方法和基板 (Integrated passive device packaging structure and manufacturing method thereof and substrate ) 是由 陈先明 冯磊 黄本霞 谢炳森 洪业杰 于 2020-06-29 设计创作,主要内容包括:本申请公开了一种集成无源器件封装结构及其制作方法和基板,该方法包括步骤:提供带有埋芯空腔和金属柱的有机框架,在有机框架上表面层压至少一层第一介质,并对至少一层第一介质进行光刻形成开口,开口对应设置在埋芯空腔上方;通过开口贴装电子元件至埋芯空腔,电子元件包括上电极和下电极,分别位于埋芯空腔的上部和下部;层压第二介质至埋芯空腔内部以及第一介质上表面并固化;减薄第一介质和第二介质,露出上电极、下电极以及金属柱的上下表面;电镀金属,形成线路层,线路层与上电极、下电极和金属柱连通。本申请可以提升单位面积内无源器件的排布密度,缩短布线距离,实现无源器件的集成封装。(The application discloses an integrated passive device packaging structure, a manufacturing method thereof and a substrate, wherein the method comprises the following steps: providing an organic frame with a core-embedded cavity and a metal column, laminating at least one layer of first medium on the upper surface of the organic frame, and photoetching at least one layer of first medium to form an opening, wherein the opening is correspondingly arranged above the core-embedded cavity; mounting an electronic element to the core embedding cavity through the opening, wherein the electronic element comprises an upper electrode and a lower electrode which are respectively positioned at the upper part and the lower part of the core embedding cavity; laminating a second medium to the inner part of the embedded core cavity and the upper surface of the first medium and curing; thinning the first dielectric and the second dielectric to expose the upper electrode, the lower electrode and the upper and lower surfaces of the metal column; and electroplating metal to form a circuit layer, wherein the circuit layer is communicated with the upper electrode, the lower electrode and the metal column. The application can improve the arrangement density of the passive devices in unit area, shorten the wiring distance and realize the integrated packaging of the passive devices.)
1. A manufacturing method of an integrated passive device packaging structure is characterized by comprising the following steps:
providing an organic frame with a core-embedded cavity and a metal column, laminating at least one layer of first medium on the upper surface of the organic frame, and photoetching the at least one layer of first medium to form an opening, wherein the opening is correspondingly arranged above the core-embedded cavity;
mounting an electronic element to the embedded core cavity through the opening, wherein the electronic element comprises an upper electrode and a lower electrode which are respectively positioned at the upper part and the lower part of the embedded core cavity;
laminating a second medium to the inside of the embedded core cavity and the upper surface of the first medium, solidifying, thinning the first medium and the second medium, and exposing the upper electrode, the lower electrode and the upper and lower surfaces of the metal column;
And electroplating metal to form a circuit layer, wherein the circuit layer is communicated with the upper electrode, the lower electrode and the metal column.
2. The method of fabricating an integrated passive device package structure of claim 1, further comprising: and respectively forming a metal seed layer on the upper surface and the lower surface of the organic frame, wherein the metal seed layer covers the upper electrode, the lower electrode and the surface of the metal column.
3. The method of fabricating an integrated passive device package structure of claim 2, further comprising: and etching the metal seed layer, depositing a solder mask on the upper surface and the lower surface, and photoetching the solder mask to form an electrode window of the circuit layer.
4. The method of claim 1, wherein the number of the embedded cavity, the metal pillar and the electronic component is at least one.
5. The method for manufacturing the integrated passive device package structure of claim 4, wherein the electronic component is one or more in type.
6. The integrated passive device package structure fabrication method of claim 1, wherein thinning the first dielectric and the second dielectric comprises at least one of:
Thinning the first medium and the second medium in a plasma etching mode;
thinning the first medium and the second medium in a plate grinding and polishing mode;
thinning the first medium and the second medium in a laser drilling mode;
and thinning the first medium and the second medium in any combination of plasma etching, plate grinding and polishing and laser drilling.
7. The method of claim 1, wherein the opening is a stepped opening.
8. The method for manufacturing an integrated passive device package structure according to any one of claims 1 to 7, further comprising connecting a plurality of the organic frames by laminating a plurality of layers of the second dielectric and etching and electroplating metal posts and wiring layer forming connectors on each layer of the second dielectric to realize a multi-layer electronic component package.
9. An integrated passive device package structure, comprising:
at least one layer of organic frame, the organic frame comprises at least one core-embedded cavity and at least one metal column;
the electronic element is vertically attached in the core embedding cavity and comprises an upper electrode and a lower electrode which are respectively positioned at the upper part and the lower part of the core embedding cavity;
And the circuit layer covers the upper surface and the lower surface of the organic frame and is communicated with the upper electrode, the lower electrode and the metal column.
10. A substrate comprising the integrated passive device package structure of claim 9.
Technical Field
The application relates to the technical field of semiconductor packaging, in particular to an integrated passive device packaging structure, a manufacturing method thereof and a substrate.
Technical Field
With the continuous development of microelectronic technology, the demand for high-density packaging technology is increasing, and the demand for high-density packaging technology requires that a large number of elements are arranged and mounted on the surface of a printed circuit board and high-precision patterns and thin multi-layer manufacturing are performed.
At present, all embedded components on the market are horizontally arranged in a board, and the length size of the components is large, so that the density of the components in a unit surface area is relatively limited, and the requirements of miniaturization and integration of a packaging substrate cannot be met.
Content of application
The present application is directed to solving, at least to some extent, one of the technical problems in the related art. To this end, the present application provides an integrated passive device package structure, a method of fabricating the same, and a substrate, and the following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims. The technical scheme is as follows:
In a first aspect, an embodiment of the present application provides a method for manufacturing an integrated passive device package structure, including the following steps:
providing an organic frame with a core-embedded cavity and a metal column, laminating at least one layer of first medium on the upper surface of the organic frame, and photoetching the at least one layer of first medium to form a stepped opening, wherein the stepped opening is correspondingly arranged above the core-embedded cavity;
mounting an electronic element to the core-embedding cavity through the stepped opening, wherein the electronic element comprises an upper electrode and a lower electrode which are respectively positioned at the upper part and the lower part of the core-embedding cavity;
laminating a second medium to the inside of the embedded core cavity and the upper surface of the first medium, solidifying, thinning the first medium and the second medium, and exposing the upper electrode, the lower electrode and the upper and lower surfaces of the metal column;
and electroplating metal to form a circuit layer, wherein the circuit layer is communicated with the upper electrode, the lower electrode and the metal column.
According to the manufacturing method of the integrated passive device packaging structure of the embodiment of the first aspect of the application, at least the following beneficial effects are achieved: on the first hand, the passive electronic element is vertically implanted into the substrate, so that the arrangement distance of the electronic element in the horizontal direction is greatly reduced, the arrangement density of the substrate in unit area is improved, the wiring distance is shortened, the capacity of the electronic element in unit area is increased, and the miniaturization of the packaging substrate is realized; in the second aspect, the passive electronic elements of different models and sizes can be simultaneously integrated and packaged, and diversification and integration of substrate functions are improved.
Optionally, in an embodiment of the present application, the method further includes: and respectively forming a metal seed layer on the upper surface and the lower surface of the organic frame, wherein the metal seed layer covers the upper electrode, the lower electrode and the metal surface.
Optionally, in an embodiment of the present application, the method further includes: and removing the photosensitive barrier layer, etching the metal seed layer, depositing a solder mask layer on the upper surface and the lower surface, and photoetching the solder mask layer to form an electrode window of the circuit layer.
Optionally, in an embodiment of the present application, the number of the core embedded cavity, the number of the metal pillar, and the number of the electronic element are at least one.
Optionally, in an embodiment of the present application, the electronic component is one or more kinds.
Optionally, in an embodiment of the present application, the manner of thinning the first medium and the second medium includes at least one of:
thinning the first medium and the second medium in a plasma etching mode;
thinning the first medium and the second medium in a plate grinding and polishing mode;
thinning the first medium and the second medium in a laser drilling mode;
And thinning the first medium and the second medium in any combination of plasma etching, plate grinding and polishing and laser drilling.
Optionally, in an embodiment of the present application, the opening is a stepped opening.
Optionally, in an embodiment of the present application, the method further includes connecting a plurality of the organic frames by laminating a plurality of layers of second dielectrics and etching and electroplating metal pillars and line layers to form connectors on each layer of the second dielectrics to realize a multi-layer electronic component package.
In a second aspect, an embodiment of the present application provides an integrated passive device package structure, including:
the organic framework comprises at least one embedded core cavity, at least one metal column and an organic medium filled in the organic framework;
the electronic element is vertically attached in the core embedding cavity and comprises an upper electrode and a lower electrode which are respectively positioned at the upper part and the lower part of the core embedding cavity;
and the circuit layer covers the upper surface and the lower surface of the organic frame and is communicated with the upper electrode, the lower electrode and the metal column.
According to the integrated passive device packaging structure of the embodiment of the second aspect of the application, at least the following beneficial effects are achieved: according to the packaging substrate, the passive electronic elements are vertically implanted into the substrate, so that the arrangement distance of the electronic elements in the horizontal direction is greatly reduced, the arrangement density of the substrate in unit area is improved, the wiring distance is shortened, the capacity of the electronic elements in unit area is increased, and the miniaturization of the packaging substrate is realized; in the second aspect, the passive electronic elements of different models and sizes can be simultaneously integrated and packaged, and diversification and integration of substrate functions are improved.
In a third aspect, embodiments of the present application provide a substrate including the integrated passive device package structure as described in the second aspect above.
The substrate according to the embodiment of the third aspect of the present application has at least the following beneficial effects: according to the packaging substrate, the passive electronic elements are vertically implanted into the substrate, so that the arrangement distance of the electronic elements in the horizontal direction is greatly reduced, the arrangement density of the substrate in unit area is improved, the wiring distance is shortened, the capacity of the electronic elements in unit area is increased, and the miniaturization of the packaging substrate is realized; in the second aspect, the passive electronic elements of different models and sizes can be simultaneously integrated and packaged, and diversification and integration of substrate functions are improved.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the claimed subject matter and are incorporated in and constitute a part of this specification, illustrate embodiments of the subject matter and together with the description serve to explain the principles of the subject matter and not to limit the subject matter.
Fig. 1 is a flowchart illustrating steps of a method for fabricating an integrated passive device package structure according to an embodiment of the present application;
fig. 2 to 8 are cross-sectional views of an intermediate state of a method for fabricating an integrated passive device package structure according to another embodiment of the present application;
fig. 9 is a cross-sectional view of an integrated passive device package structure provided by another embodiment of the present application.
Fig. 10-19 are cross-sectional views of an integrated passive device package structure fabrication method in an intermediate state, according to another embodiment of the present application;
fig. 20 is a cross-sectional view of an integrated passive device package structure provided by another embodiment of the present application.
The
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the embodiments described herein are merely illustrative and not restrictive, and therefore do not represent any changes in the technical spirit, structure, proportion, or size which may occur or which may not affect the performance or objectives achieved thereby, and are intended to be covered by the teachings herein.
Reference will now be made in detail to the present embodiments of the present application, preferred embodiments of which are illustrated in the accompanying drawings, which are for the purpose of visually supplementing the description with figures and detailed description, so as to enable a person skilled in the art to visually and visually understand each and every feature and technical solution of the present application, but not to limit the scope of the present application.
In the description of the present application, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and larger, smaller, larger, etc. are understood as excluding the present number, and larger, smaller, inner, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
Referring to fig. 1 and 3, a method for manufacturing a capacitor-inductor embedded structure according to an embodiment of the present application includes the following steps:
step S100, providing an
Step S200, the
Step S300, laminating and curing a
The
Step S400, electroplating metal to form a
It should be noted that, compared to the conventional horizontal embedded structure of the
Referring to fig. 2 to 20, another embodiment of the present application further provides a method for manufacturing an integrated passive device package structure, as shown in fig. 10, continuing to attach
Based on the manufacturing method of the integrated passive device packaging structure, various embodiments of the integrated passive device packaging structure are provided.
Referring to fig. 9, another embodiment of the present application further provides an integrated passive device package structure including an
In an embodiment, the
Another embodiment of the present application also provides a substrate including the integrated passive device package structure as in any of the above embodiments.
While the preferred embodiments of the present invention have been described, the present invention is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and such equivalent modifications or substitutions are included in the scope of the present invention defined by the claims.