阅读说明：本技术 实时时钟装置 (Real-time clock device ) 是由 臼田俊也 于 2021-03-15 设计创作，主要内容包括：提供实时时钟装置,即使在由于作用于焊料的应力而产生裂纹的情况下,也提高了实现所需功能的可能性。构成如下的实时时钟装置,其具有封装,该封装收纳振子、振荡电路、计时电路和功能电路,并形成有外部端子,所述外部端子包含：高电位电源端子,其与高电位电源连接；低电位电源端子,其与低电位电源连接；计时信号端子,其至少用于所述计时电路的控制；以及功能信号端子,其用于所述功能电路的控制,在所述外部端子排列的方向上,所述功能信号端子配置在所述高电位电源端子、所述低电位电源端子以及所述计时信号端子的外侧,该实时时钟装置还具有切换电路,该切换电路对所述功能信号端子和所述功能电路连接的状态和不连接的状态进行切换。(Provided is a real-time clock device which has an improved possibility of realizing a desired function even when cracks are generated due to stress acting on solder. A real-time clock device is configured to have a package in which a vibrator, an oscillation circuit, a timer circuit, and a functional circuit are housed, and an external terminal is formed, the external terminal including: a high-potential power supply terminal connected to a high-potential power supply; a low potential power supply terminal connected to the low potential power supply; a timing signal terminal at least for control of the timing circuit; and a functional signal terminal for controlling the functional circuit, the functional signal terminal being disposed outside the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal in a direction in which the external terminals are arranged, and the real-time clock device further includes a switching circuit for switching a state in which the functional signal terminal and the functional circuit are connected to each other and a state in which the functional signal terminal and the functional circuit are not connected to each other.)

1. A real time clock apparatus, having:

a vibrator;

an oscillation circuit that oscillates the oscillator;

a timing circuit for performing timing based on a signal from the oscillation circuit to generate timing information;

a function circuit that performs information processing based on the timing information; and

a package in which the vibrator, the oscillation circuit, the timer circuit, and the functional circuit are housed and external terminals are formed,

the external terminal includes:

a high-potential power supply terminal connected to a high-potential power supply;

a low potential power supply terminal connected to the low potential power supply;

a timing signal terminal at least for control of the timing circuit; and

a functional signal terminal for control of the functional circuit,

the functional signal terminal is disposed outside the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal in a direction in which the external terminals are arranged,

the real-time clock device further has a switching circuit that switches a state in which the functional signal terminal and the functional circuit are connected and a state in which they are not connected.

2. The real time clock apparatus of claim 1,

the external terminals are arranged on at least two opposite sides of the package in a planar view,

the functional signal terminal is any of the external terminals located at four corners of the package when viewed in plan.

3. A real time clock apparatus as claimed in claim 1 or 2,

the functional circuit is as follows: storing the timing information into a memory upon a voltage level transition of a signal input to the functional signal terminal.

4. A real time clock apparatus as claimed in claim 1 or 2,

the functional circuit is as follows: and outputting an interrupt signal to the functional signal terminal at a timing based on the timing information.

5. A real time clock apparatus as claimed in claim 1 or 2,

the real time clock device also has a non-volatile memory,

the switching circuit switches between a connected state and a disconnected state of the functional signal terminal and the functional circuit according to switching information stored in the nonvolatile memory.

6. A real time clock apparatus as claimed in claim 1 or 2,

the switching circuit is set to a state in which the functional signal terminal and the functional circuit are not connected to each other during a predetermined time period from the start of power supply to the high-potential power supply terminal,

after the predetermined time has elapsed, the switching circuit is set to a state in which the functional signal terminal and the functional circuit are connected.

7. A real time clock apparatus as claimed in claim 1 or 2,

the switching circuit is set in a state where the functional signal terminal and the functional circuit are not connected to each other during a period from when power supply to the high-potential power supply terminal is started until a predetermined command signal is input to the clock signal terminal,

when the predetermined command signal is input, the switching circuit is set to a state in which the functional signal terminal and the functional circuit are connected.

Technical Field

The present invention relates to a real time clock device.

Background

Conventionally, a real-time clock generating timing information by a timing circuit is known. The real time clock is used for various purposes. For example, applications such as an event recorder for recording timing information when an event occurs, and an interrupt output for outputting a signal corresponding to the elapse of a specific period are known. The former is, for example, patent document 1, and the latter is, for example, patent document 2. In addition, as such, a configuration is known in which functions of a real-time clock and various purposes are realized by a circuit in one package.

Patent document 1: japanese patent laid-open publication No. 2009-26169

Patent document 2: japanese laid-open patent publication No. 2009-32142

In a configuration in which a circuit having a real-time clock and other functions is realized by one package, an external terminal is generally provided in the package, and signals used in the respective circuits are input and output based on the external terminal. The package is mounted on the substrate by soldering the external terminals to the substrate. In such mounting with solder, there is a possibility that cracks may occur due to stress acting on the solder. Thus, the real-time clock device may not function properly due to poor connection of the external terminals.

Disclosure of Invention

The real-time clock device for solving the above problems includes: a vibrator; an oscillation circuit that oscillates the oscillator; a timing circuit for performing timing based on a signal from the oscillation circuit to generate timing information; a function circuit that performs information processing based on the timing information; and a package that houses the vibrator, the oscillation circuit, the timer circuit, and the functional circuit and is formed with an external terminal, the external terminal including: a high-potential power supply terminal connected to a high-potential power supply; a low potential power supply terminal connected to the low potential power supply; a timing signal terminal at least used for controlling the timing circuit; and a functional signal terminal for controlling the functional circuit, the functional signal terminal being disposed outside the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal in a direction in which the external terminals are arranged, the real-time clock device further having a switching circuit for switching a state in which the functional signal terminal and the functional circuit are connected to each other and a state in which the functional signal terminal and the functional circuit are not connected to each other.

Drawings

Fig. 1 is a block diagram of a real-time clock device according to an embodiment of the present invention.

Fig. 2 is a diagram showing an example of arrangement of external terminals.

Fig. 3 is a diagram showing a state where the real-time clock device according to the embodiment of the present invention is mounted on a substrate together with a schematic view of an internal configuration of the real-time clock device.

Fig. 4 is a block diagram of a real-time clock device according to an embodiment of the present invention.

Description of the reference symbols

1: a real-time clock device; 10: an oscillation circuit; 20: a timing circuit; 20 a: a frequency dividing circuit; 20 b: a timing section; 30: a switching circuit; 31: a switching circuit; 40: a functional circuit; 40 a: an event detection circuit; 40 b: a control circuit; 40 c: a counter; 41: a functional circuit; 50: setting a register; 60: a memory; 70: an input/output processing circuit; 80: a constant voltage circuit; 90: a power-on detection circuit.

Detailed Description

Here, the embodiments of the present invention will be described in the following order.

(1) Structure of the real-time clock device:

(2) other embodiments are as follows:

(1) structure of the real-time clock device:

fig. 1 is a block diagram showing a configuration of a real-time clock device 1 according to embodiment 1. The real-time clock device 1 of the present embodiment is a device configured by housing a vibrator Os and an IC (Integrated Circuit) in a package Pk. In fig. 1, the external terminals are schematically represented by squares overlapping the sides of a rectangle representing the package Pk. The external terminals are contacts provided on the package Pk and are soldered to pads of the substrate.

Fig. 2 is a diagram showing a state of the package Pk as viewed from the back surface side. The back surface is a surface facing the mounting surface of the substrate in a state of being mounted on the substrate. In fig. 2, the external terminals are shown colored gray. That is, the package Pk of the present embodiment has a substantially rectangular parallelepiped appearance, and the external terminal T is formed on the lower surface thereof₁～T₁₀。

In this embodimentIn the formula, when the shape of the back surface of the package Pk is regarded as a rectangle externally connected to the back surface, the external terminal T₁～T₁₀The 5 arrays are arranged on two opposite sides of the rectangle and are arranged along each side. In fig. 2, a rectangle circumscribing the back surface is indicated by a broken line. In the external terminal T thus constituted₁～T₁₀Middle and four corner external terminal T₁、T₅、T₆、T₁₀External terminals T existing outside these external terminals₂、T₃、T₄、T₇、T₈、T₉Outside of (a). In FIG. 1, four corner external terminals T₁、T₅、T₆、T₁₀Schematically shown as a square overlapping the left side of the package Pk. In addition, the external terminal T existing inside₂、T₃、T₄、T₇、T₈、T₉Schematically shown as a square overlapping the right side of the package Pk.

The real-time clock device 1 of the present embodiment has a function of an event recorder in addition to a time counting function. To realize these functions, the real-time clock device 1 has an oscillation circuit 10, a timer circuit 20, a switching circuit 30, a function circuit 40, a setting register 50, a memory 60, an input/output processing circuit 70, a constant voltage circuit 80, and a power-on detection circuit 90.

The constant voltage circuit 80 generates a constant voltage to be supplied to each circuit based on a power supply voltage supplied from the high-potential power supply terminal Vdd shown in fig. 1. The generated constant voltage is used for operations of the oscillation circuit 10, the timer circuit 20, the functional circuit 40, and the like. In addition, the high-potential power supply terminal Vdd is one of the external terminals of the package Pk. In the package Pk, a low-potential power supply terminal GND serving as a ground terminal is also provided as an external terminal. The low-potential power supply terminal may be a terminal to which a negative power supply potential is connected.

The power supply on detection circuit 90 is a circuit that detects whether or not power is turned on to the high potential power supply terminal Vdd. That is, when a predetermined power supply voltage is applied to the high-potential power supply terminal Vdd, the power-on detection circuit 90 outputs a signal indicating that the power supply is turned on to the switching circuit 30 after a predetermined time has elapsed. The elapse of the predetermined time may be determined by various methods, for example, the elapse of the predetermined time may be determined by a counter, or a signal output in response to the power-on may be delayed by a predetermined time and output to the switching circuit 30, and various configurations may be employed.

The oscillation circuit 10 is a circuit for vibrating the oscillator Os. That is, the oscillator Os is connected to the oscillation circuit 10, and when an electric signal is input from the oscillation circuit 10, it oscillates at a constant frequency. Then, the oscillation circuit 10 amplifies the signal of the oscillator Os and outputs an oscillation signal, and outputs a signal having the same frequency as the oscillation frequency of the oscillator Os as a source oscillation.

In the present embodiment, the resonator Os is a quartz resonator using quartz as a substrate material, and for example, an X-cut tuning fork type quartz resonator is used. The vibrator Os may be an AT-cut or SC-cut quartz vibrator, or may be a SAW (Surface Acoustic Wave) resonator or a MEMS (Micro Electro Mechanical Systems) vibrator. As a substrate material of the resonator Os, in addition to quartz, piezoelectric single crystals such as lithium tantalate and lithium niobate, piezoelectric materials such as piezoelectric ceramics such as lead zirconate titanate, silicon semiconductor materials, and the like can be used. As the excitation means of the vibrator Os, an excitation means based on a piezoelectric effect may be used, or electrostatic driving based on coulomb force may be used.

The timing circuit 20 is connected to the subsequent stage of the oscillation circuit 10. The timer circuit 20 includes a frequency divider circuit 20a and a timer unit 20 b. The frequency divider circuit 20a is a circuit that divides the frequency of the source oscillator input from the oscillator circuit 10 and outputs a signal having a frequency of 1[ Hz ]. The timer unit 20b generates timing information indicating the current time based on the output of the frequency divider circuit 20 a. That is, the timer unit 20b counts the 1 Hz signal output from the frequency divider circuit 20a, and counts the year, month, day, week, hour, minute, and second. Thus, the timer circuit 20 obtains the current time of year, month, day, week, hour, minute, and second, and stores the current time as the timer information.

The switching circuit 30 is connected to the external terminal Tf shown in fig. 1, and can switch the connection destination of the external terminal Tf. In this embodiment, either the node Nu or the ground node pulled up by the pull-up resistance Ri is a connection destination. In the present embodiment, the switching circuit 30 is controlled by the power-on detection circuit 90. That is, when a signal indicating that the power is turned on is output from the power-on detection circuit 90, the switching circuit 30 connects the external terminal Tf to the node Nu. In this case, the functional circuit 40 connected to the node Nu operates in response to a signal input from the external terminal Tf. Therefore, in the present embodiment, the external terminal Tf is a function signal terminal. The external terminal Tf, which is a function signal terminal in the present embodiment, is used for controlling the function circuit 40, but is not used for controlling the timer circuit 20.

In the case where a signal indicating that the power is turned on is not output from the power-on detection circuit 90, the switching circuit 30 connects the external terminal Tf to the ground node. In this case, the functional circuit 40 connected to the node Nu is in a state where it does not perform an operation corresponding to a signal to the external terminal Tf. As described above, the power supply on detection circuit 90 outputs a signal indicating that the power supply is on after a predetermined time period has elapsed from the start of the power supply to the high-potential power supply terminal Vdd. Therefore, the power-on detection circuit 90 is set to a state in which the external terminal Tf (function signal terminal) is not connected to the function circuit 40 for a predetermined time from the start of power supply, and is set to a state in which the external terminal Tf is connected to the function circuit 40 after the predetermined time has elapsed.

With the above configuration, it is possible to prevent an unexpected signal from being input to the functional circuit 40 from the external terminal Tf immediately after the power supply of the real-time clock device 1 or various electronic apparatuses connected to the substrate, which are unstable in operation, is turned on. Further, it is possible to prevent an unexpected signal from being output from the functional circuit 40 to the external terminal Tf.

The function circuit 40 includes an event detection circuit 40a and a control circuit 40 b. The event detection circuit 40a is connected to the external terminal Tf of the real-time clock device 1 by switching of the switching circuit 30 when a predetermined period has elapsed after the power is turned on. The event detection circuit 40a turns on an event occurrence flag (flag) when the voltage level of the signal input to the external terminal Tf transitions. Thereby, the event detection circuit 40a detects the occurrence of an event.

The control circuit 40b is connected to the timer unit 20b and the subsequent stage of the event detection circuit 40 a. The control circuit 40b is connected to the setting register 50 and the memory 60. The control circuit 40b performs various processes such as reading data from the event detection circuit 40a or the timer unit 20b, and writing timing information (event information) indicating the time at which the occurrence of an event is detected into the memory 60. The write address of the timing information may be predetermined or may be specified.

The memory 60 is a storage medium that stores information, and has an event storage area and a general storage area. The event storage area is an area for recording event information, and the general storage area is an area for recording data used by a user.

The setting register 50 stores recording bit setting data, an event detection period, and timing information output instruction data. The event detection cycle is set at an interval at which the control circuit 40b checks whether or not the event detection circuit 40a detects the occurrence of an event. That is, the control circuit 40b checks whether or not an event is present in the event detection cycle, and records event information in the memory 60 when the event occurrence flag is on.

The timing information output instruction data is information indicating that there is no instruction for outputting timing information. The timer unit 20b outputs the instruction data with reference to the timer information at a predetermined cycle, and writes the timer information into the memory 60 when the output of the timer information is instructed. The write address of the timing information may be predetermined or may be specified.

The recording bit setting data is data for setting necessary bits (recording bits) so that only necessary bits of the year, month, day, week, hour, minute, and second are recorded in the memory 60 when the time is recorded in the memory 60. For example, each bit of the recording bit setting data is 1 bit, and "no recording" may be performed if "0" is set, and "recording" may be performed if "1" is set. Further, each bit of the 7-bit recording bit number setting data may be set to "record" or "not record". As a more specific example, when only the bits of the hour and minute are recorded as the recording bits in the memory 60 from the time data of year, month, day, week, hour, minute, and second stored in the timer circuit 20, the time bit and the minute bit may be set to "1", and the other bits may be set to "0". The control circuit 40b and the timer unit 20b refer to the data to set the resolution of the time.

The input/output processing circuit 70 is connected to the setting register 50 and the memory 60, and is connected to an external terminal SDATA and an external terminal SCLK of the real-time clock device 1. The input/output processing circuit 70 serves as an input/output interface and operates in synchronization with a clock signal input from the external terminal SCLK. That is, the input/output processing circuit 70 can input data for rewriting the contents of the setting register 50 from the external terminal SDATA and output the data to the setting register 50.

The input/output processing circuit 70 is capable of outputting data such as event information recorded in the memory 60 to the outside of the external terminal SDATA. That is, in the present embodiment, the input/output processing circuit 70 can be based on I²The C standard performs input and output of data. In this embodiment, the input/output processing circuit 70 passes through I²In the C-standard communication, the bit of the timing information to be clocked by the timing circuit 20 can be controlled by writing the recording bit setting data into the setting register 50.

In addition, the input/output processing circuit 70 passes through I²The communication of the C standard writes an event detection cycle into the setting register 50, thereby controlling the cycle in which the control circuit 40b refers to the event occurrence flag. In the case where the event occurrence flag is on, the control circuit 40b stores the event information into the memory 60. When the event information is recorded in the memory 60, the input/output processing circuit 70 passes through I²In the C-standard communication, event information is output from the external terminal SDATA.

Further, the input/output processing circuit 70 passes through I²The communication of the C standard writes the timing information output instruction data into the setting register 50, thereby causing the timing unit 20b to output the timing information. When recording the timing information in the memory 60, the input/output processing circuit 70 passes through I²Communication of C standard, from outsideThe terminal SDATA outputs timing information.

As described above, in the present embodiment, the external terminal SDATA and the external terminal SCLK control the bit of the timing information and the output timing of the timing information, etc., which are clocked by the timing circuit 20. Therefore, in the present embodiment, the external terminal SDATA and the external terminal SCLK are timing signal terminals. The timing signal terminal may be used at least for controlling the timing circuit, and may also be used for controlling the functional circuit 40. In the present embodiment, the external terminal SDATA and the external terminal SCLK are also used for control of the function circuit 40. On the other hand, in the present embodiment, the external terminal Tf as a function signal terminal is not used for the control of the timer circuit 20.

The real-time clock device 1 of the present embodiment as described above is mounted by soldering each external terminal to a pad on a substrate. Fig. 3 is a cross-sectional view showing a state where the real-time clock device 1 is mounted on the substrate Sb together with a schematic view of the internal structure of the real-time clock device 1. The package Pk houses the vibrator Os and the IC. A part of the vibrator Os is fixed to the package Pk, and the other part is floated as shown in fig. 3. The IC is mounted in a recess in the package Pk and is electrically connected to a wiring in the package Pk by a bonding wire or the like, for example. An external terminal T is provided on the back surface of the package Pk₁～T₁₀. External terminal T₁～T₁₀The terminals provided on the substrate Sb are electrically and mechanically connected to each other by solder Sd.

The real-time clock device 1 is used to record timing information to the memory 60 and output it via the external terminal SDATA. The real-time clock device 1 is connected to the substrate, and records event information indicating the occurrence timing of an event occurring in an external device connected to the external terminal Tf in the memory 60 and outputs the event information via the external terminal SDATA.

In the present embodiment, in the real-time clock device 1 as described above, the connection destination is selected in accordance with the physical arrangement of the external terminals. That is, the functional signal terminal used for the control of the functional circuit 40 but not used for the control of the timer circuit 20 is configured to be located outside the timer signal terminal, the high-potential power supply terminal Vdd, and the low-potential power supply terminal GND.

Specifically, the external terminal Tf as the functional signal terminal is the external terminal T₁～T₁₀In the four corners of the external terminal T₁、T₅、T₆、T₁₀Any external terminal of (1). The high potential power supply terminal Vdd and the low potential power supply terminal GND, and the external terminal SDATA and the external terminal SCLK as the timing signal terminals are the external terminal T₂、T₃、T₄、T₇、T₈、T₉Any external terminal of (1).

In the present embodiment, the external terminal T is used₁～T₁₀The respective substrates are soldered to mount the real time clock device 1 thereon. In this state, for example, when the ambient temperature changes, stresses of different magnitudes act on the external terminals due to the difference in thermal expansion coefficient between the package Pk and the substrate. As shown in fig. 2, when a plurality of external terminals are arranged along the sides of a rectangle constituting the rear surface of the package Pk, the stress increases as the external terminal located on the outer side. That is, the position farther from the center of gravity of the real-time clock device 1 is, the larger the displacement due to thermal expansion is, and therefore, a large stress is applied to the external terminal.

Therefore, the solder joined to the external terminal located on the outer side is more likely to crack than the solder joined to the external terminal located on the inner side. If a crack is generated, a connection failure may occur. Therefore, in the present embodiment, the clock signal terminal for controlling the clock circuit 20 that realizes the clock function, which is the basic function of the real-time clock device 1, is disposed inside the high-potential power supply terminal Vdd and the low-potential power supply terminal GND. Further, the four corners on the outer side are provided with functional signal terminals for controlling the functional circuit 40 using the clock function of the real-time clock device 1, but not for controlling the clock circuit 20.

According to the above configuration, even if a crack is generated in the solder joining the external terminal and the substrate to cause a connection failure, the possibility that the function of the timer circuit 20 cannot be used can be made lower than the possibility that the function of the functional circuit 40 cannot be used. Therefore, even after a stress of a degree of cracking is applied to the solder, the possibility that the basic function of the real-time clock device 1 can be used can be improved. That is, the possibility that the real-time clock device 1 cannot perform a desired function can be reduced.

The functional signal terminal may be located outside the high-potential power supply terminal Vdd, the low-potential power supply terminal GND, the external terminal SDATA, and the external terminal SCLK. Therefore, the present invention is not limited to the structure in which the external terminals as the functional signal terminals are the external terminals located at the four corners. For example, the following structure may be adopted: the external terminal T is composed of a high-potential power supply terminal Vdd, a low-potential power supply terminal GND, an external terminal SDATA and an external terminal SCLK₂、T₃、T₇、T₈In the case where the functional signal terminal is the external terminal T₁、T₄、T₆、T₉。

(2) Other embodiments are as follows:

the above embodiments are examples for implementing the present invention, and various other embodiments may be adopted. For example, the functional circuit 40 is not limited to a circuit that functions as an event recorder. Further, the function circuit 40 may be capable of executing a plurality of functions. Fig. 4 is a diagram showing a configuration of the real-time clock device 1 in which a circuit for realizing an interrupt output function is added to the configuration shown in fig. 1. The interrupt output function is a function of outputting an interrupt signal to an external terminal of the real-time clock device 1 at a predetermined timing.

In the configuration shown in fig. 4, a function circuit 41 and a switching circuit 31 are added to the configuration shown in fig. 1. The functional circuit 41 has a counter 40 c. The counter 40c counts the 1 Hz signal output from the frequency divider 20a, and outputs an interrupt signal indicating the elapse of a predetermined period when the period has elapsed.

The switching circuit 31 is connected to the external terminal Tf2 shown in fig. 4, and can switch the connection destination of the external terminal Tf 2. In the present embodiment, either the counter 40c or the ground node is a connection destination. The switching circuit 31 is controlled by the power-on detection circuit 90. That is, when the signal indicating that the power is turned on is output from the power-on detection circuit 90, the switching circuit 31 connects the external terminal Tf2 to the counter 40 c.

In this case, the interrupt signal output from the counter 40c is output to the external terminal Tf 2. Therefore, another device connected to the external terminal Tf2 of the real-time clock device 1 can determine that a predetermined period has elapsed from the start of counting, based on the signal output from the external terminal Tf 2. In the present embodiment, the external terminal Tf2 is an output terminal of the interrupt signal output from the functional circuit 41 and is used for controlling the functional circuit 40, but is not used for controlling the timer circuit 20. Therefore, the external terminal Tf2 is a function signal terminal.

In the real-time clock device 1 shown in fig. 4, the external terminal Tf and the external terminal Tf2 connected to the functional circuit 40 and the functional circuit 41 and used for controlling these functional circuits are terminals disposed outside. For example, the external terminal Tf used as the functional signal terminal and the external terminal Tf2 are the external terminals T₁、T₅、T₆、T₁₀The structure of any external terminal in (1). In this case, the high-potential power supply terminal Vdd and the low-potential power supply terminal GND, and the external terminal SDATA and the external terminal SCLK as the timing signal terminals are the external terminal T₂、T₃、T₄、T₇、T₈、T₉Any external terminal of (1).

With the above configuration, even after a stress of a degree of cracking is applied to the solder, the possibility of using the basic function of the real-time clock device 1 can be improved. That is, the possibility that the real-time clock device 1 cannot perform a desired function can be reduced. The external terminals Tf and Tf2 may be selected from positions other than four corners, as long as they are located outside the high-potential power supply terminal Vdd and the low-potential power supply terminal GND, and the external terminals SDATA and the external terminal SCLK as the timing signal terminals.

The switching circuit may be any circuit as long as it can switch between a state in which the functional signal terminal and the functional circuit are connected and a state in which the functional signal terminal and the functional circuit are not connected. The timing of switching is not limited to the timing after a predetermined period of time has elapsed from the start of power supply as in the above-described embodiment.

For example, whether or not the function of the function circuit 40 can be used may be set from the outside of the real-time clock device 1. As a configuration for this purpose, for example, in the configuration shown in fig. 1 or 4, the memory 60 is configured by a nonvolatile memory, and switching is performed based on the storage information stored in the memory 60.

That is, the input/output processing circuit 70 can store switching information indicating whether or not the function circuit is used at a predetermined address in the memory 60 based on a signal from an external device. When the switching information indicates the use of the functional circuit, the switching circuits 30 and 31 switch the switches so that the external terminals Tf and Tf2, which are functional signal terminals, are connected to the functional circuits 40 and 41. On the other hand, in the case where the switching information does not indicate the use of the functional circuit, the switching circuits 30, 31 switch the switches so that the external terminals Tf, Tf2 as the functional signal terminals and the functional circuits 40, 41 are not connected.

According to the above structure, the product can pass through I²The communication of the C standard enables the functional circuits 40, 41 to be available or unavailable, with an instruction of the apparatus or the user that the switching information is recorded in the memory 60. Therefore, for example, the user can switch the availability function circuits 40 and 41 according to the specification of the function required by the user. The manufacturer of the real-time clock device 1 can switch the availability of the functional circuits 40 and 41 before shipment according to the specifications of functions required by the user at the shipment destination. If the specification does not use the functions of the functional circuits 40 and 41, the functions are stopped, and thus even if cracks occur in the solder corresponding to the external terminals Tf and Tf2, adverse effects on the circuits due to the cracks can be prevented.

Further, in the configuration in which the functional circuit cannot be used until a predetermined trigger is generated after the start of the power supply to the high-potential power supply terminal, the trigger is not limited to the elapse of a predetermined period. For example, the following structure is also possible: in the configuration shown in fig. 1 and 4, a predetermined command for switching the switching circuits 30 and 31 is prepared, and switching is performed when the command is input to the real-time clock device 1.

Specifically, for example, when a predetermined command is input to the input/output processing circuit 70 through the external terminal SDATA and the external terminal SCLK which are timing signal terminals, the input/output processing circuit 70 is configured to output a signal instructing switching to the switching circuits 30 and 31. In the switching circuits 30 and 31, the state in which the function signal terminal and the function circuit are not connected is switched to the state in which the function signal terminal and the function circuit are connected in accordance with a signal indicating the switching.

According to the above structure, the user passes through I²The communication of the C standard inputs a predetermined command to the real-time clock device 1, thereby enabling or disabling the functional circuits 40, 41. Therefore, for example, the functional circuits 40 and 41 cannot be used at the stage when the power supply to the real-time clock device 1 is started, but the functional circuits 40 and 41 can be used after the user inputs a predetermined command.

Therefore, it is possible to prevent an unexpected signal from being input to the functional circuit 40 from the external terminals Tf and Tf2 immediately after the power supply of the real-time clock device 1 or various electronic apparatuses connected to the board, which are unstable in operation, is turned on. Further, it is possible to prevent an unexpected signal from being output from the functional circuit 40 to the external terminals Tf and Tf 2.

The time counting circuit is a circuit for generating time counting information, and the functional circuit may be any circuit for performing information processing based on the time counting information. That is, the real-time clock device can generate at least the time information. The timing information can be used for various purposes by using a timing signal terminal. On the other hand, the real-time clock device includes a functional circuit for a purpose other than the generation of the timing information. That is, the functional circuit may perform information processing based on the time information. This information processing is not limited to the information processing for the event recorder as in the above-described embodiment, and may be any other information processing for interrupting the output.

The package may house the vibrator, the oscillation circuit, the timer circuit, and the functional circuit, and an external terminal may be formed. Of course, other circuits, elements, and the like may be accommodated. The external terminal can be used for signal transmission and reception, power transmission and reception, and the like inside and outside the package, and can be formed according to any application.

The external terminals include a high-potential power supply terminal, a low-potential power supply terminal, a timing signal terminal, and a functional signal terminal. The timing signal terminal may be used at least for controlling the timing circuit, and may also be used for controlling the functional circuit. E.g. terminals or I of the above SPI standard²The C-standard terminal corresponds to a timing signal terminal used for control of the timing circuit.

The clock signal terminal may be used at least for controlling the clock circuit, and may be used for at least one of input and output of various signals, or may be used for various controls, synchronization, and the like, such as an enable signal and a clock signal.

The functional signal terminal is a terminal for control of the functional circuit. For example, a terminal used for control of a functional circuit but not directly used for control of a timer circuit corresponds to a functional signal terminal. That is, the terminal required for controlling the timing circuit is not a functional signal terminal but a timing signal terminal.

In the direction in which the external terminals are arranged, the functional signal terminal may be arranged outside the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal. That is, when comparing the functional signal terminal, the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal, the functional signal terminal is always arranged outside the other terminals. When the external terminals are arranged along the side of the package, the end portion side of the arranged terminals is regarded as the outside, and thereby it can be defined whether the external terminals are located outside or inside. That is, the high-potential power supply terminal, the low-potential power supply terminal, and the clock signal terminal are not present outside any functional signal terminal. In addition, the outer side may also be defined as being located relatively far from the center of gravity of the package when viewed in plan. For example, when the shape of the back surface of the package is regarded as a rectangle circumscribing the back surface, the center of gravity may be an intersection of diagonal lines of the rectangle. For example, as shown in fig. 2, the external terminal is viewed from a direction perpendicular to the bottom surface of the real-time clock device 1 in a plan view.

The switching circuit may be any circuit as long as it can switch between a state in which the functional signal terminal and the functional circuit are connected and a state in which the functional signal terminal and the functional circuit are not connected. That is, the switching circuit may be capable of switching between a usable state and a non-usable state of the functional circuit. When the package is mounted on the substrate by solder, the external terminals are connected to pads or the like on the substrate by solder, respectively. When the substrate is forced to twist, etc., the solder is forced to each external terminal. When comparing the stresses acting on the external terminals in a state where the external terminals are arranged in a straight line, the stress of the outer terminal (near the end) is larger than the stress of the inner terminal.

Therefore, the external terminal located on the outer side is more likely to be cracked than the external terminal located on the inner side. Therefore, the functional signal terminal disposed outside is more likely to cause a connection failure due to solder cracking than the other terminals. Even when a connection failure occurs, the functional circuit can be set to a state where it is not used by switching the switching circuit.