Solar cell and solar cell module
阅读说明:本技术 太阳能单电池和太阳能电池组件 (Solar cell and solar cell module ) 是由 上山知纪 于 2020-03-23 设计创作,主要内容包括:本发明提供一种具有改善了光电转换特性的异质结结构的太阳能单电池。太阳能单电池(1)包括:晶体类的硅基片(10);形成在硅基片(10)的主面上的、含有磷作为杂质的P掺杂硅氧化物层(50);非晶硅层(60),其具有形成在P掺杂硅氧化物层(50)上的本征非晶硅层(61)、和形成在本征非晶硅层(61)上的含有p型掺杂剂的p型非晶硅层(62)。而且,本征非晶硅层(61)含有p型掺杂剂,本征非晶硅层(61)的厚度方向上的p型掺杂剂的浓度具有比P掺杂硅氧化物层(50)与本征非晶硅层(61)的界面上的p型掺杂剂的浓度高的分布。(The invention provides a solar cell having a heterojunction structure with improved photoelectric conversion characteristics. A solar cell (1) is provided with: a crystalline silicon substrate (10); a P-doped silicon oxide layer (50) formed on the main surface of the silicon substrate (10) and containing phosphorus as an impurity; and an amorphous silicon layer (60) having an intrinsic amorphous silicon layer (61) formed on the P-doped silicon oxide layer (50), and a P-type amorphous silicon layer (62) containing a P-type dopant formed on the intrinsic amorphous silicon layer (61). The intrinsic amorphous silicon layer (61) contains a P-type dopant, and the concentration of the P-type dopant in the thickness direction of the intrinsic amorphous silicon layer (61) has a higher profile than the concentration of the P-type dopant at the interface between the P-doped silicon oxide layer (50) and the intrinsic amorphous silicon layer (61).)
1. A solar cell module, comprising:
a crystalline silicon substrate;
a phosphorus doped layer formed on a main surface of the silicon substrate and containing phosphorus as an impurity; and
an amorphous silicon layer having an intrinsic amorphous silicon layer formed on the phosphorus doped layer and a p-type amorphous silicon layer containing a p-type dopant formed on the intrinsic amorphous silicon layer,
the intrinsic amorphous silicon layer contains the p-type dopant,
the concentration of the p-type dopant in the thickness direction of the intrinsic amorphous silicon layer has a higher profile than the concentration of the p-type dopant at the interface of the phosphorus-doped layer and the intrinsic amorphous silicon layer.
2. The solar cell as claimed in claim 1, wherein:
the distribution has a maximum point in a range of 20% or more and 50% or less of the thickness of the amorphous silicon layer from the interface.
3. The solar cell as claimed in claim 1, wherein:
the distribution has a maximum point in a range of 2nm or more and 10nm or less from the interface.
4. A solar cell as claimed in claim 2 or 3, wherein:
the concentration of the p-type dopant at the maxima is 1 × 1017/cm3Above and 1 × 1020/cm3The following.
5. The solar cell as claimed in claim 1, wherein:
the profile monotonically increases moving from the interface toward the p-type amorphous silicon layer.
6. A solar cell module, comprising:
a plurality of solar cells according to any one of claims 1 to 5 arranged in a two-dimensional shape;
a front surface protection member disposed on a front surface side of the plurality of solar cells;
a rear surface protection member disposed on a rear surface side of the plurality of solar cells;
a front surface filling member disposed between the plurality of solar cells and the front surface protection member; and
and a backside filling member disposed between the plurality of solar cells and the backside protection member.
Technical Field
The present invention relates to a solar cell and a solar cell module.
Background
Disclosure of Invention
Problems to be solved by the invention
However, in the solar cell, further improvement of the photoelectric conversion characteristics is desired.
The present invention has been made to solve the above problems, and an object thereof is to provide a solar cell and a solar cell module having a heterojunction structure with improved photoelectric conversion characteristics.
Means for solving the problems
In order to achieve the above object, a solar cell according to an embodiment of the present invention includes: a crystalline silicon substrate; a phosphorus doped layer formed on the main surface of the silicon substrate and containing phosphorus as an impurity; and an amorphous silicon layer including an intrinsic amorphous silicon layer formed on the phosphorus-doped layer and a p-type amorphous silicon layer containing a p-type dopant formed on the intrinsic amorphous silicon layer, wherein the intrinsic amorphous silicon layer contains the p-type dopant, and a concentration of the p-type dopant in a thickness direction of the intrinsic amorphous silicon layer has a higher profile than a concentration of the p-type dopant at an interface between the phosphorus-doped layer and the intrinsic amorphous silicon layer.
In order to achieve the above object, a solar cell module according to an embodiment of the present invention includes: a plurality of solar cells according to any one of
ADVANTAGEOUS EFFECTS OF INVENTION
According to the present invention, a solar cell and a solar cell module having a heterojunction structure with improved photoelectric conversion characteristics can be provided.
Drawings
Fig. 1 is a schematic plan view of a solar cell module according to an embodiment.
Fig. 2 is a structural sectional view in the column direction of the solar cell module of the embodiment.
Fig. 3 is a plan view of the solar cell of the embodiment.
Fig. 4 is a schematic cross-sectional view showing a laminated structure of solar cells according to the embodiment.
Fig. 5 is a graph showing an example of the boron concentration distribution in the thickness direction of the intrinsic amorphous silicon layer.
Fig. 6 is a flowchart showing an example of the method for manufacturing a solar cell according to the embodiment.
Fig. 7 is a schematic diagram for explaining an example of the method for manufacturing a solar cell according to the embodiment.
Fig. 8 is a flowchart showing another example of the method for manufacturing a solar cell according to the embodiment.
Fig. 9 is a schematic diagram for explaining another example of the method for manufacturing a solar cell according to the embodiment.
Fig. 10 is a graph showing another example of the boron concentration distribution in the thickness direction of the intrinsic amorphous silicon layer.
Description of the reference numerals
1 solar cell
10 silicon substrate
60 amorphous silicon layer
61. 161 intrinsic amorphous silicon layer
50P doped silicon oxide layer (phosphorus doped layer)
62 p type amorphous silicon layer
100 solar cell module
170A face-filling member
170B backside filling member
180A front protection component
180B backside protection component
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The embodiments described below all show a specific example of the present invention. Therefore, the numerical values, shapes, materials, constituent elements, arrangement of constituent elements, connection modes, steps (steps), and the order of the steps (steps) and the like shown in the following embodiments are examples and are not intended to limit the present invention. Therefore, among the components of the following embodiments, components not described in the independent claims are all described as arbitrary components.
Each of the drawings is a schematic diagram and is not necessarily strictly illustrated. In the drawings, substantially the same components are denoted by the same reference numerals, and redundant description thereof may be omitted or simplified.
In the present specification, the "front surface" of the solar cell means a surface on which light can enter more into the interior than the "back surface" that is the surface on the opposite side (50% to 100% of light enters into the interior from the front surface), and also includes a case where light does not enter into the interior at all from the "back surface" side. The "front surface" of the solar cell module refers to a surface on which light can be incident on the side opposite to the "front surface" of the solar cell, and the "back surface" refers to the opposite side. The phrase "the 2 nd member is provided on the 1 st member" and the like does not mean that the 1 st and 2 nd members are provided in direct contact with each other unless otherwise specified. That is, this description includes the case where there is another member between the 1 st and 2 nd members.
In the present specification, terms indicating the relationship between elements such as parallel, terms indicating the shape of elements such as square, numerical values and numerical value ranges do not mean only expressions in a strict sense, but also expressions in which substantially equivalent ranges, for example, differences of about several% are included.
In each drawing, the Z-axis direction is, for example, a direction perpendicular to the light receiving surface of the solar cell. The X-axis direction and the Y-axis direction are directions orthogonal to each other and to the Z-axis direction. For example, in the following embodiments, "plan view" means a view seen from the Z-axis direction.
(embodiment mode)
Next, the solar cell and the solar cell module according to the present embodiment will be described with reference to fig. 1 to 9.
[1. Structure of solar cell Module ]
First, the structure of the solar cell module will be described with reference to fig. 1. Fig. 1 is a schematic plan view of a
As shown in fig. 1, the
The
The
The jumper wire 130 is a wire member for connecting the solar cell strings. The solar cell string is an assembly of a plurality of
The frame 150 is an outer frame member that covers the outer periphery of the panel in which the plurality of
Further, the light diffusion member may be disposed between the adjacent
As shown in fig. 2, in two
The
The conductive adhesive may be a solder material. In addition, a resin adhesive containing no conductive particles may be used instead of the conductive adhesive. In this case, by appropriately designing the coating thickness of the resin adhesive, the resin adhesive is softened at the time of pressing at the time of thermocompression bonding, and the main grid electrode and the
As shown in fig. 2, a front
The front surface
The back
The front
The front
In addition, the front
[2. Structure of solar cell ]
Next, a
As shown in fig. 3, the
As shown in fig. 4, the
The silicon substrate 10 is a crystal-type silicon substrate having a 1 st main surface and a 2 nd main surface facing away from each other. In the present embodiment, the silicon substrate 10 is an n-type single crystal silicon substrate. Alternatively, the silicon substrate 10 may be made of polysilicon. The 1 st main surface and the 2 nd main surface may have a texture structure in which a plurality of pyramids are arranged in a two-dimensional shape. In addition, the P-doped silicon oxide layer 50 is disposed on the 2 nd main surface of the silicon substrate 10.
The amorphous silicon layer 30 is a 1 st amorphous silicon layer disposed on the 1 st main surface of the silicon substrate 10 and in a substantially amorphous state. The amorphous silicon layer 30 has an intrinsic amorphous silicon layer 31 and an n-type amorphous silicon layer 32.
The intrinsic amorphous silicon layer 31 is formed on the 1 st main surface of the silicon substrate 10, and is in an amorphous state containing hydrogen, for example. Here, the intrinsic amorphous silicon layer meansAn amorphous semiconductor layer containing a p-type or n-type dopant at a concentration lower than that of the p-type or n-type dopant contained in the n-type amorphous silicon layer 32 or the p-type amorphous silicon layer 62 the intrinsic amorphous silicon layer contains, for example, a p-type or n-type dopant at an average concentration of 5 × 1018/cm3Hereinafter, or when both p-type and n-type dopants are included, the sum of the dopant concentrations of p-type and n-type dopants is 5 × 1018/cm3The following amorphous semiconductor layer. The intrinsic amorphous silicon layer 31 is preferably thinned to suppress light absorption as much as possible, and thickened to such an extent that the front surface of the silicon substrate 10 is sufficiently passivated. The intrinsic amorphous silicon layer 31 has a film thickness of, for example, 1nm to 25nm, preferably 5nm to 10 nm.
The n-type amorphous silicon layer 32 is a 1 st conductive type amorphous silicon layer formed on the intrinsic amorphous silicon layer 31 and containing an n-type dopant of the same conductivity type as the silicon substrate 10. the n-type amorphous silicon layer 32 is formed of, for example, an amorphous silicon semiconductor thin film containing hydrogen. the n-type amorphous silicon layer 32 has a higher concentration of the n-type dopant in the film than the intrinsic amorphous silicon layer 31, and the n-type dopant concentration is preferably 1 × 1020/cm3The above. The n-type dopant is, for example, phosphorus (P).
The n-type amorphous silicon layer 32 is preferably thinned to suppress absorption of light as much as possible, and thickened to such an extent that carriers generated in the silicon substrate 10 are effectively separated and the generated carriers are efficiently collected by the transparent electrode 40. The thickness of the n-type amorphous silicon layer 32 is, for example, 2nm to 50 nm. In the present embodiment, the thickness of the n-type amorphous silicon layer 32 is 10 nm. The n-type amorphous silicon layer 32 may be configured such that the n-type dopant concentration changes stepwise from the intrinsic amorphous silicon layer 31 side to the transparent electrode 40 side.
The P-doped silicon oxide layer 50 is a silicon layer formed on the 2 nd main surface of the silicon substrate 10 and containing phosphorus as an impurity. The P-doped silicon oxide layer 50 is, for example, a silicon oxide layer disposed on the 2 nd main surface of the silicon substrate 10, and is formed of a silicon oxide film containing phosphorus as an impurity. The P-doped silicon oxide layer 50 is, for example, a region doped to the same conductivity type as the silicon substrate 10. The thickness of the P-doped silicon oxide layer 50 is 1 μm or less, for example, 200 nm. Alternatively, the P-doped silicon oxide layer 50 may be formed in an island shape at the interface between the silicon substrate 10 and the amorphous silicon layer 60. The P-doped silicon oxide layer 50 is an example of a phosphorus-doped layer. The P-doped silicon oxide layer 50 is not limited to one containing phosphorus, and may be an n-type conductive impurity doped layer doped with an n-type conductive impurity.
The P-doped silicon oxide layer 50 has a higher phosphorus concentration (phosphorus atom concentration) than the silicon substrate 10, and is, for example, 1 × 1017/cm3Above and 1 × 1020/cm3Hereinafter, more preferably 1 × 1018/cm3Above and 1 × 1019/cm3In addition, the P-doped silicon oxide layer 50 contains oxygen, for example, having an oxygen concentration (oxygen atom concentration) of 1 × 1020/cm3Above and 1 × 1022/cm3Hereinafter, more preferably 1 × 1020/cm3Above and 1 × 1021/cm3The following. In addition, the P-doped silicon oxide layer 50 may be an amorphous layer. By forming the P-doped silicon oxide layer 50 as an amorphous layer, formation at a low temperature of, for example, 200 ℃. In addition, the P-doped silicon oxide layer 50 can increase the phosphorus concentration several times as compared with the case where it is formed on the main surface having a textured structure, by being formed on the main surface having no textured structure of the silicon substrate 10.
In order to increase the open circuit Voltage (VOC), it is important to ensure a high degree of amorphousness of the amorphous silicon layer 60 in addition to suppressing recombination of carriers caused by impurity doping. From this viewpoint, by interposing a silicon oxide layer between the amorphous silicon layer 60 and the silicon substrate 10, epitaxial growth reflecting the crystallinity of the silicon substrate 10 can be suppressed in the amorphous silicon layer 60. In addition, since the P-doped silicon oxide layer 50 is interposed at the junction interface instead of the impurity, the increase of defects on the front surface of the silicon substrate 10 can be suppressed. That is, the passivation property is improved. This can increase the open circuit voltage. Further, by having the P-doped silicon oxide layer 50, the breakdown voltage can be reduced, and the photoelectric conversion characteristics can be suppressed from being degraded when the
The amorphous silicon layer 60 is a 2 nd amorphous silicon layer disposed on the 2 nd main surface of the silicon substrate 10 and in a substantially amorphous state. The amorphous silicon layer 60 has an intrinsic amorphous silicon layer 61 formed on the P-doped silicon oxide layer 50 and a P-type amorphous silicon layer 62 containing a P-type dopant formed on the intrinsic amorphous silicon layer 61.
The intrinsic amorphous silicon layer 61 is formed on the 2 nd main surface of the silicon substrate 10, and is in an amorphous state containing hydrogen, for example. The thickness of the intrinsic amorphous silicon layer 61 is, for example, 1nm to 25nm, preferably 5nm to 10nm, as in the intrinsic amorphous silicon layer 31. In the present embodiment, the thickness of the intrinsic amorphous silicon layer 61 is 10 nm.
The intrinsic amorphous silicon layer 61 is formed by laminating a 1 st intrinsic amorphous silicon layer 61a, a boron-introduced layer 61b, and a 2 nd intrinsic amorphous silicon layer 61 c. The 1 st intrinsic amorphous silicon layer 61a is formed to be stacked on the front surface of the P-doped silicon oxide layer 50. A p-type amorphous silicon layer 62 is stacked on the front surface of the 2 nd intrinsic amorphous silicon layer 61 c. The boron-introduced layer 61b is disposed so as to be sandwiched between the 1 st intrinsic amorphous silicon layer 61a and the 2 nd intrinsic amorphous silicon layer 61 c.
The 1 st and 2 nd intrinsic amorphous silicon layers 61a and 61c are intrinsic amorphous semiconductor layers formed without doping boron (B). The boron-introduced layer 61b is an amorphous semiconductor layer formed by doping boron. Thus, the intrinsic amorphous silicon layer 61 contains boron. Here, the boron content means that the intrinsic amorphous silicon layer 61 is made to intentionally contain boron. Further, boron is an example of the p-type dopant, but the p-type dopant is not limited to boron.
When the thickness of the intrinsic amorphous silicon layer 61 is 10nm, for example, the thickness of the 1 st intrinsic amorphous silicon layer 61a is 2nm, the thickness of the boron-introduced layer 61b is 4nm, and the thickness of the 2 nd intrinsic amorphous silicon layer 61c is 4 nm.
The p-type amorphous silicon layer 62 is a 2 nd conductive type amorphous silicon layer formed on the intrinsic amorphous silicon layer 61 and containing a p-type dopant having a conductivity opposite to that of the silicon substrate 10, the p-type amorphous silicon layer 62 is formed of, for example, an amorphous silicon semiconductor thin film containing hydrogen, the p-type amorphous silicon layer 62 has a higher concentration of the p-type dopant in the film than the intrinsic amorphous silicon layer 61, and the concentration of the p-type dopant is preferably set to 1 × 1020/cm3The above. The p-type dopant is, for example, boron (B).The p-type amorphous silicon layer 62 is preferably thinned to suppress absorption of light as much as possible, and thickened to such an extent that carriers generated in the silicon substrate 10 are effectively separated and the generated carriers are efficiently collected by the transparent electrode 70. The p-type amorphous silicon layer 62 may be configured such that the concentration of the p-type dopant changes stepwise from the silicon substrate 10 side to the transparent electrode 70 side.
In addition, the intrinsic amorphous silicon layer 31, the intrinsic amorphous silicon layer 61, the n-type amorphous silicon layer 32, and the p-type amorphous silicon layer 62 may include microcrystals.
The transparent electrode 40 is formed on the front surface of the amorphous silicon layer 30, and collects carriers in the n-type amorphous silicon layer 32. The transparent electrode 70 is formed on the back surface of the amorphous silicon layer 60, and collects carriers in the p-type amorphous silicon layer 62. The transparent electrodes 40 and 70 are transparent conductive films (TCO films) composed of transparent conductive materials. The transparent electrodes 40 and 70 are formed of, for example, a transparent conductive oxide such as Indium Tin Oxide (ITO). In addition, the transparent electrodes 40 and 70 preferably contain indium oxide (In) having a polycrystalline structure, for example2O3) Zinc oxide (ZnO), tin oxide (SnO)2) And titanium oxide (TiO)2) And the like. These metal oxides may be doped with a dopant such as tin (Sn), zinc (Zn), tungsten (W), antimony (Sb), titanium (Ti), aluminum (Al), cerium (Ce), gallium (Ga), etc., and In is particularly preferable2O3In which ITO is doped with Sn. The concentration of the dopant can be set to 0 to 20 mass%.
It is optional whether the 1 st principal surface side of the silicon substrate 10 is a light receiving surface (a surface into which light is mainly introduced from the outside) or the 2 nd principal surface side is a light receiving surface.
In the present embodiment, the silicon substrate 10 has an n-type conductivity, but may have a p-type conductivity. In this case, the p-type amorphous silicon layer 62 of the amorphous silicon layer 60 has the same conductivity type as that of the silicon substrate 10, and thus the amorphous silicon layer 60 becomes the 1 st amorphous silicon layer. In addition, since the n-type amorphous silicon layer 32 of the amorphous silicon layer 30 has a conductivity type opposite to that of the silicon substrate 10, the amorphous silicon layer 30 becomes a 2 nd amorphous silicon layer.
In addition, although the
Fig. 5 is a graph showing an example of the boron concentration distribution in the thickness direction of the intrinsic amorphous silicon layer 61. In the graph of fig. 5, the concentration of boron is measured in a direction from the P-type amorphous silicon layer 62 toward the P-doped silicon oxide layer 50, for example, by sims (secondary ion mass spectroscopy) analysis. The direction from the P-doped silicon oxide layer 50 to the P-type amorphous silicon layer 62 is defined as the 1 st direction.
As shown in fig. 5, the boron concentration (boron atom concentration) in the thickness direction of the intrinsic amorphous silicon layer 61 has a higher profile than the boron concentration at the interface of the P-doped silicon oxide layer 50 and the intrinsic amorphous silicon layer 61 (specifically, the 1 st intrinsic amorphous silicon layer 61 a). That is, the boron concentration of the intrinsic amorphous silicon layer 61 has a higher distribution in the thickness direction at least in part than the boron concentration at the interface. The intrinsic amorphous silicon layer 61 may also be said to have a region with a higher boron concentration than the interface. For example, the boron concentration in the thickness direction of the intrinsic amorphous silicon layer 61 has a profile that increases relative to the boron concentration at the interface of the P-doped silicon oxide layer 50 and the intrinsic amorphous silicon layer 61. Specifically, at least the boron-introduced layer 61b of the 1 st intrinsic amorphous silicon layer 61a, the boron-introduced layer 61b, and the 2 nd intrinsic amorphous silicon layer 61c has a distribution in which the boron concentration increases in a region having a higher concentration than the boron concentration with the boron concentration at the interface as a reference. The thickness direction of the intrinsic amorphous silicon layer 61 is a direction from the interface toward the p-type amorphous silicon layer 62, and is a direction parallel to the Z axis in the drawing.
In the present embodiment, there is a local maximum point of boron concentration in the thickness direction, specifically, there is a local maximum point of boron concentration in the boron introducing layer 61b, and the boron concentration at the local maximum point is, for example, 1 × 1017/cm3Above and1×1020/cm3by boron concentration of 1 × 1017/cm3As described above, the series resistance component due to the intrinsic amorphous silicon layer 61 can be reduced, that is, a high Fill Factor (FF) can be obtained, and the boron concentration is 1 × 1020/cm3Hereinafter, a decrease in passivation at the junction between the P-doped silicon oxide layer 50 and the P-type amorphous silicon layer 62, that is, a high open circuit Voltage (VOC) can be suppressed, and therefore, the boron concentration at the local maximum point is 1 × 1017/cm3Above and 1 × 1020/cm3Hereinafter, since both a high fill factor and an open circuit voltage can be obtained, the photoelectric conversion efficiency of the solar cell 1 can be improved, and the boron concentration at the maximum point is 1 × 1018/cm3Above and 1 × 1019/cm3In the following case, the photoelectric conversion efficiency of the solar cell 1 can be further improved.
The boron concentration at the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61a is lower than that at the maximum point, the boron concentration at the interface may be lower than that in the boron introducing layer 61b, the boron concentration at the interface may be lower than that in at least one of the 1 st intrinsic amorphous silicon layer 61a and the 2 nd intrinsic amorphous silicon layer 61c, and the boron concentration at the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61a may be lower than that in 1 × 10, for example17/cm3. Thus, the passivation is improved by lowering the boron concentration at the interface, and carriers at the interface are lost. For example, when oxygen is present at the interface, the oxygen and boron form a recombination defect, and the reduction in the lifetime of carriers can be reduced.
The boron concentration distribution has a maximum point in the range of 2nm to 10nm in the 1 st direction from the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61 a. Further, the boron concentration distribution may more preferably have a maximum point in a range of 2nm or more and 6nm or less in the 1 st direction from the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61 a.
The boron concentration distribution may have a maximum point in the range of 20% to 50% of the thickness of the amorphous silicon layer 60 in the 1 st direction from the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61 a. The boron concentration of the intrinsic amorphous silicon layer 61 may have a distribution in which the concentration increases when the boron concentration at the interface is a base point.
In addition, there is no maximum point of the boron concentration on the concentration distribution of boron in the 1 st and 2 nd intrinsic amorphous silicon layers 61a and 61 c.
Although not shown, the oxygen concentration is maximum in the vicinity of the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61a, for example. That is, the oxygen concentration has a maximum point near the interface between the P-doped silicon oxide layer 50 and the 1 st intrinsic amorphous silicon layer 61 a. The
[3. method for producing solar cell ]
Next, a method for manufacturing the
CAT-CVD is a method in which a material gas is flowed into a film forming chamber in which a metal wire (catalyst) made of tungsten or the like is disposed, and then the material gas is subjected to a contact decomposition reaction by the metal wire heated by energization from a power supply, and a resultant reactant (decomposition product) is deposited on an object (for example, a silicon substrate 10).
As shown in fig. 6, a silicon substrate 10 is first prepared (S10). In addition, a P-doped silicon oxide layer 50 is formed on the silicon substrate 10. The P-doped silicon oxide layer 50 is formed by introducing, for example, Silane (SiH) into a film forming chamber (vacuum chamber) of a film forming apparatus4) iso-Si containing gas, Phosphine (PH)3) An n-type dopant containing gas, and O2、H2O、CO2And the like, with an oxygen-containing gas. The P-doped silicon oxide layer 50 is formed in a state where a plurality of silicon substrates 10 are arranged on a tray for forming the P-doped silicon oxide layer 50.
Alternatively, before the P-doped silicon oxide layer 50 is formed, the silicon substrate 10 may be cleaned, placed in a vacuum chamber, heated to 200 ℃. Subsequently, hydrogen gas may be introduced to perform hydrogen radical treatment, thereby cleaning the surface of the substrate. This process (hydrogen treatment) is effective in reducing the amount of carbon on the substrate surface.
Then, an n-side intrinsic amorphous silicon layer (intrinsic amorphous silicon layer 31) and an n-type amorphous silicon layer 32 are formed on the 1 st main surface of the silicon substrate 10 on which the P-doped silicon oxide layer 50 is not formed (S20 and S30). The silicon substrate 10 is followed by forming an n-type amorphous silicon layer 32 after forming the intrinsic amorphous silicon layer 31. That is, steps S20 and S30 are continuously performed in the same film forming apparatus. As shown in fig. 7, in the present embodiment, steps S20 and S30 are performed using the same tray T1 and film forming apparatus M1. In the tray T1, the silicon substrate 10 was disposed so that the 1 st main surface was exposed.
In step S20, Silane (SiH) will be diluted with hydrogen4) The gas containing silicon is supplied as a material gas into a film forming chamber, and the gas is decomposed on the surface of the metal wire which is arranged in the film forming chamber and is heated by energization. The decomposed gas is supplied to the 1 st main surface of the heated silicon substrate 10, thereby forming an intrinsic amorphous silicon layer 31.
In step S30, Silane (SiH) will be diluted with hydrogen4) Isosilicon containing gas and Phosphine (PH)3) The mixed gas containing the n-type dopant gas is supplied into the film forming chamber as a material gas, and the gas is decomposed on the surface of the metal wire which is arranged in the film forming chamber and is electrically heated. The decomposed gas is supplied to the intrinsic amorphous silicon layer 31 of the heated silicon substrate 10, thereby forming an n-type amorphous silicon layer 32.
After the amorphous silicon layer 30 was formed in the silicon substrate 10 by the film forming apparatus M1, the silicon substrate was taken out of the film forming apparatus M1, and the film forming tray was transferred from the tray T1 to the tray T2, and then step S40 was performed. When the silicon substrate 10 is transferred from the tray T1 to the tray T2, the 2 nd main surface of the silicon substrate 10 is exposed from the tray T2. That is, the silicon substrate 10 is placed on the tray T2 after being turned upside down.
Referring again to fig. 6, next, a P-side intrinsic amorphous silicon layer (intrinsic amorphous silicon layer 61) and a P-type amorphous silicon layer 62 are formed on the 2 nd main surface of the silicon substrate 10 on which the P-doped silicon oxide layer 50 is formed (S40 and S50). Steps S40 and S50 are performed in different film forming apparatuses. As shown in fig. 7, in the present embodiment, steps S40 and S50 are performed using trays T2 and T3, and film forming apparatuses M2 and M3, which are different from each other. Specifically, after the intrinsic amorphous silicon layer 61 was formed on the silicon substrate 10 by the film forming apparatus M2, the silicon substrate was taken out of the film forming apparatus M2, the film forming tray was transferred from the tray T2 to the tray T3, and then the p-type amorphous silicon layer film 62 was formed by using a film forming apparatus M3 different from the film forming apparatuses M1 and M2.
In step S40, Silane (SiH) will be diluted with hydrogen4) Isosilicon-containing gas and diborane (B)2H6) The mixed gas containing the p-type dopant gas is supplied into the film forming chamber as a material gas, and the gas is decomposed on the surface of the metal wire which is arranged in the film forming chamber and is electrically heated. The decomposed gas is supplied onto the 2 nd main surface (on the P-doped silicon oxide layer 50) of the heated silicon substrate 10, thereby forming an intrinsic amorphous silicon layer 61. In step S40, diborane (B) diluted with hydrogen is intentionally supplied2H6) Iso-containing p-type dopingThe agent gas is followed by the mixed gas.
In addition, in step S40, the intrinsic amorphous silicon layer 61 having the 1 st intrinsic amorphous silicon layer 61a, the boron introduction layer 61b, and the 2 nd intrinsic amorphous silicon layer 61c is formed. Thus, diborane (B)2H6) The supply of (2) is performed only for a certain period in step S40. Specifically, step S40 includes: a 1 st step for forming a 1 st intrinsic amorphous silicon layer 61a, a 2 nd step for forming a boron introduction layer 61b, and a 3 rd step for forming a 2 nd intrinsic amorphous silicon layer 61 c. The predetermined period is, for example, a period during which the 2 nd step for forming the boron-introduced layer 61b is performed.
In
In step 2, Silane (SiH) will be diluted with hydrogen4) Isosilicon-containing gas and diborane (B)2H6) And a mixed gas of a p-type dopant-containing gas containing a small amount of a p-type dopant is supplied as a material gas into the film forming chamber, and the gas is decomposed on the surface of the metal wire which is arranged in the film forming chamber and is electrically heated. The boron-introduced layer 61b is formed by supplying the decomposed gas onto the 1 st intrinsic amorphous silicon layer 61a of the heated silicon substrate 10.
In step 3, Silane (SiH) is diluted by hydrogen4) A gas after waiting for the silicon-containing gas is supplied as a material gas into the film forming chamber, and a 2 nd intrinsic amorphous silicon layer 61c is formed on the boron introducing layer 61b of the silicon substrate 10. The 3 rd step may be performed under the same conditions as in the 1 st step, for example.
In the 1 st and 3 rd steps, diborane (B) is diluted, for example, with hydrogen2H6) The mixed gas after the p-type dopant-containing gas is not supplied into the film forming chamber.
In step S50, Silane (SiH) will be diluted with hydrogen4) Isosilicon-containing gas and diborane (B)2H6) The mixed gas after waiting for the p-type dopant-containing gas is supplied as a material gas into the film forming chamber,the gas is decomposed on the surface of the metal wire which is disposed in the film forming chamber and is heated by energization. The decomposed gas is supplied to the intrinsic amorphous silicon layer 61 of the heated silicon substrate 10, thereby forming a p-type amorphous silicon layer 62.
In the manufacturing method shown in fig. 6, since the silicon substrate 10 is turned over once between step S30 and step S40, the manufacturing process can be simplified. Further, diborane (B) was supplied2H6) Has formed thereon the intrinsic amorphous silicon layer 31 and the n-type amorphous silicon layer 32 on the 1 st main surface of the silicon substrate 10 in steps S40 and S50. Therefore, in steps S40 and S50, the inclusion of diborane (B) can be suppressed2H6) The decomposed material gas of (2) spreads to the 1 st main surface side and is deposited on the 1 st main surface of the silicon substrate 10.
Next, another example of the method for manufacturing the
PE-CVD is a method in which a material gas is flowed into a film forming chamber (vacuum chamber) equipped with a plasma source, electric power is supplied from a power supply to the plasma source to generate discharge plasma in the film forming chamber, and then the material gas is decomposed by the plasma to deposit the generated reactant on an object (for example, a silicon substrate 10). As PE-CVD, any of an RF plasma CVD method, a VHF plasma CVD method with a high frequency, a microwave plasma CVD method, and the like can be used. Next, a case of using the RF plasma CVD method will be described.
As shown in fig. 8, first, a silicon substrate 10 is prepared (S110). Step S110 is the same as step S10 shown in fig. 6, and description thereof is omitted.
Then, a P-side intrinsic amorphous silicon layer (intrinsic amorphous silicon layer 61) is formed on the 2 nd main surface of the silicon substrate 10 on which the P-doped silicon oxide layer 50 is formed (S120). As shown in fig. 9, in the present embodiment, step S120 is performed using the tray T4 and the film forming apparatus M4. For example, the intrinsic amorphous silicon layer 61 is formed on the 2 nd main surface of the silicon substrate 10 disposed on the tray T4 such that the 2 nd main surface (P-doped silicon oxide layer 50) is exposed.
In step S120, Silane (SiH) will be diluted with hydrogen4) Isosilicon-containing gas and diborane (B)2H6) The mixed gas containing the p-type dopant gas is supplied into the film forming chamber as a material gas, and the gas is converted into plasma by applying an electric power of an RF frequency to the parallel plate electrodes disposed in the film forming chamber. The intrinsic amorphous silicon layer 61 is formed by supplying the gas converted into plasma to the 2 nd main surface of the silicon substrate 10 heated to 150 ℃ to 250 ℃. In step S120, diborane (B) diluted with hydrogen is intentionally supplied2H6) And the like after the p-type dopant containing gas.
In addition, in step S120, the intrinsic amorphous silicon layer 61 having the 1 st intrinsic amorphous silicon layer 61a, the boron introduction layer 61b and the 2 nd intrinsic amorphous silicon layer 61c is formed, as in step S40. Thus, diborane (B)2H6) The supply of (2) is performed only for a certain period of time in step S120. Specifically, the step S120 includes a 1 st step for forming the 1 st intrinsic amorphous silicon layer 61a, a 2 nd step for forming the boron introduction layer 61b, and a 3 rd step for forming the 2 nd intrinsic amorphous silicon layer 61 c. The predetermined period is, for example, a period during which the 2 nd step for forming the boron-introduced layer 61b is performed.
Referring again to fig. 8, an n-side intrinsic amorphous silicon layer (intrinsic amorphous silicon layer 31) and an n-type amorphous silicon layer 32 are then formed on the 1 st main surface of the silicon substrate 10 on which the P-doped silicon oxide layer 50 is not formed (S130 and S140). Steps S130 and S140 are continuously performed in the same film forming apparatus M5 as steps S20 and S30. As shown in fig. 9, in the present embodiment, steps S130 and S140 are performed using the same tray T5 and film forming apparatus M5.
Further, the steps S120, S130 and S140 are performed using trays T4 and T5, and film forming apparatuses M4 and M5, which are different from each other. Specifically, after the intrinsic amorphous silicon layer 61 was formed on the silicon substrate 10 by the film forming apparatus M4, the silicon substrate was taken out of the film forming apparatus M4, the film forming tray was transferred from the tray T4 to the tray T5, and then the intrinsic amorphous silicon layer film 31 and the n-type amorphous silicon layer film 32 were formed by using the film forming apparatus M5 different from the film forming apparatus M4. When the silicon substrate 10 is transferred from the tray T4 to the tray T5, the silicon substrate 10 is disposed on the tray T5 so that the 1 st main surface of the silicon substrate 10 is exposed. That is, the silicon substrate 10 is placed on the tray T5 after being turned upside down.
In step S130, Silane (SiH) will be diluted with hydrogen4) The gas after waiting for the silicon-containing gas is supplied as a material gas into the film forming chamber. In step S140, Silane (SiH) will be diluted with hydrogen4) Isosilicon containing gas and Phosphine (PH)3) The mixed gas after the n-type dopant-containing gas is supplied as a material gas into the film forming chamber.
Referring again to fig. 8, a p-type amorphous silicon layer 62 is then formed on the intrinsic amorphous silicon layer 61 of the silicon substrate 10 (S150). As shown in fig. 9, in the present embodiment, step S150 is performed using the tray T6 and the film forming apparatus M6. For example, the p-type amorphous silicon layer 62 is formed on the intrinsic amorphous silicon layer 61 of the silicon substrate 10 disposed on the tray T6 such that the intrinsic amorphous silicon layer 61 is exposed. Specifically, the silicon substrate 10 was taken out from the film forming apparatus M5 after the intrinsic amorphous silicon layer 31 and the n-type amorphous silicon layer 32 were formed by the film forming apparatus M5, and after the film forming tray was transferred from the tray T5 to the tray T6, the p-type amorphous silicon layer film 62 was formed by using a film forming apparatus M6 different from the film forming apparatuses M4 and M5. When the silicon substrate 10 is transferred from the tray T5 to the tray T6, the intrinsic amorphous silicon layer 61 of the silicon substrate 10 is disposed on the tray T6 so as to be exposed. That is, the silicon substrate 10 is placed on the tray T6 after being turned upside down.
In step S150, Silane (SiH) will be diluted with hydrogen4) Isosilicon-containing gas and diborane (B)2H6) The mixed gas after the p-type dopant-containing gas is supplied as a material gas into the film forming chamber.
In the manufacturing method shown in fig. 8, an intrinsic amorphous silicon layer 61 can be formed on a silicon substrate 10 first. This can suppress the impurity from being interposed between the intrinsic amorphous silicon layer 61 and the P-doped silicon oxide layer 50, and thus can suppress the decrease in photoelectric conversion efficiency due to the impurity. Further, by using PE-CVD in the film formation method, the concentration of oxygen interposed between the layers can be reduced. For example, since oxygen, which has a large influence on the photoelectric conversion efficiency, interposed at the interface between the intrinsic amorphous silicon layer 61 and the P-doped silicon oxide layer 50 can be reduced, the photoelectric conversion efficiency is improved as compared with the case of using CAT-CVD. At least the intrinsic amorphous silicon layer 61 may be formed by PE-CVD from the viewpoint of effectively improving the photoelectric conversion efficiency.
Table 1 shows an example of the production conditions of the method for producing the
[ TABLE 1 ]
As described above, the method for manufacturing the
[4. effects, etc. ]
As described above, the
In the conventional solar cell, in the heterojunction between the crystalline silicon substrate and the amorphous silicon layer, for example, by providing a passivation layer (for example, substantially an intrinsic silicon layer) on the main surface of the silicon substrate, recombination of carriers at the junction interface can be suppressed, and therefore, the open circuit voltage is improved. However, even when the passivation layer is provided, recombination of carriers in the amorphous silicon layer due to a defect or the like on the surface of the silicon substrate cannot be completely suppressed. In addition, when the concentration of an impurity (for example, phosphorus) in the silicon substrate is increased in order to further improve the photoelectric conversion characteristics, the electric field intensity of the amorphous silicon layer becomes small, resulting in an increase in the recombination of carriers in the amorphous silicon layer. That is, the recombination of carriers in the amorphous silicon layer cannot be completely suppressed only by the intervention of impurities in the surface of the silicon substrate. Further, since the defects on the surface of the silicon substrate increase due to the excessive impurity concentration on the surface of the silicon substrate, the photoelectric conversion characteristics are degraded.
In contrast, in the
In the
That is, according to the
The boron concentration distribution may have a maximum point in a range of 20% to 50% of the thickness of the amorphous silicon layer 60 from the interface. The boron concentration distribution may have a maximum point in a range of 2nm to 10nm from the interface.
Thus, compared to the case where a local maximum point of the boron concentration distribution exists in the vicinity of the interface between the intrinsic amorphous silicon layer 61 and the silicon substrate 10, recombination of carriers at the interface between the intrinsic amorphous silicon layer 61 and the silicon substrate 10 can be suppressed without increasing the series resistance component due to the intrinsic amorphous silicon layer 61. Therefore, according to the
Further, the boron concentration at the maximum point was 1 × 1017/cm3Above and 1 × 1020/cm3The following.
This makes it possible to achieve both a high fill factor and an open circuit voltage, and therefore, the photoelectric conversion efficiency of the
As described above, the
This can suppress recombination of carriers at the semiconductor junction interface between the crystalline silicon substrate 10 and the amorphous silicon layer 60, and can reduce the series resistance component of the intrinsic amorphous silicon layer 61. This can increase the open circuit voltage and fill factor of the
(modification of embodiment)
Next, a solar cell according to this modification will be described with reference to fig. 10. The solar cell of the present modification includes an intrinsic amorphous silicon layer 161 instead of the intrinsic amorphous silicon layer 61 of the embodiment. The intrinsic amorphous silicon layer 161 is different from the intrinsic amorphous silicon layer 61 of the embodiment in the concentration distribution of boron, and the following description will focus on this point. Fig. 10 is a graph showing another example of the boron concentration distribution in the thickness direction of the intrinsic amorphous silicon layer 161.
As shown in fig. 10, the concentration profile of boron of the intrinsic amorphous silicon layer 161 has a gradient that monotonically increases from the interface with the P-doped silicon oxide layer 50 toward the P-type amorphous silicon layer 62. The term "monotonically increases" means that the boron concentration does not decrease toward the p-type amorphous silicon layer 62 side in the thickness direction of the intrinsic amorphous silicon layer 161. In addition to the continuous increase in boron concentration as shown in fig. 10, for example, the stepwise increase in boron concentration is also included in the monotonic increase. In addition, the concentration distribution has no maximum point.
The concentration of boron in the intrinsic amorphous silicon layer 161 is lower than that in the p-type amorphous silicon layer 62. The boron concentration of the intrinsic amorphous silicon layer 161 increases monotonically in the concentration between the boron concentration at the interface with the P-doped silicon oxide layer 50 and the boron concentration of the P-type amorphous silicon layer 62.
In addition, the intrinsic amorphous silicon layer 161 may be formed by diluting diborane (B) with hydrogen in step S40 shown in fig. 6 or step S120 shown in fig. 82H6) The amount of the mixed gas after the p-type dopant-containing gas is supplied to the film forming chamber is increased in stages.
As described above, the concentration distribution of boron in the thickness direction of the intrinsic amorphous silicon layer 161 of the solar cell of the present modification monotonically increases from the interface between the P-doped silicon oxide layer 50 and the intrinsic amorphous silicon layer 161 toward the P-type amorphous silicon layer 62.
Thus, compared to the case where a local maximum point of the boron concentration distribution exists in the vicinity of the interface between the intrinsic amorphous silicon layer 161 and the silicon substrate 10, recombination of carriers at the interface between the intrinsic amorphous silicon layer 161 and the silicon substrate 10 can be suppressed without increasing the series resistance component due to the intrinsic amorphous silicon layer 161. Thus, according to the solar cell, the photoelectric conversion characteristics can be further improved as compared with the case where a local maximum point of the boron concentration distribution exists in the vicinity of the interface between the intrinsic amorphous silicon layer 161 and the silicon substrate 10.
(other embodiments)
The solar cell and the solar cell module according to the present invention have been described above based on the above-described embodiments and modified examples (hereinafter, also referred to as embodiments and the like), but the present invention is not limited to the above-described embodiments.
For example, in the solar cell module according to the above embodiment, a plurality of solar cells are arranged in a matrix on the surface, but the solar cell module is not limited to the matrix arrangement. For example, the linear or curved configuration may be arranged in a circular ring shape or in a one-dimensional linear or curved shape.
In the above-described embodiment, the example in which the n-type semiconductor layer is formed on the surface of the solar cell on the light receiving surface side has been described, but the present invention is not limited thereto. The p-type semiconductor layer may be formed on the light-receiving surface side of the solar cell.
In the above-described embodiments and the like, the example in which the intrinsic amorphous silicon layer has a three-layer structure of the 1 st intrinsic amorphous silicon layer, the boron-introduced layer, and the 2 nd intrinsic amorphous silicon layer has been described, but the present invention is not limited thereto. The intrinsic amorphous silicon layer may also have no at least one of the 1 st intrinsic amorphous silicon layer and the 2 nd intrinsic amorphous silicon layer.
In the above-described embodiments and the like, an example in which the boron concentration distribution of the intrinsic amorphous silicon layer has one local maximum point is described, but the present invention is not limited thereto. The concentration profile of boron of the intrinsic amorphous silicon layer may also have more than two maxima.
In fig. 5 and 10 of the above-described embodiments and the like, an example was described in which the boron concentration distribution of the intrinsic amorphous silicon layer is higher than the boron concentration at the interface between the intrinsic amorphous silicon layer and the P-doped silicon oxide layer over the entire region in the thickness direction of the intrinsic amorphous silicon layer, but the present invention is not limited thereto. The boron concentration profile of the intrinsic amorphous silicon layer may be lower than the boron concentration at the interface in a portion of the intrinsic amorphous silicon layer in the thickness direction.
In the above-described embodiments and the like, the method of manufacturing the solar cell using the tray has been described, but the present invention is not limited thereto. The solar cell may be manufactured without using a tray in forming at least one amorphous silicon layer, for example. In this case, the p-type amorphous silicon layer and the p-side amorphous silicon layer are formed in different film forming apparatuses. By not using a tray, the amount of oxygen taken into the film forming apparatus can be reduced. This can reduce the oxygen concentration at the interface between the P-doped silicon oxide layer and the P-side intrinsic amorphous silicon layer, which has a large influence on the photoelectric conversion efficiency, for example.
In the above-described embodiments and the like, the example in which the P-doped silicon oxide layer is formed on the 2 nd main surface of the silicon substrate has been described, but the P-doped silicon oxide layer may be formed on the 1 st main surface of the silicon substrate.
The order of the steps in the method for manufacturing a solar cell described in the above embodiment and the like is an example, and is not limited to this. The order of the steps may be interchanged, or a part of the steps may not be performed.
The method for manufacturing the solar cell described in the above embodiment and the like is not limited to fig. 6 and 8 described above. For example, in FIG. 6, at least one of the steps S20 to S50 may be performed by PE-CVD. In fig. 8, at least one of the steps S120 to S150 may be performed by CAT-CVD, for example. That is, the solar cell may be manufactured by combining different film formation methods. Further, each semiconductor layer may be formed by a film formation method other than CAT-CVD or PE-CVD. For example, at least one of the semiconductor layers may be formed by a sputtering method or the like.
In the method for manufacturing a solar cell described in the above embodiment and the like, each step may be performed by 1 step or may be performed by a separate step. The term "to be performed in one step" means to include the case where each step is performed using one apparatus, the case where each step is performed continuously, or the case where each step is performed at the same place. The respective steps are performed by using respective apparatuses, performed at different times (for example, on different days), or performed at different places.
Other forms obtained by intelligently modifying the respective embodiments and forms realized by arbitrarily combining the constituent elements and functions in the respective embodiments without departing from the spirit of the present invention are also included in the present invention.
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