阅读说明：本技术 一种可调脉冲发生器 (Adjustable pulse generator ) 是由 魏东 于 2020-05-28 设计创作，主要内容包括：本发明公开了一种可调脉冲发生器,包括波形生成电路、波形延时电路及波形处理电路。波形生成电路在自身上电后,周期性生成占空比和周期均可调的矩形波；波形延时电路将矩形波延时第一时间后作为第一输出信号输出,并将矩形波延时第二时间后作为第二输出信号输出；其中,第二时间＞第一时间,且两时间差可调；波形处理电路基于第一输出信号和第二输出信号进行波形处理,得到脉冲宽度、脉冲值及脉冲周期均可调的脉冲信号。可见,本申请的可调脉冲发生器提供的脉冲信号的脉冲宽度、脉冲值及脉冲周期均可调,所以此脉冲信号可很好地模拟噪声信号输入到线路中,以测试线路的滤波能力,从而提高了线路滤波能力测试的参考价值。(The invention discloses an adjustable pulse generator which comprises a waveform generating circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generating circuit is electrified, a rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and outputs the rectangular wave as a second output signal; wherein, the second time is larger than the first time, and the difference between the two times is adjustable; the waveform processing circuit carries out waveform processing based on the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate a noise signal to be input into a line to test the filtering capability of the line, and the reference value of the line filtering capability test is improved.)

1. An adjustable pulse generator, comprising:

the waveform generation circuit is used for periodically generating rectangular waves with adjustable duty ratio and period after the waveform generation circuit is electrified;

the waveform delay circuit is connected with the output end of the waveform generation circuit and is used for delaying the rectangular wave for a first time to be output as a first output signal and delaying the rectangular wave for a second time to be output as a second output signal; wherein the second time is larger than the first time, and the difference between the two times is adjustable;

and the waveform processing circuit is respectively connected with the output end of the waveform generating circuit and the output end of the waveform delay circuit and is used for carrying out waveform processing on the basis of the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period.

2. The tunable pulse generator of claim 1, wherein the waveform generation circuit comprises a reverse schmitt trigger, a first tunable resistor, a second tunable resistor, a diode, and a capacitor; wherein:

the input end of the reverse Schmitt trigger is respectively connected with the first end of the capacitor, the anode of the diode and the first end of the first adjustable resistor, the second end of the capacitor is grounded, the cathode of the diode is connected with the first end of the second adjustable resistor, the output end of the reverse Schmitt trigger is respectively connected with the second end of the first adjustable resistor and the second end of the second adjustable resistor, and the common end of the reverse Schmitt trigger is used as the output end of the waveform generating circuit;

the reverse Schmitt trigger is used for periodically generating rectangular waves with adjustable duty ratios and periods by adjusting the resistance values of the first adjustable resistor and the second adjustable resistor after being electrified.

3. The tunable pulse generator of claim 1, wherein the waveform delay circuit comprises:

a dial switch;

the delay chip is respectively connected with the dial switch and the output end of the waveform generating circuit and is used for determining delay time according to the dial value of the dial switch; and outputting the rectangular wave as a first output signal after the transmission delay of the chip, and outputting the rectangular wave as a second output signal after the delay time is delayed on the basis of the transmission delay of the chip.

4. The tunable pulse generator of claim 3, wherein the delay chip is specifically configured to convert a binary dialing value of the dial switch to a decimal dialing value and multiply the decimal dialing value by a chip step time to obtain the delay time.

5. The tunable pulse generator of claim 1, wherein the waveform processing circuit comprises an exclusive or gate, an and gate, and a voltage conversion circuit; wherein:

a first input end of the exclusive-or gate is connected to a first output signal of the waveform delay circuit, a second input end of the exclusive-or gate is connected to a second output signal of the waveform delay circuit, an output end of the exclusive-or gate is connected to the first input end of the and gate, a second input end of the and gate is connected to an output end of the waveform generation circuit, an output end of the and gate is connected to an input end of the voltage conversion circuit, and an output end of the voltage conversion circuit is used as an output end of the waveform processing circuit;

and the voltage conversion circuit is used for performing voltage conversion on the voltage value of the pulse signal after receiving the pulse signal with adjustable pulse width and pulse period output by the AND gate to obtain the pulse signal with adjustable pulse value.

6. The tunable pulse generator of claim 5, wherein the voltage conversion circuit comprises a switching tube and a pull-up resistor; wherein:

the control end of the switch tube is connected with the output end of the AND gate, the first end of the switch tube is connected with the first end of the pull-up resistor, the common end of the switch tube is used as the output end of the voltage conversion circuit, the second end of the pull-up resistor is connected with an adjustable direct-current power supply, and the second end of the switch tube is grounded; the switch tube is a switch tube with a high-level cut-off and a low-level conduction.

7. The tunable pulse generator of claim 2, further comprising:

a period calculator for calculating the charging relationship of the capacitor according to the preset relationship

wherein, V_o1For the initial charging voltage, V, of the capacitor in the current charging and discharging cycle_hIs a high switching voltage, V, of the reverse Schmitt trigger_t1Is the charging voltage, V, of the capacitor when the charging time of the current charging and discharging cycle reaches t1_o2Is the initial discharge voltage, V, of the capacitor in the current charge-discharge cycle₁Is a low switching voltage, V, of the reverse Schmitt trigger_t2Is the discharge voltage of the capacitor when the discharge time of the current charge-discharge period reaches t2, R₁Is the resistance value, R, of the first adjustable resistor in the current charge-discharge period₂The resistance value of the second adjustable resistor in the current charge-discharge period is shown, and c is the capacitance value of the capacitor.

8. The tunable pulse generator of claim 7, wherein the first tunable resistor and the second tunable resistor are each a geared tunable resistor.

Technical Field

The invention relates to the field of pulse generation, in particular to an adjustable pulse generator.

Background

With the development of information technology, the amount of information that a server needs to process is increasing dramatically, which puts increasing demands on the information processing speed of the server. With the improvement of the signal rate of the server, the signal quality is more and more important for the stability of the server, but with the continuous upgrade of the server, the power consumption of the whole machine and various configurations of the server are also continuously increased, which brings a plurality of interference sources, once the signal is interfered by noise, phenomena such as back channel, abnormal pulse, waveform jitter and the like can occur, the signal quality is seriously affected, and the normal work of the server is affected.

Disclosure of Invention

The invention aims to provide an adjustable pulse generator, wherein the pulse width, the pulse value and the pulse period of a pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate a noise signal to be input into a line so as to test the filtering capability of the line, thereby improving the reference value of the line filtering capability test.

In order to solve the above technical problem, the present invention provides an adjustable pulse generator, comprising:

the waveform generation circuit is used for periodically generating rectangular waves with adjustable duty ratio and period after the waveform generation circuit is electrified;

the waveform delay circuit is connected with the output end of the waveform generation circuit and is used for delaying the rectangular wave for a first time to be output as a first output signal and delaying the rectangular wave for a second time to be output as a second output signal; wherein the second time is larger than the first time, and the difference between the two times is adjustable;

and the waveform processing circuit is respectively connected with the output end of the waveform generating circuit and the output end of the waveform delay circuit and is used for carrying out waveform processing on the basis of the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period.

Preferably, the waveform generating circuit comprises a reverse schmitt trigger, a first adjustable resistor, a second adjustable resistor, a diode and a capacitor; wherein:

the input end of the reverse Schmitt trigger is respectively connected with the first end of the capacitor, the anode of the diode and the first end of the first adjustable resistor, the second end of the capacitor is grounded, the cathode of the diode is connected with the first end of the second adjustable resistor, the output end of the reverse Schmitt trigger is respectively connected with the second end of the first adjustable resistor and the second end of the second adjustable resistor, and the common end of the reverse Schmitt trigger is used as the output end of the waveform generating circuit;

the reverse Schmitt trigger is used for periodically generating rectangular waves with adjustable duty ratios and periods by adjusting the resistance values of the first adjustable resistor and the second adjustable resistor after being electrified.

Preferably, the waveform delay circuit includes:

a dial switch;

the delay chip is respectively connected with the dial switch and the output end of the waveform generating circuit and is used for determining delay time according to the dial value of the dial switch; and outputting the rectangular wave as a first output signal after the transmission delay of the chip, and outputting the rectangular wave as a second output signal after the delay time is delayed on the basis of the transmission delay of the chip.

Preferably, the delay chip is specifically configured to convert the binary dial value of the dial switch into a decimal dial value, and multiply the decimal dial value by a chip step time to obtain the delay time.

Preferably, the waveform processing circuit comprises an exclusive or gate, an and gate and a voltage conversion circuit; wherein:

a first input end of the exclusive-or gate is connected to a first output signal of the waveform delay circuit, a second input end of the exclusive-or gate is connected to a second output signal of the waveform delay circuit, an output end of the exclusive-or gate is connected to the first input end of the and gate, a second input end of the and gate is connected to an output end of the waveform generation circuit, an output end of the and gate is connected to an input end of the voltage conversion circuit, and an output end of the voltage conversion circuit is used as an output end of the waveform processing circuit;

and the voltage conversion circuit is used for performing voltage conversion on the voltage value of the pulse signal after receiving the pulse signal with adjustable pulse width and pulse period output by the AND gate to obtain the pulse signal with adjustable pulse value.

Preferably, the voltage conversion circuit comprises a switching tube and a pull-up resistor; wherein:

the control end of the switch tube is connected with the output end of the AND gate, the first end of the switch tube is connected with the first end of the pull-up resistor, the common end of the switch tube is used as the output end of the voltage conversion circuit, the second end of the pull-up resistor is connected with an adjustable direct-current power supply, and the second end of the switch tube is grounded; the switch tube is a switch tube with a high-level cut-off and a low-level conduction.

Preferably, the adjustable pulse generator further comprises:

a period calculator for calculating the charging relationship of the capacitor according to the preset relationshipObtaining the charging time Tr of the capacitor in the current charging and discharging period, and discharging according to a preset capacitor discharging relational expression

Obtaining the discharge time Tf of the capacitor in the current charge-discharge cycle, and obtaining the current charge-discharge cycle of the capacitor according to a preset cycle relation formula T ═ Tr + Tf;

wherein, V_o1For the initial charging voltage, V, of the capacitor in the current charging and discharging cycle_hIs a high switching voltage, V, of the reverse Schmitt trigger_t1Is the charging voltage, V, of the capacitor when the charging time of the current charging and discharging cycle reaches t1_o2Is the initial discharge voltage, V, of the capacitor in the current charge-discharge cycle₁Is a low switching voltage, V, of the reverse Schmitt trigger_t2Is the discharge voltage of the capacitor when the discharge time of the current charge-discharge period reaches t2, R₁Is the resistance value, R, of the first adjustable resistor in the current charge-discharge period₂The resistance value of the second adjustable resistor in the current charge-discharge period is shown, and c is the capacitance value of the capacitor.

Preferably, the first adjustable resistor and the second adjustable resistor are both gear type adjustable resistors.

The invention provides an adjustable pulse generator which comprises a waveform generating circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generating circuit is electrified, a rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and outputs the rectangular wave as a second output signal; wherein, the second time is larger than the first time, and the difference between the two times is adjustable; the waveform processing circuit carries out waveform processing based on the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate a noise signal to be input into a line to test the filtering capability of the line, and the reference value of the line filtering capability test is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an adjustable pulse generator according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a waveform generating circuit according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of an adjustable pulse generator according to an embodiment of the present invention;

fig. 4 is a schematic diagram of pulse adjustment of an adjustable pulse generator according to an embodiment of the present invention.

Detailed Description

The core of the invention is to provide an adjustable pulse generator, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so the pulse signal can well simulate the noise signal to be input into the line to test the filtering capability of the line, thereby improving the reference value of the line filtering capability test.

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an adjustable pulse generator according to an embodiment of the present invention.

The adjustable pulse generator comprises:

the waveform generation circuit 1 is used for periodically generating rectangular waves with adjustable duty ratio and period after being electrified;

the waveform delay circuit 2 is connected with the output end of the waveform generation circuit 1 and is used for delaying the rectangular wave for a first time to be output as a first output signal and delaying the rectangular wave for a second time to be output as a second output signal; wherein, the second time is larger than the first time, and the difference between the two times is adjustable;

and the waveform processing circuit 3 is respectively connected with the output end of the waveform generating circuit 1 and the output end of the waveform delay circuit 2 and is used for carrying out waveform processing on the basis of the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period.

Specifically, the adjustable pulse generator of the present application includes a waveform generating circuit 1, a waveform delaying circuit 2 and a waveform processing circuit 3, and its working principle is:

after the waveform generating circuit 1 is powered on, it can periodically generate rectangular waves, and the duty ratio and the period of the rectangular waves are both adjustable, and output the generated rectangular waves to the waveform delay circuit 2 and the waveform processing circuit 3. After receiving the rectangular wave, the waveform delay circuit 2 delays the rectangular wave for a first time on one hand, and outputs the rectangular wave delayed for the first time to the waveform processing circuit 3 as a first output signal; on the other hand, the rectangular wave is delayed by a second time, and the rectangular wave delayed by the second time is output to the waveform processing circuit 3 as a second output signal. It should be noted that the second time is greater than the first time, and the time difference between the second time and the first time is adjustable.

The waveform processing circuit 3 can combine and process each waveform signal based on the rectangular wave with adjustable duty ratio and cycle and the waveform signal after the rectangular wave is not fixed and delayed, so as to obtain the pulse signal with adjustable pulse width, pulse value and pulse cycle, and input the obtained pulse signal into the server line as a noise signal, so as to realize the filtering capability of the server line. In addition, the adjustable pulse generator can also be applied to conditions for verifying abnormal triggering of the server, and particularly, the pulse signal is used as a triggering signal and is input into a server circuit so as to realize the conditions for verifying abnormal triggering of the server.

The invention provides an adjustable pulse generator which comprises a waveform generating circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generating circuit is electrified, a rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and outputs the rectangular wave as a second output signal; wherein, the second time is larger than the first time, and the difference between the two times is adjustable; the waveform processing circuit carries out waveform processing based on the first output signal and the second output signal to obtain a pulse signal with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate a noise signal to be input into a line to test the filtering capability of the line, and the reference value of the line filtering capability test is improved.

On the basis of the above-described embodiment:

referring to fig. 2, fig. 2 is a schematic structural diagram of a waveform generating circuit according to an embodiment of the present invention.

As an alternative embodiment, the waveform generating circuit 1 includes a reverse schmitt trigger OE, a first adjustable resistor R1, a second adjustable resistor R2, a diode D, and a capacitor C; wherein:

the input end of a reverse Schmitt trigger OE is respectively connected with the first end of a capacitor C, the anode of a diode D and the first end of a first adjustable resistor R1, the second end of the capacitor C is grounded, the cathode of the diode D is connected with the first end of a second adjustable resistor R2, the output end of the reverse Schmitt trigger OE is respectively connected with the second end of the first adjustable resistor R1 and the second end of the second adjustable resistor R2, and the common end of the reverse Schmitt trigger OE is used as the output end of the waveform generation circuit 1;

the reverse Schmitt trigger OE is used for periodically generating rectangular waves with adjustable duty ratios and periods by adjusting the resistance values of the first adjustable resistor R1 and the second adjustable resistor R2 after the reverse Schmitt trigger OE is powered on.

Specifically, the waveform generation circuit 1 of the present application includes a reverse schmitt trigger OE, a first adjustable resistor R1, a second adjustable resistor R2, a diode D, and a capacitor C, and the operating principle thereof is as follows:

when the reverse schmitt trigger OE is just powered on, the voltage at the input end a of the reverse schmitt trigger OE is low, and the voltage at the output end Y of the reverse schmitt trigger OE should be high, at this time, due to the existence of the capacitor C, the reverse schmitt trigger OE charges the capacitor C through the first adjustable resistor R1 until the charging voltage rises to the high-turnover voltage of the reverse schmitt trigger OE. When the charging voltage of the capacitor C reaches the high flip-flop voltage of the reverse schmitt trigger OE, the voltage at the output terminal Y of the reverse schmitt trigger OE should be low, and at this time, due to the existence of the capacitor C, the reverse schmitt trigger OE discharges the capacitor C through the first adjustable resistor R1 and the second adjustable resistor R2 until the discharging voltage drops to the low flip-flop voltage of the reverse schmitt trigger OE. When the discharge voltage of the capacitor C reaches the low flip-flop voltage of the reverse schmitt trigger OE, the voltage at the output terminal Y of the reverse schmitt trigger OE should be high again, and the above-mentioned operation is repeated in cycles to obtain a periodic rectangular wave.

It can be seen that the resistance of the first adjustable resistor R1 affects the charging time of the capacitor C, the resistances of the first adjustable resistor R1 and the second adjustable resistor R2 affect the discharging time of the capacitor C, and the charging time + the discharging time of the capacitor C in the current charging and discharging cycle is equal to the current charging and discharging cycle, so that the reverse schmitt trigger OE can periodically generate a rectangular wave with adjustable duty cycle and cycle by adjusting the resistances of the first adjustable resistor R1 and the second adjustable resistor R2. In addition, it should be noted that the diode D is provided to distinguish between the charging circuit and the discharging circuit of the capacitor C, so that the charging time and the discharging time of the capacitor C are set independently.

In addition, TC7SZ14FU can be selected as the reverse Schmitt trigger OE, the transmission delay is 3.7ns, the response speed is high, the acceptable range of a power supply is 1.65V-5.5V, and the application range is wide.

Referring to fig. 3, fig. 3 is a schematic structural diagram of an adjustable pulse generator according to an embodiment of the present invention.

As an alternative embodiment, the waveform delay circuit 2 includes:

a dial switch 21;

the delay chip 22 is respectively connected with the dial switch 21 and the output end of the waveform generating circuit 1 and is used for determining delay time according to the dial value of the dial switch 21; the rectangular wave is transmitted and delayed by the chip itself to be output as a first output signal, and the rectangular wave is delayed for a delay time on the basis of the transmission and delay of the chip itself to be output as a second output signal.

Specifically, the waveform delay circuit 2 of the present application includes a dial switch 21 and a delay chip 22, and its working principle is:

the delay chip 22 firstly determines a delay time T1 according to the dial value of the dial switch 21, and then outputs the rectangular wave output by the waveform generating circuit 1 as a first output signal after the rectangular wave is delayed by a chip self-transmission delay T0, and outputs the rectangular wave output by the waveform generating circuit 1 as a second output signal after the rectangular wave is delayed by a delay time T1 on the basis of a chip self-transmission delay T0. Since the dial value of the dial switch 21 is adjustable, the delay time T1 determined by the delay chip 22 is also adjustable.

It should be noted that the chip self propagation delay T0 is the first time of the above embodiment, and the chip self propagation delay T0+ the delay time T1 is the second time of the above embodiment.

As an alternative embodiment, the delay chip 22 is specifically configured to convert the binary dial value of the dial switch 21 into a decimal dial value, and multiply the decimal dial value by the chip step time to obtain the delay time.

Specifically, the delay chip 22 of the present application may specifically convert the binary dial value of the dial switch 21 into a decimal dial value, and multiply the decimal dial value by the chip step time T0, and take the product of the two as the delay time T1.

For example, the delay time T1 of the delay chip 22 is controlled by an 8-bit toggle switch, and the 8-bit toggle switch controls the delay time T1 through the high and low levels of the 8 pins D0 to D7 of the delay chip 22, so that T1 is (D0 + D1 + D2 + D3 + D8 + D4 + 16+ D5 + D6 + D3564 + D7) T0.

In addition, the delay chip 22 of the present application can adopt 8-bit programmable sequential element DS1023 series chips, and the step time t0 has various specifications of 0.25ns, 0.5ns, 1ns, 2ns, 5ns and the like.

As an alternative embodiment, the waveform processing circuit 3 includes an exclusive or gate 31, an and gate 32, and a voltage conversion circuit 33; wherein:

a first input end of the exclusive or gate 31 is connected to a first output signal of the waveform delay circuit 2, a second input end of the exclusive or gate 31 is connected to a second output signal of the waveform delay circuit 2, an output end of the exclusive or gate 31 is connected to a first input end of the and gate 32, a second input end of the and gate 32 is connected to an output end of the waveform generation circuit 1, an output end of the and gate 32 is connected to an input end of the voltage conversion circuit 33, and an output end of the voltage conversion circuit 33 serves as an output end of the waveform processing circuit 3;

the voltage conversion circuit 33 is configured to perform voltage conversion on the voltage value of the pulse signal after receiving the pulse signal with adjustable pulse width and pulse period output by the and gate 32, so as to obtain the pulse signal with adjustable pulse value.

Specifically, the waveform processing circuit 3 of the present application includes an exclusive or gate 31, an and gate 32, and a voltage conversion circuit 33, and the operating principle thereof is as follows:

the function of the exclusive or gate 31 is: when the waveform signals input by the two input ends are the same (namely both high levels or both low levels), the output end outputs low levels; when the waveform signals input by the two input ends are different (namely, one input end inputs high level and the other input end inputs low level), the output end outputs high level. The AND gate 32 functions to: when the waveform signals input by the two input ends are both high level, the output end outputs high level; when the waveform signal input by any input end is at low level, the output end outputs low level.

For example, referring to fig. 4, fig. 4 is a schematic diagram of pulse adjustment of an adjustable pulse generator according to an embodiment of the present invention. The period of the rectangular wave IN input by the waveform delay circuit 2 is T, and the T value is adjustable; the first output signal REF output by the waveform delay circuit 2 is a waveform of a rectangular wave IN delayed by T0 time; the second output signal OUT output by the waveform delay circuit 2 is a waveform of a rectangular wave IN delayed by T0+ T1 time, and the value of T1 is adjustable. The REF signal and the OUT signal are subjected to exclusive-or processing by an exclusive-or gate 31 to obtain an exclusive-or output signal P1, each period T has two single pulses, the pulse widths are T2 and T3, respectively, and T2-T3-T1, that is, the values of T2 and T3 are adjustable; and processing the P1 signal and the IN signal through the AND gate 32 to obtain a signal P2 output by the AND gate 32, wherein each period T has a single pulse, the pulse width is T2, and the value of T2 are both adjustable, so that the signal P2 output by the AND gate 32 is a pulse signal with adjustable pulse width and pulse period.

Based on this, the voltage conversion circuit 33 performs voltage conversion on the voltage value of the pulse signal output from the and gate 32 to adjust the pulse value of the pulse signal, thereby obtaining a pulse signal with adjustable pulse width, pulse period, and pulse value.

In addition, the exclusive-or gate 31 can select a single-path 2 input exclusive-or gate SN74LVC1G86, and the and gate 32 can select a single-path 2 input and gate SN74LVC1G08, wherein the maximum propagation delay of SN74LVC1G86 is less than 3.3ns, and the maximum propagation delay of SN74LVC1G08 is less than 3.4ns, so that the requirement can be met.

As an alternative embodiment, the voltage conversion circuit 33 includes a switch tube and a pull-up resistor; wherein:

the control end of the switch tube is connected with the output end of the AND gate 32, the first end of the switch tube is connected with the first end of the pull-up resistor, the common end of the switch tube is used as the output end of the voltage conversion circuit 33, the second end of the pull-up resistor is connected with the adjustable direct-current power supply, and the second end of the switch tube is grounded; the switch tube is a switch tube with a high-level cut-off and a low-level conduction.

Specifically, the voltage conversion circuit 33 of the present application includes a switching transistor (such as a MOS transistor) and a pull-up resistor, and its operating principle is:

when the control end of the switching tube inputs a high level, the switching tube is cut off, and the output end of the voltage conversion circuit 33 outputs a voltage signal which is the same as the output voltage of the adjustable direct-current power supply; when the control end of the switching tube inputs a low level, the switching tube is turned on, the output end of the voltage conversion circuit 33 is grounded, and a low level signal is output.

For example, as shown in fig. 4, the P2 signal output by the and gate 32 is input to the control terminal of the switching tube, and when the P2 signal is at a high level, the output terminal of the voltage converting circuit 33 outputs a voltage signal that is the same as the output voltage of the adjustable dc power supply; when the P2 signal is low, the output terminal of the voltage conversion circuit 33 outputs a low signal. It can be seen that the output signal of the voltage conversion circuit 33 does not change the pulse width and the pulse period of the P2 signal, but changes the pulse value of the P2 signal to the same voltage value as the output voltage of the adjustable dc power supply, and the pulse value of the pulse signal is adjustable because the output voltage of the adjustable dc power supply is adjustable.

It should be noted that the output voltage of the adjustable dc power supply needs to meet the input voltage allowed on the line to which the output signal of the voltage conversion circuit 33 is input, so as to implement line detection.

In conclusion, the pulse generator is adjusted by pure hardware, so that pulse signals with various required parameters can be generated without depending on software, and the pulse generator is convenient and reliable.

As an alternative embodiment, the tunable pulse generator further comprises:

a period calculator for calculating the charging relationship of the capacitor according to the preset relationshipObtaining the charging time Tr of the capacitor C in the current charging and discharging period, and discharging according to the preset capacitor discharging relation

Obtaining the discharge time Tf of the capacitor C in the current charge-discharge cycle, and obtaining the current charge-discharge cycle of the capacitor C according to a preset cycle relation formula T ═ Tr + Tf;

wherein, V_o1Is the initial charging voltage, V, of the capacitor C in the current charging and discharging cycle_hHigh switching voltage, V, for reverse Schmitt trigger OE_t1Is the charging voltage, V, of the capacitor C when the charging time of the current charging and discharging cycle reaches t1_o2Is the initial discharge voltage, V, of the capacitor C in the current charge-discharge cycle₁Low switching voltage, V, for reverse Schmitt trigger OE_t2R is the discharge voltage of the capacitor C when the discharge time of the current charge-discharge period reaches t2₁Is the resistance value of the first adjustable resistor R1 in the current charge-discharge period, R₂The resistance value of the second adjustable resistor R2 in the current charge-discharge cycle is shown, and C is the capacitance value of the capacitor C.

Further, the adjustable pulse generator of the present application further includes a period arithmetic unit, and its working principle is:

when the reverse schmitt trigger OE is just powered on, the voltage at the input terminal a of the reverse schmitt trigger OE is low, and the voltage at the output terminal Y of the reverse schmitt trigger OE is high, and at this time, due to the capacitor C, the reverse schmitt trigger OE passes through the first capacitorThe adjustable resistor R1 charges the capacitor C until the charging voltage rises to the high turnover voltage V of the reverse Schmitt trigger OE_hAt this time, according to the preset relation of capacitor charging

The charging time Tr of the capacitor C in the current charge-discharge cycle can be obtained. When the charging voltage of the capacitor C reaches the high flip-flop voltage V of the reverse Schmitt trigger OE_hAt this time, the voltage at the output terminal Y of the reverse schmitt trigger OE should be low, and at this time, due to the existence of the capacitor C, the reverse schmitt trigger OE discharges the capacitor C through the first adjustable resistor R1 and the second adjustable resistor R2 until the discharge voltage is reduced to the low-flip-flop voltage V of the reverse schmitt trigger OE₁At this time, discharge relationship formula is obtained according to the preset capacitor

And obtaining the discharge time Tf of the capacitor C in the current charge and discharge cycle, where the current charge and discharge cycle of the capacitor C is equal to the charge time of the capacitor C in the current charge and discharge cycle + the discharge time of the capacitor C in the current charge and discharge cycle. When the discharge voltage of the capacitor C reaches the low flip-flop voltage V of the reverse Schmitt trigger OE₁Then, the voltage at the output terminal Y of the reverse schmitt trigger OE should be high again, and the above-mentioned operation is repeated in this way to obtain a periodic rectangular wave.

As an alternative embodiment, the first adjustable resistor R1 and the second adjustable resistor R2 are both gear type adjustable resistors.

Specifically, the first adjustable resistor R1 and the second adjustable resistor R2 of the present application may both be a gear type adjustable resistor, and the current resistance value of the gear type adjustable resistor is obtained by looking up the current resistance value gear of the gear type adjustable resistor.

It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.