阅读说明：本技术 计算处理器和计算方法 (Calculation processor and calculation method ) 是由 斯特凡·玛格丽特·艾伯特·范霍根贝特 于 2019-01-15 设计创作，主要内容包括：一种用于基于指数值a由数字输入值(IN)确定数字输出值(OUT)的计算处理器,其中,该处理器包括第一计算块(CB1)、第二计算块(CB2)和最终计算块(CBF)。第一计算块(CB1)根据输入值的有效部分的最高有效位的位置来初始化中间值和误差值。第二计算块配置为重复执行：计数器值的递增；基于误差值确定幂误差值；以及如果幂误差值大于或等于误差阈值,则通过将中间值乘以自适应值来调整中间值y并将误差值设置为幂误差值除以基值；直到满足退出标准为止。如果幂误差值小于误差阈值,则将误差值设置为幂误差值。最终计算块配置为将输出值设置为中间值。(A calculation processor for determining a digital output value (OUT) from a digital input value (IN) based on an exponent value a, wherein the processor comprises a first calculation block (CB1), a second calculation block (CB2) and a final Calculation Block (CBF). A first calculation block (CB1) initializes intermediate values and error values according to the position of the most significant bit of the significant portion of the input value. The second calculation block is configured to repeatedly perform: incrementing the counter value; determining a power error value based on the error value; and if the power error value is greater than or equal to the error threshold, adjusting the intermediate value y by multiplying the intermediate value by the adaptation value and setting the error value as the power error value divided by the base value; until the exit criteria are met. If the power error value is less than the error threshold, the error value is set to the power error value. The final calculation block is configured to set the output value to an intermediate value.)

1. A computing processor for determining a digital output value (OUT) from a digital input value (IN) based on an exponent value a, the processor comprising:

-a first computation block (CB1) configured to:

a) determining a position number n indicating a position of a most significant bit MSB of a significant portion of the input value IN;

b) setting the intermediate value y ═ b^a·nWherein b is a base value;

c) setting error value err ═ IN/bⁿ(ii) a And

d) initializing a counter value k;

-a second computation block (CB2) configured to repeatedly perform the following steps? Until an exit criterion is met:

e) incrementing the counter value k by 1;

f) by perr ═ err^bDetermining a power error value perr;

g1) adjusting the intermediate value y by multiplying the intermediate value y by an adaptive value depending on the counter value k if the power error value perr is greater than or equal to an error threshold;

g2) setting the error value err to the power error value perr divided by the base value b if the power error value perr is greater than or equal to the error threshold;

g3) setting the error value err to the power error value perr if the power error value perr is less than the error threshold;

and

-a final Calculation Block (CBF) configured to set said output value (OUT) to said intermediate value y.

2. The processor according to claim 1, wherein the second calculation block (CB2) is configured to determine the adaptation value as b^{a/b^k}。

3. The processor according to claim 2, wherein the second computation block (CB2) comprises an adaptive look-up table generated by programming in a hardware description language and/or a fixed adaptation circuit for determining the adaptation value.

4. Processor according to one of claims 1 to 3, wherein the first computation block (CB1) comprises an intermediate lookup table and/or a fixed intermediate circuit resulting from a programming in a hardware description language for setting the intermediate value y.

5. The processor according to one of claims 1 to 4, wherein the first calculation block (CB1) is configured to initialize the counter value to k-0.

6. The processor of one of claims 1 to 5, wherein the base value is 2.

7. The processor according to claim 6, wherein the first calculation block (CB1) comprises a barrel shifter for setting the error value err IN dependence of the input value IN.

8. The processor according to claim 6 or 7, wherein the second calculation block (CB2) comprises a 1-bit shifter for setting the error value err to the power error value perr divided by two.

9. The processor according to one of claims 6 to 8, wherein the second calculation block (CB2) comprises a multiplier, in particular a squaring multiplier or a squaring device, for determining the power error value perr.

10. The processor of one of claims 1 to 9, wherein the error threshold is equal to the base value.

11. The processor according to one of claims 1 to 10, wherein the second calculation block (CB2) comprises a comparator for comparing the power error value perr with the error threshold.

12. Processor according to one of claims 1 to 11, wherein the exit criterion is fulfilled if the counter value k is equal to or greater than a predetermined repetition value L, and wherein the second calculation block (CB2) comprises: l-1 instantiations of the respective circuit, in particular of similar circuits, for each repetition of steps e), f), g1), g2) and g 3); and further instantiations of the respective circuits for the final repetition of steps e), f) and g 1).

13. Processor according to one of claims 1 to 12, realized as an integrated circuit, in particular as an application specific integrated circuit ASIC, and without a microprocessor.

14. An image sensor device comprising: an image sensor for providing sensor values from a plurality of image pixels; and a processor according to one of the preceding claims for processing the sensor values into respective digital input values (IN), IN particular IN a continuous manner.

15. An electronic device having a camera system comprising the image sensor device according to claim 14.

16. A computational method for determining a digital output value (OUT) from a digital input value (IN) based on an exponent value a, the method comprising:

g) determining a position number n representing a position of a most significant bit MSB of a significant portion of the input value IN;

h) setting the intermediate value y ═ b^a·nWherein b is a base value;

i) setting error value err ═ IN/bⁿ；

j) Initializing a counter value k;

the method further comprises repeatedly performing each of steps e), f), g1), g2), g3) until an exit criterion is met:

k) incrementing the counter value k by 1;

l) use of perr ═ err^bDetermining a power error value perr;

g1) adjusting the intermediate value y by multiplying the intermediate value y by an adaptive value depending on the counter value k if the power error value perr is greater than or equal to an error threshold;

g2) setting the error value err to the power error value perr divided by the base value b if the power error value perr is greater than or equal to the error threshold;

g3) setting the error value err to the power error value perr if the power error value perr is less than the error threshold;

h) setting the output value (OUT) to the intermediate value y.

17. The method of claim 15, wherein the adaptation value is determined as b^{a/b^k}。