Monolithic neural interface system
阅读说明：本技术 单片神经接口系统 (Monolithic neural interface system ) 是由 B·金姆 K·怀特 G·马尔伯里 于 2018-11-20 设计创作，主要内容包括：一种包括形成芯片的单片基板的设备,所述芯片包括无线、无电池的单片集成神经接口(MINI)设备。所述芯片包括集成电路(IC),所述集成电路嵌入第一单片基板中,且包括多个放大器,所述放大器配置为放大从被监控对象接收的神经信号,以及无线电数据信号发生器,所述无线电数据信号发生器配置为处理放大的神经信号并产生多路复用数字信号。所述芯片包括嵌入在第二单片基板中的射频(RF)平面线圈,通过第一单片基板电连接到IC,配置为将多路复用数字信号无线传输到远程无线设备,并配置为接收无线功率信号为IC供电。包括多个片上电极以直接感测对象的神经信号并将神经信号提供给所述多个放大器。(A device comprising a monolithic substrate forming a chip comprising a wireless, battery-less, Monolithically Integrated Neural Interface (MINI) device. The chip includes an Integrated Circuit (IC) embedded in a first monolithic substrate and including a plurality of amplifiers configured to amplify neural signals received from a monitored object, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal. The chip includes a Radio Frequency (RF) planar coil embedded in a second monolithic substrate, electrically connected to the IC through the first monolithic substrate, configured to wirelessly transmit the multiplexed digital signal to a remote wireless device, and configured to receive a wireless power signal to power the IC. A plurality of on-chip electrodes are included to directly sense neural signals of a subject and provide the neural signals to the plurality of amplifiers.)
1. An apparatus, comprising:
a monolithic substrate forming a chip including a wireless, battery-less Monolithically Integrated Neural Interface (MINI) device configured to be implanted, the chip comprising:
an Integrated Circuit (IC) embedded in the first monolithic substrate and including a plurality of amplifiers configured to amplify neural signals received from the monitored object, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal; and
a Radio Frequency (RF) planar coil embedded in the second monolithic substrate, electrically connected to the IC through the first monolithic substrate, configured to wirelessly transmit the multiplexed digital signal to a remote wireless device, and configured to receive a wireless power signal to power the IC; and
a plurality of on-chip electrodes configured to directly sense neural signals of a subject and to supply the neural signals to the plurality of amplifiers.
2. The apparatus of claim 1, further comprising conductive vias for electrically connecting the ICs in the first monolithic substrate to the RF planar coils embedded in the second monolithic substrate, wherein the first monolithic substrate is stacked with respect to the second monolithic substrate.
3. The apparatus of claim 2, wherein each conductive via comprises a through silicon via.
4. The apparatus of claim 1, wherein each of the plurality of on-chip electrodes comprises a tungsten core and gold plating surrounding the tungsten core.
5. The apparatus of claim 1, wherein the plurality of on-chip electrodes comprises one of a pillar electrode array and a planar electrode array.
6. The apparatus of claim 5, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes.
7. The apparatus of claim 1, wherein,
the RF planar coil comprises a first data communication coil and a second power receiving coil;
a power receiving coil operating with a capacitor and a voltage regulator to generate and supply power to the IC; and is
The capacitor is coupled to the IC through a conductive via.
8. A system, comprising:
a wireless, batteryless, Monolithically Integrated Neural Interface (MINI) device, the device comprising a chip, the chip comprising:
an Integrated Circuit (IC) embedded in the first monolithic substrate and including a plurality of amplifiers configured to amplify neural signals received from the monitored object, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal; and
a Radio Frequency (RF) planar coil embedded in the second monolithic substrate, electrically connected to the IC through the first monolithic substrate, configured to wirelessly transmit a multiplexed digital signal, and configured to receive a wireless power signal to power the IC; and
a plurality of on-chip electrodes configured to directly sense neural signals of a subject and to supply the neural signals to the plurality of amplifiers; and
a prosthetic device having a computing device and an external power source coupled thereto, and configured to be worn by a subject, wherein the computing device receives the multiplexed digital signal and the external power source provides a wireless power signal to the MINI device.
9. The system of claim 8, wherein the chip further comprises conductive vias for electrically connecting the ICs in the first monolithic substrate to the RF planar coils embedded in the second monolithic substrate, wherein the first monolithic substrate is stacked relative to the second monolithic substrate.
10. The system of claim 9, wherein each conductive via comprises a through silicon via.
11. The system of claim 8, wherein each of the plurality of on-chip electrodes comprises a tungsten core and gold plating surrounding the tungsten core.
12. The system of claim 8, wherein the plurality of on-chip electrodes comprises one of a pillar electrode array and a planar electrode array.
13. The system of claim 12, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes.
14. The system of claim 8, wherein,
the RF planar coil comprises a first data communication coil and a second power receiving coil;
a power receiving coil operating with a capacitor and a voltage regulator to generate and supply power to the IC; and is
The capacitor is coupled to the IC through a conductive via.
15. A method, comprising:
fabricating a chip for a wireless, battery-less Monolithically Integrated Neural Interface (MINI) device, the fabricating the chip comprising:
embedding an Integrated Circuit (IC) comprising a plurality of amplifiers in a first monolithic substrate, the plurality of amplifiers configured to amplify neural signals received from a monitored object;
an embedded radio data signal generator configured to process the amplified neural signal and generate a multiplexed digital signal; and
embedding a Radio Frequency (RF) planar coil in a second monolithic substrate electrically connected to the IC through the first monolithic substrate, configured to wirelessly transmit a multiplexed digital signal to a remote wireless device, and configured to receive a wireless power signal to power the IC; and
integrating a plurality of on-chip electrodes on the on-chip, the plurality of on-chip electrodes configured to directly sense neural signals of the subject and provide the neural signals to the plurality of amplifiers.
16. The method of claim 15, further comprising forming conductive vias for electrically connecting the ICs in the first monolithic substrate to the RF planar coils embedded in the second monolithic substrate, wherein the first monolithic substrate is stacked relative to the second monolithic substrate.
17. The method of claim 16, wherein each conductive via comprises a through silicon via.
18. The method of claim 15, wherein on-chip integrating a plurality of on-chip electrodes comprises: forming a tungsten core and plating the tungsten core with gold surrounding the tungsten core for each of the plurality of upper electrodes.
19. The method of claim 15, wherein on-chip integrating a plurality of on-chip electrodes comprises forming one of an array of pillar electrodes and an array of planar electrodes.
20. The method of claim 19, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes.
Technical Field
The present invention relates to a neural interface system, and more particularly, to a neural interface system configured as a monolithic system.
Background
Devices or systems that interface with the brain are called brain-machine interfaces (BMIs) or brain-computer interfaces (BCIs). Such devices provide a direct communication path with brain neurons, sense brain neural signals for brain studies, and generate and transmit brain signals to the appropriate brain neurons to enhance or restore cognitive or sensorimotor function in humans.
In neurosurgery, invasive BCI is implanted directly into the gray matter of the brain. Invasive BCI devices can repair impaired vision and restore motion, or provide new functionality to paralyzed patients, for example, by using devices that assist the patient by interfacing to a computer or robotic arm. Invasive devices produce the highest quality signals in all BCI devices because they are located in the gray matter, but are prone to scar tissue formation, resulting in signal attenuation when the body reacts to foreign objects in the brain.
Non-invasive BCI involves the use of EEG (electroencephalogram) equipment that detects electrical activity in the brain. Although EEG-based interface devices are easy to wear and do not require surgery, their spatial resolution is relatively low and high frequency signals cannot be used effectively because the skull attenuates such signals, thereby dispersing and obscuring the electromagnetic waves generated by the neurons.
Invasive BCI is implanted into the skull but outside the brain, on or under the dura mater. As expected, these devices provide better signal quality and lower risk of scar tissue formation than non-invasive BCI. This intermediate BCI mode is promising due to higher spatial resolution, good signal-to-noise ratio and a signal that is useful over a wider frequency range.
In addition to the various BCI modes described above, external devices (e.g., amplifiers, recorders) are required to monitor and record electrical signals generated by neurons in the brain. Typically, the BCI sensing electrodes are connected to an external device through a wired connection. However, wired connections are cumbersome, limit the mobility of the patient, and necessitate the use of percutaneous lines (transcutaneous wires) which present an infection risk.
Each BCI technique described requires an array of sensors to sense/receive neural signals. The parallel neural signals received by such arrays (typically placed within the sensory cortex or the primary motor cortex for invasive BCI devices) encode information that can be used to guide studies that restore cognitive or motor function. The array may also provide neural signals to brain regions to restore cognitive and motor function. The quality of the information obtained from the sensor array depends on the density and resolution of the sensed neural signals, which is directly related to the performance of the sensor array, including the spacing and sensitivity of the array electrodes.
The electrode density in current brain-computer interface devices is still insufficient to have a clinical impact on many patients; significant improvements are needed to help severely disabled patients restore full mobility or address other impaired functions. For example, restoring limb movement may require a BMI to monitor 5,000 and 10,000 neurons simultaneously. Whole body movement may require 100,000 neurological measurements.
A fully implantable neural interface system is designed as a complex integration of many components, including: an electrode array, an amplifier, a processor, a wireless transmitter, and a power supply. Prior art systems use wire feedthroughs to establish electrical connections between components, and the connections are insulated with a material that prevents leakage.
Fig. 1A and 1B show the current
Advancing and overriding to 1000 sense/record electrodes (also called channels, since each electrode creates one data channel) is a significant challenge. These and other problems associated with current BCI devices must be addressed to advance the state of the art and provide a avenue for rehabilitation for disabled patients.
Disclosure of Invention
Embodiments of the present application relate to neural interface systems, and more particularly, to neural interface systems configured as monolithic systems and methods of making the same. Embodiments are also related to wireless, batteryless, Monolithically Integrated Neural Interface (MINI) devices.
Drawings
A more particular description briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only typical embodiments and are not therefore to be considered to be limiting of its scope, the embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:
FIGS. 1A and 1B illustrate the current latest BCI device;
FIG. 2A shows a cross-sectional view of a Monolithically Integrated Neural Interface (MINI) device;
fig. 2B shows a perspective view of the front of the MINI device of fig. 2A;
fig. 2C shows a perspective view of the rear of the MINI device of fig. 2A;
fig. 2D shows a block diagram of a MINI device according to an embodiment;
FIGS. 3A-3D show steps associated with unguided electrodeposition of gold-on-chip electrodes of an array of pillar-on-chip electrodes in a MINI device;
FIGS. 4A-4F show step-by-step views of guided electrodeposition to fabricate a pillar electrode with a tungsten core;
fig. 5A-5F show steps of RF planar coil of a MINI device using back integration of Through Silicon Vias (TSVs);
FIG. 6A shows a neural recording circuit with an intrinsic sine filter;
FIG. 6B shows a graphical representation of an attenuated high frequency intrinsic filter causing aliasing noise;
FIG. 7A shows a portion of a 1000 channel amplifier array and a neural recording circuit;
FIG. 7B shows a graphical representation of the noise spectral density of a Complementary Metal Oxide Semiconductor (CMOS) amplifier array of the design of FIG. 7A compared to the state-of-the-art
fig. 8A shows a first MINI system;
FIG. 8B shows a second MINI system used with a prosthesis;
FIGS. 9A-9C illustrate steps for fabricating an array of on-chip electrodes using gold electrodeposition;
FIG. 9D shows a graphical representation of dopamine measurements using on-chip plated electrodes;
FIGS. 10A and 10B show a top view of a plating electrode and a cross-sectional image taken through a Focused Ion Beam (FIB);
11A-11C show top views after CMOS processing steps for on-chip integration of planar electrodes and SU-8 holes;
12A-12C show cross-sectional views of steps after CMOS processing for on-chip integrated electrodes and SU-8 wells;
FIG. 13A shows a plot of constant coupling coefficient over various trace widths;
FIG. 13B shows a graphical representation of constant coupling coefficients over various spiral turns;
FIG. 14A shows the optimal geometry of a square spiral coil as a function of the spacing (z) from rxID/rxOD;
FIG. 14B shows the optimal geometry of a square spiral coil as a function of the spacing (z) from txOD/rxOD;
FIG. 14C shows the optimal geometry of a square spiral coil as a function of the spacing (z) from txID/txOD;
fig. 15A shows a MINI device comprising a 1024-channel brain-machine interface chip designed in a standard 0.35 μm CMOS process;
fig. 15B shows an amplifier array for the MINI device of fig. 15A;
FIG. 16A shows a schematic diagram of a delta modulator for compressed neural recording, where the schematic includes two comparators that trigger a reset pulse when a voltage change is detected above/below a preset threshold;
FIG. 16A shows VoutA voltage rise above Vref + Δ Vth results in a coarse digital pulse and a voltage fall below Vref- Δ Vth results in a fine digital pulse;
FIG. 17A shows neural signal sampling using a delta modulator and a conventional neuromorphic system, where the spikes are examples of 1-mV neurospikes, triangles (. tangle-solidup.) indicate where the delta modulator will sample, and crosses (. X.) show where the conventional system will sample;
FIG. 17B shows a pulse sequence for sampling a neural signal based on samples of a delta modulator;
FIG. 17C illustrates a sample reconstructed neural signal based on a delta modulator;
FIG. 17D illustrates reconstruction based on constant rate sampling;
FIG. 18 shows a core circuit schematic of a delta modulator using a simple operational amplifier (OPA) design and two pseudo comparators;
FIG. 19 shows a block diagram of computing hardware; and
FIG. 20 shows program instructions for use with a prosthetic device.
An aspect of an embodiment includes a device comprising a monolithic substrate forming a chip comprising a wireless, batteryless, Monolithically Integrated Neural Interface (MINI) device configured as an implantable. The chip includes an Integrated Circuit (IC) embedded in a first monolithic substrate and including a plurality of amplifiers configured to amplify neural signals received from a monitored object, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal. The chip includes a Radio Frequency (RF) planar coil embedded in a second monolithic substrate, electrically connected to the IC through the first monolithic substrate, configured to wirelessly transmit the multiplexed digital signal to a remote wireless device, and configured to receive a wireless power signal to power the IC. A plurality of on-chip electrodes are included to directly sense neural signals of a subject and provide the neural signals to the plurality of amplifiers.